JP2010272851A5 - - Google Patents

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Publication number
JP2010272851A5
JP2010272851A5 JP2010093842A JP2010093842A JP2010272851A5 JP 2010272851 A5 JP2010272851 A5 JP 2010272851A5 JP 2010093842 A JP2010093842 A JP 2010093842A JP 2010093842 A JP2010093842 A JP 2010093842A JP 2010272851 A5 JP2010272851 A5 JP 2010272851A5
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JP
Japan
Prior art keywords
substrate
bond
bond substrate
manufacturing
heat treatment
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JP2010093842A
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English (en)
Japanese (ja)
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JP2010272851A (ja
JP5721962B2 (ja
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Priority claimed from JP2010093842A external-priority patent/JP5721962B2/ja
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Publication of JP2010272851A5 publication Critical patent/JP2010272851A5/ja
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Publication of JP5721962B2 publication Critical patent/JP5721962B2/ja
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JP2010093842A 2009-04-22 2010-04-15 Ｓｏｉ基板の作製方法 Expired - Fee Related JP5721962B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2010093842A JP5721962B2 (ja) 2009-04-22 2010-04-15 Ｓｏｉ基板の作製方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2009104203 2009-04-22
JP2009104203 2009-04-22
JP2010093842A JP5721962B2 (ja) 2009-04-22 2010-04-15 Ｓｏｉ基板の作製方法

Publications (3)

Publication Number Publication Date
JP2010272851A JP2010272851A (ja) 2010-12-02
JP2010272851A5 true JP2010272851A5 (enExample) 2013-05-16
JP5721962B2 JP5721962B2 (ja) 2015-05-20

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JP2010093842A Expired - Fee Related JP5721962B2 (ja) 2009-04-22 2010-04-15 Ｓｏｉ基板の作製方法

Country Status (5)

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US (2) US8168481B2 (enExample)
JP (1) JP5721962B2 (enExample)
KR (1) KR101752350B1 (enExample)
CN (1) CN101872740B (enExample)
SG (2) SG166060A1 (enExample)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8318588B2 (en) * 2009-08-25 2012-11-27 Semiconductor Energy Laboratory Co., Ltd. Method for reprocessing semiconductor substrate, method for manufacturing reprocessed semiconductor substrate, and method for manufacturing SOI substrate
WO2011043178A1 (en) * 2009-10-09 2011-04-14 Semiconductor Energy Laboratory Co., Ltd. Reprocessing method of semiconductor substrate, manufacturing method of reprocessed semiconductor substrate, and manufacturing method of soi substrate
US9299556B2 (en) * 2010-12-27 2016-03-29 Shanghai Simgui Technology Co. Ltd. Method for preparing semiconductor substrate with insulating buried layer gettering process
US8735263B2 (en) 2011-01-21 2014-05-27 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing SOI substrate
US9123529B2 (en) 2011-06-21 2015-09-01 Semiconductor Energy Laboratory Co., Ltd. Method for reprocessing semiconductor substrate, method for manufacturing reprocessed semiconductor substrate, and method for manufacturing SOI substrate
JP2013093434A (ja) * 2011-10-26 2013-05-16 Semiconductor Energy Lab Co Ltd 半導体基板の解析方法
CN104040686B (zh) 2012-01-12 2017-05-24 信越化学工业株式会社 热氧化异种复合基板及其制造方法
US8879275B2 (en) * 2012-02-21 2014-11-04 International Business Machines Corporation Anti-corrosion conformal coating comprising modified porous silica fillers for metal conductors electrically connecting an electronic component
US9646873B2 (en) * 2012-07-25 2017-05-09 Shin-Etsu Chemical Co., Ltd. Method for producing SOS substrates, and SOS substrate
US9196503B2 (en) * 2012-08-23 2015-11-24 Michael Xiaoxuan Yang Methods for fabricating devices on semiconductor substrates
WO2014144785A1 (en) 2013-03-15 2014-09-18 The Regents Of The University Of California Multi-site transcutaneous electrical stimulation of the spinal cord for facilitation of locomotion
US10190235B2 (en) * 2013-05-24 2019-01-29 Taiwan Semiconductor Manufacturing Company, Ltd. Wafer supporting structure and method for forming the same
WO2015048563A2 (en) 2013-09-27 2015-04-02 The Regents Of The University Of California Engaging the cervical spinal cord circuitry to re-enable volitional control of hand function in tetraplegic subjects
EP3127141B1 (de) * 2014-04-01 2021-03-24 EV Group E. Thallner GmbH Verfahren zur oberflächenreinigung von substraten
US9425063B2 (en) * 2014-06-19 2016-08-23 Infineon Technologies Ag Method of reducing an impurity concentration in a semiconductor body, method of manufacturing a semiconductor device and semiconductor device
US11097122B2 (en) 2015-11-04 2021-08-24 The Regents Of The University Of California Magnetic stimulation of the spinal cord to restore control of bladder and/or bowel
WO2018148844A1 (en) 2017-02-17 2018-08-23 The University Of British Columbia Apparatus and methods for maintaining physiological functions
US12434068B2 (en) 2017-05-23 2025-10-07 The Regents Of The University Of California Accessing spinal networks to address sexual dysfunction
EP3421081B1 (en) 2017-06-30 2020-04-15 GTX medical B.V. A system for neuromodulation
ES3058711T3 (en) 2017-12-05 2026-03-12 Ecole Polytechnique Fed Lausanne Epfl A system for planning and/or providing neuromodulation
US12357828B2 (en) 2017-12-05 2025-07-15 Ecole Polytechnique Federale De Lausanne (Epfl) System for planning and/or providing neuromodulation
US12478777B2 (en) 2018-08-23 2025-11-25 The Regents Of The University Of California Non-invasive spinal cord stimulation for nerve root palsy, cauda equina syndrome, and restoration of upper extremity function
DE18205821T1 (de) 2018-11-13 2020-12-24 Gtx Medical B.V. Steuerungssystem zur bewegungsrekonstruktion und/oder wiederherstellung für einen patienten
DE18205817T1 (de) 2018-11-13 2020-12-24 Gtx Medical B.V. Sensor in bekleidung von gliedmassen oder schuhwerk
EP3695878B1 (en) 2019-02-12 2023-04-19 ONWARD Medical N.V. A system for neuromodulation
DE19211698T1 (de) 2019-11-27 2021-09-02 Onward Medical B.V. Neuromodulation system
DE19211738T1 (de) 2019-11-27 2021-09-09 Onward Medical B.V. Neuromodulationssystem

Family Cites Families (43)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2550371A1 (de) * 1975-11-10 1977-05-12 Ibm Deutschland Verfahren zum thermischen oxydieren von silicium
FR2681472B1 (fr) 1991-09-18 1993-10-29 Commissariat Energie Atomique Procede de fabrication de films minces de materiau semiconducteur.
FR2715501B1 (fr) 1994-01-26 1996-04-05 Commissariat Energie Atomique Procédé de dépôt de lames semiconductrices sur un support.
JP4103968B2 (ja) 1996-09-18 2008-06-18 株式会社半導体エネルギー研究所 絶縁ゲイト型半導体装置
US6534380B1 (en) 1997-07-18 2003-03-18 Denso Corporation Semiconductor substrate and method of manufacturing the same
US6388652B1 (en) 1997-08-20 2002-05-14 Semiconductor Energy Laboratory Co., Ltd. Electrooptical device
US6686623B2 (en) 1997-11-18 2004-02-03 Semiconductor Energy Laboratory Co., Ltd. Nonvolatile memory and electronic apparatus
TW508378B (en) * 1998-03-09 2002-11-01 Shinetsu Handotai Kk A method for producing a silicon single crystal wafer and a silicon single crystal wafer
JPH11307747A (ja) * 1998-04-17 1999-11-05 Nec Corp Ｓｏｉ基板およびその製造方法
JP3500063B2 (ja) 1998-04-23 2004-02-23 信越半導体株式会社 剥離ウエーハを再利用する方法および再利用に供されるシリコンウエーハ
DE69942263D1 (de) * 1998-05-22 2010-06-02 Shinetsu Handotai Kk Einkristalline epitaktische Siliciumscheibe und Verfahren zu ihrer Herstellung
JP2000012864A (ja) 1998-06-22 2000-01-14 Semiconductor Energy Lab Co Ltd 半導体装置の作製方法
US6271101B1 (en) 1998-07-29 2001-08-07 Semiconductor Energy Laboratory Co., Ltd. Process for production of SOI substrate and process for production of semiconductor device
JP4476390B2 (ja) 1998-09-04 2010-06-09 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP2000349264A (ja) * 1998-12-04 2000-12-15 Canon Inc 半導体ウエハの製造方法、使用方法および利用方法
EP1039513A3 (en) 1999-03-26 2008-11-26 Canon Kabushiki Kaisha Method of producing a SOI wafer
JP4379943B2 (ja) 1999-04-07 2009-12-09 株式会社デンソー 半導体基板の製造方法および半導体基板製造装置
JP2001144275A (ja) * 1999-08-27 2001-05-25 Shin Etsu Handotai Co Ltd 貼り合わせｓｏｉウエーハの製造方法および貼り合わせｓｏｉウエーハ
KR100682190B1 (ko) * 1999-09-07 2007-02-12 동경 엘렉트론 주식회사 실리콘 산질화물을 포함하는 절연막의 형성 방법 및 장치
WO2001028000A1 (en) * 1999-10-14 2001-04-19 Shin-Etsu Handotai Co., Ltd. Method for manufacturing soi wafer, and soi wafer
JP3943782B2 (ja) 1999-11-29 2007-07-11 信越半導体株式会社 剥離ウエーハの再生処理方法及び再生処理された剥離ウエーハ
JP2002110949A (ja) * 2000-09-28 2002-04-12 Canon Inc Ｓｏｉの熱処理方法及び製造方法
JP4772258B2 (ja) 2002-08-23 2011-09-14 シャープ株式会社 Ｓｏｉ基板の製造方法
US7119365B2 (en) 2002-03-26 2006-10-10 Sharp Kabushiki Kaisha Semiconductor device and manufacturing method thereof, SOI substrate and display device using the same, and manufacturing method of the SOI substrate
JP2004134675A (ja) 2002-10-11 2004-04-30 Sharp Corp Ｓｏｉ基板、表示装置およびｓｏｉ基板の製造方法
US7508034B2 (en) 2002-09-25 2009-03-24 Sharp Kabushiki Kaisha Single-crystal silicon substrate, SOI substrate, semiconductor device, display device, and manufacturing method of semiconductor device
JP4699675B2 (ja) * 2002-10-08 2011-06-15 信越半導体株式会社 アニールウェーハの製造方法
JP2004193515A (ja) * 2002-12-13 2004-07-08 Shin Etsu Handotai Co Ltd Ｓｏｉウエーハの製造方法
US6809370B1 (en) * 2003-07-31 2004-10-26 Texas Instruments Incorporated High-k gate dielectric with uniform nitrogen profile and methods for making the same
US7052978B2 (en) * 2003-08-28 2006-05-30 Intel Corporation Arrangements incorporating laser-induced cleaving
JP5110772B2 (ja) 2004-02-03 2012-12-26 株式会社半導体エネルギー研究所 半導体薄膜層を有する基板の製造方法
JP2006294737A (ja) * 2005-04-07 2006-10-26 Sumco Corp Ｓｏｉ基板の製造方法及びその製造における剥離ウェーハの再生処理方法。
JP4715470B2 (ja) 2005-11-28 2011-07-06 株式会社Sumco 剥離ウェーハの再生加工方法及びこの方法により再生加工された剥離ウェーハ
EP1835533B1 (en) 2006-03-14 2020-06-03 Soitec Method for manufacturing compound material wafers and method for recycling a used donor substrate
FR2899380B1 (fr) 2006-03-31 2008-08-29 Soitec Sa Procede de revelation de defauts cristallins dans un substrat massif.
JP5314838B2 (ja) * 2006-07-14 2013-10-16 信越半導体株式会社 剥離ウェーハを再利用する方法
US20080248629A1 (en) * 2007-04-06 2008-10-09 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor substrate
JP5289805B2 (ja) * 2007-05-10 2013-09-11 株式会社半導体エネルギー研究所 半導体装置製造用基板の作製方法
EP1993127B1 (en) * 2007-05-18 2013-04-24 Semiconductor Energy Laboratory Co., Ltd. Manufacturing method of SOI substrate
US20090004764A1 (en) * 2007-06-29 2009-01-01 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing SOI substrate and method for manufacturing semiconductor device
KR101499175B1 (ko) 2007-10-04 2015-03-05 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 기판의 제조방법
JP2009272471A (ja) * 2008-05-08 2009-11-19 Sumco Corp 貼り合わせウェーハの製造方法
US20100022070A1 (en) 2008-07-22 2010-01-28 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing soi substrate

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