SG166060A1 - Method of manufacturing soi substrate - Google Patents
Method of manufacturing soi substrateInfo
- Publication number
- SG166060A1 SG166060A1 SG201002398-4A SG2010023984A SG166060A1 SG 166060 A1 SG166060 A1 SG 166060A1 SG 2010023984 A SG2010023984 A SG 2010023984A SG 166060 A1 SG166060 A1 SG 166060A1
- Authority
- SG
- Singapore
- Prior art keywords
- bond substrate
- substrate
- bond
- soi substrate
- embrittlement region
- Prior art date
Links
- 239000000758 substrate Substances 0.000 title abstract 11
- 238000004519 manufacturing process Methods 0.000 title 1
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 abstract 2
- 238000010438 heat treatment Methods 0.000 abstract 2
- 239000012300 argon atmosphere Substances 0.000 abstract 1
- 239000012298 atmosphere Substances 0.000 abstract 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 abstract 1
- 150000002500 ions Chemical class 0.000 abstract 1
- 230000001678 irradiating effect Effects 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
- 239000000203 mixture Substances 0.000 abstract 1
- 229910052757 nitrogen Inorganic materials 0.000 abstract 1
- 239000001301 oxygen Substances 0.000 abstract 1
- 229910052760 oxygen Inorganic materials 0.000 abstract 1
- 239000004065 semiconductor Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02488—Insulating materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Recrystallisation Techniques (AREA)
- Thin Film Transistor (AREA)
- Element Separation (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2009104203 | 2009-04-22 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| SG166060A1 true SG166060A1 (en) | 2010-11-29 |
Family
ID=42992513
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| SG201002398-4A SG166060A1 (en) | 2009-04-22 | 2010-04-06 | Method of manufacturing soi substrate |
| SG2012056420A SG183670A1 (en) | 2009-04-22 | 2010-04-06 | Method of manufacturing soi substrate |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| SG2012056420A SG183670A1 (en) | 2009-04-22 | 2010-04-06 | Method of manufacturing soi substrate |
Country Status (5)
| Country | Link |
|---|---|
| US (2) | US8168481B2 (enExample) |
| JP (1) | JP5721962B2 (enExample) |
| KR (1) | KR101752350B1 (enExample) |
| CN (1) | CN101872740B (enExample) |
| SG (2) | SG166060A1 (enExample) |
Families Citing this family (26)
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|---|---|---|---|---|
| US8318588B2 (en) * | 2009-08-25 | 2012-11-27 | Semiconductor Energy Laboratory Co., Ltd. | Method for reprocessing semiconductor substrate, method for manufacturing reprocessed semiconductor substrate, and method for manufacturing SOI substrate |
| WO2011043178A1 (en) * | 2009-10-09 | 2011-04-14 | Semiconductor Energy Laboratory Co., Ltd. | Reprocessing method of semiconductor substrate, manufacturing method of reprocessed semiconductor substrate, and manufacturing method of soi substrate |
| US9299556B2 (en) * | 2010-12-27 | 2016-03-29 | Shanghai Simgui Technology Co. Ltd. | Method for preparing semiconductor substrate with insulating buried layer gettering process |
| US8735263B2 (en) | 2011-01-21 | 2014-05-27 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing SOI substrate |
| US9123529B2 (en) | 2011-06-21 | 2015-09-01 | Semiconductor Energy Laboratory Co., Ltd. | Method for reprocessing semiconductor substrate, method for manufacturing reprocessed semiconductor substrate, and method for manufacturing SOI substrate |
| JP2013093434A (ja) * | 2011-10-26 | 2013-05-16 | Semiconductor Energy Lab Co Ltd | 半導体基板の解析方法 |
| US10103021B2 (en) | 2012-01-12 | 2018-10-16 | Shin-Etsu Chemical Co., Ltd. | Thermally oxidized heterogeneous composite substrate and method for manufacturing same |
| US8879275B2 (en) * | 2012-02-21 | 2014-11-04 | International Business Machines Corporation | Anti-corrosion conformal coating comprising modified porous silica fillers for metal conductors electrically connecting an electronic component |
| CN104488081B (zh) * | 2012-07-25 | 2017-09-19 | 信越化学工业株式会社 | Sos基板的制造方法和sos基板 |
| US9196503B2 (en) * | 2012-08-23 | 2015-11-24 | Michael Xiaoxuan Yang | Methods for fabricating devices on semiconductor substrates |
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| US10190235B2 (en) * | 2013-05-24 | 2019-01-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Wafer supporting structure and method for forming the same |
| AU2014324660A1 (en) | 2013-09-27 | 2016-04-21 | The Regents Of The University Of California | Engaging the cervical spinal cord circuitry to re-enable volitional control of hand function in tetraplegic subjects |
| EP3127141B1 (de) * | 2014-04-01 | 2021-03-24 | EV Group E. Thallner GmbH | Verfahren zur oberflächenreinigung von substraten |
| US9425063B2 (en) * | 2014-06-19 | 2016-08-23 | Infineon Technologies Ag | Method of reducing an impurity concentration in a semiconductor body, method of manufacturing a semiconductor device and semiconductor device |
| US11235154B2 (en) | 2017-02-17 | 2022-02-01 | The University Of British Columbia | Apparatus and methods for maintaining physiological functions |
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| DE20168827T1 (de) | 2017-06-30 | 2021-01-21 | Gtx Medical B.V. | System zur neuromodulierung |
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| US12478777B2 (en) | 2018-08-23 | 2025-11-25 | The Regents Of The University Of California | Non-invasive spinal cord stimulation for nerve root palsy, cauda equina syndrome, and restoration of upper extremity function |
| EP3653260A1 (en) | 2018-11-13 | 2020-05-20 | GTX medical B.V. | Sensor in clothing of limbs or footwear |
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| EP3695878B1 (en) | 2019-02-12 | 2023-04-19 | ONWARD Medical N.V. | A system for neuromodulation |
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| FR2681472B1 (fr) | 1991-09-18 | 1993-10-29 | Commissariat Energie Atomique | Procede de fabrication de films minces de materiau semiconducteur. |
| FR2715501B1 (fr) | 1994-01-26 | 1996-04-05 | Commissariat Energie Atomique | Procédé de dépôt de lames semiconductrices sur un support. |
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| US7052978B2 (en) * | 2003-08-28 | 2006-05-30 | Intel Corporation | Arrangements incorporating laser-induced cleaving |
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| JP2006294737A (ja) * | 2005-04-07 | 2006-10-26 | Sumco Corp | Soi基板の製造方法及びその製造における剥離ウェーハの再生処理方法。 |
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| EP1835533B1 (en) | 2006-03-14 | 2020-06-03 | Soitec | Method for manufacturing compound material wafers and method for recycling a used donor substrate |
| FR2899380B1 (fr) | 2006-03-31 | 2008-08-29 | Soitec Sa | Procede de revelation de defauts cristallins dans un substrat massif. |
| JP5314838B2 (ja) * | 2006-07-14 | 2013-10-16 | 信越半導体株式会社 | 剥離ウェーハを再利用する方法 |
| EP1978554A3 (en) * | 2007-04-06 | 2011-10-12 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing semiconductor substrate comprising implantation and separation steps |
| JP5289805B2 (ja) * | 2007-05-10 | 2013-09-11 | 株式会社半導体エネルギー研究所 | 半導体装置製造用基板の作製方法 |
| EP1993127B1 (en) * | 2007-05-18 | 2013-04-24 | Semiconductor Energy Laboratory Co., Ltd. | Manufacturing method of SOI substrate |
| US20090004764A1 (en) * | 2007-06-29 | 2009-01-01 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing SOI substrate and method for manufacturing semiconductor device |
| KR101499175B1 (ko) | 2007-10-04 | 2015-03-05 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 기판의 제조방법 |
| JP2009272471A (ja) * | 2008-05-08 | 2009-11-19 | Sumco Corp | 貼り合わせウェーハの製造方法 |
| US20100022070A1 (en) | 2008-07-22 | 2010-01-28 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing soi substrate |
-
2010
- 2010-04-06 SG SG201002398-4A patent/SG166060A1/en unknown
- 2010-04-06 SG SG2012056420A patent/SG183670A1/en unknown
- 2010-04-13 KR KR1020100033771A patent/KR101752350B1/ko not_active Expired - Fee Related
- 2010-04-15 JP JP2010093842A patent/JP5721962B2/ja not_active Expired - Fee Related
- 2010-04-19 US US12/762,675 patent/US8168481B2/en not_active Expired - Fee Related
- 2010-04-20 CN CN201010167278.XA patent/CN101872740B/zh not_active Expired - Fee Related
-
2012
- 2012-04-24 US US13/454,114 patent/US8486772B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| KR20100116536A (ko) | 2010-11-01 |
| US8486772B2 (en) | 2013-07-16 |
| CN101872740A (zh) | 2010-10-27 |
| US20120208348A1 (en) | 2012-08-16 |
| SG183670A1 (en) | 2012-09-27 |
| US8168481B2 (en) | 2012-05-01 |
| US20100273310A1 (en) | 2010-10-28 |
| CN101872740B (zh) | 2014-05-07 |
| KR101752350B1 (ko) | 2017-06-29 |
| JP2010272851A (ja) | 2010-12-02 |
| JP5721962B2 (ja) | 2015-05-20 |
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