WO2009054115A1 - ＳＯＩ（Silicon on insulator）構造の半導体装置およびその製造方法 - Google Patents

ＳＯＩ（Silicon on insulator）構造の半導体装置およびその製造方法 Download PDF

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Publication number
WO2009054115A1
WO2009054115A1 PCT/JP2008/002964 JP2008002964W WO2009054115A1 WO 2009054115 A1 WO2009054115 A1 WO 2009054115A1 JP 2008002964 W JP2008002964 W JP 2008002964W WO 2009054115 A1 WO2009054115 A1 WO 2009054115A1
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WIPO (PCT)
Prior art keywords
soi
semiconductor device
lattice distortion
silicon
insulator
Prior art date
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PCT/JP2008/002964
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English (en)
French (fr)
Inventor
Hiroshi Ohtsuki
Mitsutaka Katada
Nobuhiko Noto
Hiroshi Takeno
Kazuhiko Yoshida
Original Assignee
Denso Corporation
Shin-Etsu Handotai Co., Ltd.
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Filing date
Publication date
Application filed by Denso Corporation, Shin-Etsu Handotai Co., Ltd. filed Critical Denso Corporation
Priority to CN2008801125346A priority Critical patent/CN101836281B/zh
Priority to EP08841352A priority patent/EP2207194A4/en
Priority to US12/734,240 priority patent/US8410573B2/en
Publication of WO2009054115A1 publication Critical patent/WO2009054115A1/ja

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    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78609—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device for preventing leakage current
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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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    • H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • H01L21/3226—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering of silicon on insulator
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    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76256—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques using silicon etch back techniques, e.g. BESOI, ELTRAN
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    • H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
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    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
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    • H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
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Abstract

　ＳＯＩ基板１００を用いたＳＯＩ構造の半導体装置において、活性層３となるシリコン基板に対してＡｒイオンを注入することにより格子歪み層４を形成する。これにより、格子歪み層４をゲッタリングサイトとして機能させることが可能となる。また、Ａｒイオンのドーズ量を調整し、格子歪み層４の引張り応力が１１ＭＰａ以上かつ２７ＭＰａ以下となるようにする。これにより、ゲッタリングサイトとして機能させつつ、リーク電流の発生を抑制することが可能となる。
PCT/JP2008/002964 2007-10-22 2008-10-20 ＳＯＩ（Silicon on insulator）構造の半導体装置およびその製造方法 WO2009054115A1 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN2008801125346A CN101836281B (zh) 2007-10-22 2008-10-20 Soi(绝缘体上硅)结构的半导体装置及其制造方法
EP08841352A EP2207194A4 (en) 2007-10-22 2008-10-20 SOI STRUCTURE SEMICONDUCTOR DEVICE (Silicon on Insulator), AND METHOD FOR MANUFACTURING THE SAME
US12/734,240 US8410573B2 (en) 2007-10-22 2008-10-20 SOI (silicon on insulator) structure semiconductor device and method of manufacturing the same

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2007-273813 2007-10-22
JP2007273813 2007-10-22
JP2008-261781 2008-10-08
JP2008261781A JP5499455B2 (ja) 2007-10-22 2008-10-08 ＳＯＩ（Ｓｉｌｉｃｏｎｏｎｉｎｓｕｌａｔｏｒ）構造の半導体装置およびその製造方法

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WO2009054115A1 true WO2009054115A1 (ja) 2009-04-30

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US (1) US8410573B2 (ja)
EP (2) EP2800138A1 (ja)
JP (1) JP5499455B2 (ja)
CN (2) CN102637699B (ja)
WO (1) WO2009054115A1 (ja)

Cited By (2)

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US20130134518A1 (en) * 2011-11-28 2013-05-30 International Business Machines Corporation Noble gas implantation region in top silicon layer of semiconductor-on-insulator substrate
CN103943547A (zh) * 2013-01-23 2014-07-23 中国科学院上海微系统与信息技术研究所 基于增强吸附来制备绝缘体上材料的方法

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JP2010258083A (ja) * 2009-04-22 2010-11-11 Panasonic Corp Ｓｏｉウェーハ、その製造方法および半導体装置の製造方法
US8664746B2 (en) * 2011-09-20 2014-03-04 Stmicroelectronics Pte. Ltd. Gettering method for dielectrically isolated devices
JP6098327B2 (ja) * 2013-04-18 2017-03-22 株式会社デンソー 半導体装置
US10431684B2 (en) * 2016-04-22 2019-10-01 Texas Instruments Incorporated Method for improving transistor performance
EP3685443A4 (en) * 2017-09-18 2021-04-21 INTEL Corporation STRESS THIN LAYER TRANSISTORS

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JPH02260428A (ja) 1989-03-31 1990-10-23 Hitachi Ltd 半導体基板及び半導体装置
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US20100264510A1 (en) 2010-10-21
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EP2207194A4 (en) 2013-01-23
JP2009124116A (ja) 2009-06-04

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