WO2009054115A1 - SOI(Silicon on insulator)構造の半導体装置およびその製造方法 - Google Patents
SOI(Silicon on insulator)構造の半導体装置およびその製造方法 Download PDFInfo
- Publication number
- WO2009054115A1 WO2009054115A1 PCT/JP2008/002964 JP2008002964W WO2009054115A1 WO 2009054115 A1 WO2009054115 A1 WO 2009054115A1 JP 2008002964 W JP2008002964 W JP 2008002964W WO 2009054115 A1 WO2009054115 A1 WO 2009054115A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- soi
- semiconductor device
- lattice distortion
- silicon
- insulator
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title abstract 2
- 229910052710 silicon Inorganic materials 0.000 title abstract 2
- 239000010703 silicon Substances 0.000 title abstract 2
- 239000012212 insulator Substances 0.000 title 1
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000005247 gettering Methods 0.000 abstract 2
- 150000002500 ions Chemical class 0.000 abstract 2
- 239000000758 substrate Substances 0.000 abstract 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract 1
Classifications
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78609—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device for preventing leakage current
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- H—ELECTRICITY
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
- H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
- H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
- H01L21/3223—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering using cavities formed by hydrogen or noble gas ion implantation
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
- H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
- H01L21/3226—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering of silicon on insulator
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76256—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques using silicon etch back techniques, e.g. BESOI, ELTRAN
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
- H01L21/76283—Lateral isolation by refilling of trenches with dielectric material
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
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- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/30—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by physical imperfections; having polished or roughened surface
- H01L29/32—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by physical imperfections; having polished or roughened surface the imperfections being within the semiconductor body
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7842—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate
- H01L29/7849—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate the means being provided under the channel
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78603—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the insulating substrate or support
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- Power Engineering (AREA)
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- High Energy & Nuclear Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Thin Film Transistor (AREA)
- Element Separation (AREA)
- Weting (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
SOI基板100を用いたSOI構造の半導体装置において、活性層3となるシリコン基板に対してArイオンを注入することにより格子歪み層4を形成する。これにより、格子歪み層4をゲッタリングサイトとして機能させることが可能となる。また、Arイオンのドーズ量を調整し、格子歪み層4の引張り応力が11MPa以上かつ27MPa以下となるようにする。これにより、ゲッタリングサイトとして機能させつつ、リーク電流の発生を抑制することが可能となる。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2008801125346A CN101836281B (zh) | 2007-10-22 | 2008-10-20 | Soi(绝缘体上硅)结构的半导体装置及其制造方法 |
EP08841352A EP2207194A4 (en) | 2007-10-22 | 2008-10-20 | SOI STRUCTURE SEMICONDUCTOR DEVICE (Silicon on Insulator), AND METHOD FOR MANUFACTURING THE SAME |
US12/734,240 US8410573B2 (en) | 2007-10-22 | 2008-10-20 | SOI (silicon on insulator) structure semiconductor device and method of manufacturing the same |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007-273813 | 2007-10-22 | ||
JP2007273813 | 2007-10-22 | ||
JP2008-261781 | 2008-10-08 | ||
JP2008261781A JP5499455B2 (ja) | 2007-10-22 | 2008-10-08 | SOI(Silicononinsulator)構造の半導体装置およびその製造方法 |
Publications (1)
Publication Number | Publication Date |
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WO2009054115A1 true WO2009054115A1 (ja) | 2009-04-30 |
Family
ID=40579224
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2008/002964 WO2009054115A1 (ja) | 2007-10-22 | 2008-10-20 | SOI(Silicon on insulator)構造の半導体装置およびその製造方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US8410573B2 (ja) |
EP (2) | EP2800138A1 (ja) |
JP (1) | JP5499455B2 (ja) |
CN (2) | CN102637699B (ja) |
WO (1) | WO2009054115A1 (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20130134518A1 (en) * | 2011-11-28 | 2013-05-30 | International Business Machines Corporation | Noble gas implantation region in top silicon layer of semiconductor-on-insulator substrate |
CN103943547A (zh) * | 2013-01-23 | 2014-07-23 | 中国科学院上海微系统与信息技术研究所 | 基于增强吸附来制备绝缘体上材料的方法 |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2010258083A (ja) * | 2009-04-22 | 2010-11-11 | Panasonic Corp | Soiウェーハ、その製造方法および半導体装置の製造方法 |
US8664746B2 (en) * | 2011-09-20 | 2014-03-04 | Stmicroelectronics Pte. Ltd. | Gettering method for dielectrically isolated devices |
JP6098327B2 (ja) * | 2013-04-18 | 2017-03-22 | 株式会社デンソー | 半導体装置 |
US10431684B2 (en) * | 2016-04-22 | 2019-10-01 | Texas Instruments Incorporated | Method for improving transistor performance |
EP3685443A4 (en) * | 2017-09-18 | 2021-04-21 | INTEL Corporation | STRESS THIN LAYER TRANSISTORS |
Citations (7)
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JPH02260428A (ja) | 1989-03-31 | 1990-10-23 | Hitachi Ltd | 半導体基板及び半導体装置 |
JPH0818054A (ja) * | 1994-04-28 | 1996-01-19 | Nippondenso Co Ltd | 半導体装置及びその製造方法 |
JPH0878644A (ja) * | 1994-09-02 | 1996-03-22 | Hitachi Ltd | 半導体集積回路装置の製造方法 |
JP2908150B2 (ja) | 1992-11-27 | 1999-06-21 | 日本電気株式会社 | Soi基板構造及びその製造方法 |
JP2000315736A (ja) * | 1999-03-04 | 2000-11-14 | Fuji Electric Co Ltd | 半導体装置およびその製造方法 |
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JP3484961B2 (ja) | 1997-12-26 | 2004-01-06 | 三菱住友シリコン株式会社 | Soi基板の製造方法 |
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JP3542189B2 (ja) * | 1995-03-08 | 2004-07-14 | 株式会社ルネサステクノロジ | 半導体装置の製造方法及び半導体装置 |
JP3612144B2 (ja) * | 1996-06-04 | 2005-01-19 | 株式会社ルネサステクノロジ | 半導体装置の製造方法 |
JPH1032209A (ja) * | 1996-07-17 | 1998-02-03 | Hitachi Ltd | Soiウエハおよびその製造方法ならびにそのsoiウエハを用いた半導体集積回路装置 |
JPH1117000A (ja) * | 1997-06-27 | 1999-01-22 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
JPH1167778A (ja) * | 1997-08-19 | 1999-03-09 | Sumitomo Metal Ind Ltd | Soi半導体ウエーハの製造方法 |
US6255195B1 (en) * | 1999-02-22 | 2001-07-03 | Intersil Corporation | Method for forming a bonded substrate containing a planar intrinsic gettering zone and substrate formed by said method |
US7119365B2 (en) * | 2002-03-26 | 2006-10-10 | Sharp Kabushiki Kaisha | Semiconductor device and manufacturing method thereof, SOI substrate and display device using the same, and manufacturing method of the SOI substrate |
JP4115283B2 (ja) * | 2003-01-07 | 2008-07-09 | シャープ株式会社 | 半導体装置およびその製造方法 |
DE102004021113B4 (de) * | 2004-04-29 | 2006-04-20 | Siltronic Ag | SOI-Scheibe und Verfahren zu ihrer Herstellung |
JP2006134925A (ja) | 2004-11-02 | 2006-05-25 | Nec Electronics Corp | Soi基板及びその製造方法 |
KR100632463B1 (ko) * | 2005-02-07 | 2006-10-11 | 삼성전자주식회사 | 에피택셜 반도체 기판의 제조 방법과 이를 이용한 이미지센서의 제조 방법, 에피택셜 반도체 기판 및 이를 이용한이미지 센서 |
JP2007095951A (ja) | 2005-09-28 | 2007-04-12 | Denso Corp | 半導体基板およびその製造方法 |
JP2007157935A (ja) | 2005-12-02 | 2007-06-21 | Denso Corp | 半導体装置およびその製造方法 |
KR101340004B1 (ko) * | 2006-04-24 | 2013-12-11 | 신에쯔 한도타이 가부시키가이샤 | Soi 웨이퍼의 제조방법 |
JP5532527B2 (ja) | 2006-08-03 | 2014-06-25 | 株式会社デンソー | Soi基板およびその製造方法 |
JP5248838B2 (ja) * | 2007-10-25 | 2013-07-31 | 信越化学工業株式会社 | 半導体基板の製造方法 |
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2008
- 2008-10-08 JP JP2008261781A patent/JP5499455B2/ja not_active Expired - Fee Related
- 2008-10-20 CN CN201210109975.9A patent/CN102637699B/zh not_active Expired - Fee Related
- 2008-10-20 EP EP14167851.6A patent/EP2800138A1/en active Pending
- 2008-10-20 CN CN2008801125346A patent/CN101836281B/zh not_active Expired - Fee Related
- 2008-10-20 US US12/734,240 patent/US8410573B2/en active Active
- 2008-10-20 EP EP08841352A patent/EP2207194A4/en not_active Ceased
- 2008-10-20 WO PCT/JP2008/002964 patent/WO2009054115A1/ja active Application Filing
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
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Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
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US20130134518A1 (en) * | 2011-11-28 | 2013-05-30 | International Business Machines Corporation | Noble gas implantation region in top silicon layer of semiconductor-on-insulator substrate |
US8748285B2 (en) * | 2011-11-28 | 2014-06-10 | International Business Machines Corporation | Noble gas implantation region in top silicon layer of semiconductor-on-insulator substrate |
CN103943547A (zh) * | 2013-01-23 | 2014-07-23 | 中国科学院上海微系统与信息技术研究所 | 基于增强吸附来制备绝缘体上材料的方法 |
WO2014114029A1 (zh) * | 2013-01-23 | 2014-07-31 | 中国科学院上海微系统与信息技术研究所 | 基于增强吸附来制备绝缘体上材料的方法 |
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US8410573B2 (en) | 2013-04-02 |
CN101836281B (zh) | 2012-05-30 |
EP2800138A1 (en) | 2014-11-05 |
JP5499455B2 (ja) | 2014-05-21 |
US20100264510A1 (en) | 2010-10-21 |
CN102637699B (zh) | 2016-01-06 |
CN102637699A (zh) | 2012-08-15 |
CN101836281A (zh) | 2010-09-15 |
EP2207194A1 (en) | 2010-07-14 |
EP2207194A4 (en) | 2013-01-23 |
JP2009124116A (ja) | 2009-06-04 |
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