JP2009111375A - 半導体装置の作製方法 - Google Patents
半導体装置の作製方法 Download PDFInfo
- Publication number
- JP2009111375A JP2009111375A JP2008262641A JP2008262641A JP2009111375A JP 2009111375 A JP2009111375 A JP 2009111375A JP 2008262641 A JP2008262641 A JP 2008262641A JP 2008262641 A JP2008262641 A JP 2008262641A JP 2009111375 A JP2009111375 A JP 2009111375A
- Authority
- JP
- Japan
- Prior art keywords
- film
- substrate
- insulating film
- bond substrate
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
- H10D86/021—Manufacture or treatment of multiple TFTs
- H10D86/0214—Manufacture or treatment of multiple TFTs using temporary substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
- H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
- H10D30/0323—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon comprising monocrystalline silicon
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Thin Film Transistor (AREA)
- Recrystallisation Techniques (AREA)
- Liquid Crystal (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2008262641A JP2009111375A (ja) | 2007-10-10 | 2008-10-09 | 半導体装置の作製方法 |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007264051 | 2007-10-10 | ||
| JP2008262641A JP2009111375A (ja) | 2007-10-10 | 2008-10-09 | 半導体装置の作製方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2009111375A true JP2009111375A (ja) | 2009-05-21 |
| JP2009111375A5 JP2009111375A5 (enExample) | 2011-11-04 |
Family
ID=40534650
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2008262641A Withdrawn JP2009111375A (ja) | 2007-10-10 | 2008-10-09 | 半導体装置の作製方法 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US8101501B2 (enExample) |
| JP (1) | JP2009111375A (enExample) |
| KR (1) | KR101498576B1 (enExample) |
| CN (1) | CN101409214B (enExample) |
| TW (1) | TWI453803B (enExample) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012019125A (ja) * | 2010-07-09 | 2012-01-26 | Semiconductor Energy Lab Co Ltd | 半導体基板の作製方法、及び半導体装置の作製方法 |
| CN102593285A (zh) * | 2012-03-06 | 2012-07-18 | 华灿光电股份有限公司 | 一种回收图形化蓝宝石衬底的方法 |
| JP2016012729A (ja) * | 2009-06-26 | 2016-01-21 | 株式会社半導体エネルギー研究所 | 半導体装置 |
| JP2022164678A (ja) * | 2017-08-04 | 2022-10-27 | 株式会社半導体エネルギー研究所 | 半導体装置 |
Families Citing this family (23)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2008132904A1 (en) * | 2007-04-13 | 2008-11-06 | Semiconductor Energy Laboratory Co., Ltd. | Photovoltaic device and method for manufacturing the same |
| SG163481A1 (en) * | 2009-01-21 | 2010-08-30 | Semiconductor Energy Lab | Method for manufacturing soi substrate and semiconductor device |
| WO2011017179A2 (en) | 2009-07-28 | 2011-02-10 | Gigasi Solar, Inc. | Systems, methods and materials including crystallization of substrates via sub-melt laser anneal, as well as products produced by such processes |
| EP2282332B1 (en) | 2009-08-04 | 2012-06-27 | S.O.I. TEC Silicon | Method for fabricating a semiconductor substrate |
| JP5713603B2 (ja) * | 2009-09-02 | 2015-05-07 | 株式会社半導体エネルギー研究所 | Soi基板の作製方法 |
| TWI426565B (zh) * | 2009-10-15 | 2014-02-11 | Au Optronics Corp | 顯示面板及薄膜電晶體之閘極絕緣層的重工方法 |
| KR101915251B1 (ko) | 2009-10-16 | 2018-11-06 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치 |
| US20110165721A1 (en) * | 2009-11-25 | 2011-07-07 | Venkatraman Prabhakar | Systems, methods and products including features of laser irradiation and/or cleaving of silicon with other substrates or layers |
| TWI451474B (zh) * | 2009-12-14 | 2014-09-01 | Tien Hsi Lee | 一種製作可轉移性晶體薄膜的方法 |
| KR102198144B1 (ko) * | 2009-12-28 | 2021-01-04 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 기억 장치와 반도체 장치 |
| US8735263B2 (en) | 2011-01-21 | 2014-05-27 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing SOI substrate |
| JP5839804B2 (ja) * | 2011-01-25 | 2016-01-06 | 国立大学法人東北大学 | 半導体装置の製造方法、および半導体装置 |
| CN103329247B (zh) | 2011-01-25 | 2018-07-31 | Ev 集团 E·索尔纳有限责任公司 | 用于永久接合晶片的方法 |
| US8975158B2 (en) | 2011-04-08 | 2015-03-10 | Ev Group E. Thallner Gmbh | Method for permanently bonding wafers |
| SG192180A1 (en) | 2011-04-08 | 2013-08-30 | Ev Group E Thallner Gmbh | Method for permanent bonding of wafer |
| FR2995445B1 (fr) * | 2012-09-07 | 2016-01-08 | Soitec Silicon On Insulator | Procede de fabrication d'une structure en vue d'une separation ulterieure |
| JP6393574B2 (ja) | 2014-10-09 | 2018-09-19 | 東京エレクトロン株式会社 | エッチング方法 |
| US9870940B2 (en) | 2015-08-03 | 2018-01-16 | Samsung Electronics Co., Ltd. | Methods of forming nanosheets on lattice mismatched substrates |
| JP6737066B2 (ja) * | 2016-08-22 | 2020-08-05 | 株式会社Sumco | エピタキシャルシリコンウェーハの製造方法、エピタキシャルシリコンウェーハ、及び固体撮像素子の製造方法 |
| CN106449689A (zh) * | 2016-11-11 | 2017-02-22 | 中国电子科技集团公司第四十四研究所 | 带聚酰亚胺垫层的帧转移可见光ccd |
| JP6810578B2 (ja) * | 2016-11-18 | 2021-01-06 | 株式会社Screenホールディングス | ドーパント導入方法および熱処理方法 |
| FR3077923B1 (fr) * | 2018-02-12 | 2021-07-16 | Soitec Silicon On Insulator | Procede de fabrication d'une structure de type semi-conducteur sur isolant par transfert de couche |
| JP7123182B2 (ja) * | 2018-06-08 | 2022-08-22 | グローバルウェーハズ カンパニー リミテッド | シリコン箔層の移転方法 |
Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03265136A (ja) * | 1990-03-15 | 1991-11-26 | Fujitsu Ltd | 半導体基板のドライ洗浄方法 |
| JPH1197379A (ja) * | 1997-07-25 | 1999-04-09 | Denso Corp | 半導体基板及び半導体基板の製造方法 |
| JPH11233449A (ja) * | 1998-02-13 | 1999-08-27 | Denso Corp | 半導体基板の製造方法 |
| JP2000012285A (ja) * | 1998-06-26 | 2000-01-14 | Nissin Electric Co Ltd | パルスバイアス水素負イオン注入方法及び注入装置 |
| JP2000077287A (ja) * | 1998-08-26 | 2000-03-14 | Nissin Electric Co Ltd | 結晶薄膜基板の製造方法 |
| JP2000331899A (ja) * | 1999-05-21 | 2000-11-30 | Shin Etsu Handotai Co Ltd | Soiウェーハの製造方法およびsoiウェーハ |
| WO2001048825A1 (en) * | 1999-12-24 | 2001-07-05 | Shin-Etsu Handotai Co., Ltd. | Method for manufacturing bonded wafer |
| JP2001203340A (ja) * | 2000-01-21 | 2001-07-27 | Nissin Electric Co Ltd | シリコン系結晶薄膜の形成方法 |
| WO2007014320A2 (en) * | 2005-07-27 | 2007-02-01 | Silicon Genesis Corporation | Method and structure for fabricating multiple tile regions onto a plate using a controlled cleaving process |
Family Cites Families (39)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2681472B1 (fr) * | 1991-09-18 | 1993-10-29 | Commissariat Energie Atomique | Procede de fabrication de films minces de materiau semiconducteur. |
| DE69333152T2 (de) * | 1992-01-30 | 2004-05-27 | Canon K.K. | Verfahren zur Herstellung eines Halbleitersubstrates |
| JPH07263721A (ja) * | 1994-03-25 | 1995-10-13 | Nippondenso Co Ltd | 半導体装置及びその製造方法 |
| JP4103968B2 (ja) * | 1996-09-18 | 2008-06-18 | 株式会社半導体エネルギー研究所 | 絶縁ゲイト型半導体装置 |
| US6191007B1 (en) * | 1997-04-28 | 2001-02-20 | Denso Corporation | Method for manufacturing a semiconductor substrate |
| US6534380B1 (en) * | 1997-07-18 | 2003-03-18 | Denso Corporation | Semiconductor substrate and method of manufacturing the same |
| US6388652B1 (en) * | 1997-08-20 | 2002-05-14 | Semiconductor Energy Laboratory Co., Ltd. | Electrooptical device |
| US6686623B2 (en) * | 1997-11-18 | 2004-02-03 | Semiconductor Energy Laboratory Co., Ltd. | Nonvolatile memory and electronic apparatus |
| JPH11163363A (ja) | 1997-11-22 | 1999-06-18 | Semiconductor Energy Lab Co Ltd | 半導体装置およびその作製方法 |
| FR2773261B1 (fr) * | 1997-12-30 | 2000-01-28 | Commissariat Energie Atomique | Procede pour le transfert d'un film mince comportant une etape de creation d'inclusions |
| JP2000012864A (ja) * | 1998-06-22 | 2000-01-14 | Semiconductor Energy Lab Co Ltd | 半導体装置の作製方法 |
| US6271101B1 (en) * | 1998-07-29 | 2001-08-07 | Semiconductor Energy Laboratory Co., Ltd. | Process for production of SOI substrate and process for production of semiconductor device |
| JP4476390B2 (ja) * | 1998-09-04 | 2010-06-09 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
| JP2000124092A (ja) | 1998-10-16 | 2000-04-28 | Shin Etsu Handotai Co Ltd | 水素イオン注入剥離法によってsoiウエーハを製造する方法およびこの方法で製造されたsoiウエーハ |
| US6255195B1 (en) * | 1999-02-22 | 2001-07-03 | Intersil Corporation | Method for forming a bonded substrate containing a planar intrinsic gettering zone and substrate formed by said method |
| US6468923B1 (en) * | 1999-03-26 | 2002-10-22 | Canon Kabushiki Kaisha | Method of producing semiconductor member |
| US6653209B1 (en) * | 1999-09-30 | 2003-11-25 | Canon Kabushiki Kaisha | Method of producing silicon thin film, method of constructing SOI substrate and semiconductor device |
| JP2001168308A (ja) | 1999-09-30 | 2001-06-22 | Canon Inc | シリコン薄膜の製造方法、soi基板の作製方法及び半導体装置 |
| JP3943782B2 (ja) * | 1999-11-29 | 2007-07-11 | 信越半導体株式会社 | 剥離ウエーハの再生処理方法及び再生処理された剥離ウエーハ |
| JP2001196566A (ja) * | 2000-01-07 | 2001-07-19 | Sony Corp | 半導体基板およびその製造方法 |
| US6900113B2 (en) * | 2000-05-30 | 2005-05-31 | Shin-Etsu Handotai Co., Ltd. | Method for producing bonded wafer and bonded wafer |
| JP4526818B2 (ja) * | 2001-07-17 | 2010-08-18 | 信越半導体株式会社 | 貼り合わせウエーハの製造方法 |
| US7119365B2 (en) * | 2002-03-26 | 2006-10-10 | Sharp Kabushiki Kaisha | Semiconductor device and manufacturing method thereof, SOI substrate and display device using the same, and manufacturing method of the SOI substrate |
| JP4772258B2 (ja) | 2002-08-23 | 2011-09-14 | シャープ株式会社 | Soi基板の製造方法 |
| JP2004063730A (ja) * | 2002-07-29 | 2004-02-26 | Shin Etsu Handotai Co Ltd | Soiウェーハの製造方法 |
| US6995427B2 (en) * | 2003-01-29 | 2006-02-07 | S.O.I.Tec Silicon On Insulator Technologies S.A. | Semiconductor structure for providing strained crystalline layer on insulator and method for fabricating same |
| KR101142138B1 (ko) * | 2003-09-10 | 2012-05-10 | 신에쯔 한도타이 가부시키가이샤 | 적층기판의 세척방법, 기판의 접합방법 및 접합 웨이퍼의제조방법 |
| US7071122B2 (en) * | 2003-12-10 | 2006-07-04 | International Business Machines Corporation | Field effect transistor with etched-back gate dielectric |
| JP4828230B2 (ja) * | 2004-01-30 | 2011-11-30 | 株式会社Sumco | Soiウェーハの製造方法 |
| JP4626175B2 (ja) * | 2004-04-09 | 2011-02-02 | 株式会社Sumco | Soi基板の製造方法 |
| JP4730581B2 (ja) | 2004-06-17 | 2011-07-20 | 信越半導体株式会社 | 貼り合わせウェーハの製造方法 |
| DE102004030612B3 (de) * | 2004-06-24 | 2006-04-20 | Siltronic Ag | Halbleitersubstrat und Verfahren zu dessen Herstellung |
| US6893936B1 (en) * | 2004-06-29 | 2005-05-17 | International Business Machines Corporation | Method of Forming strained SI/SIGE on insulator with silicon germanium buffer |
| US7279400B2 (en) * | 2004-08-05 | 2007-10-09 | Sharp Laboratories Of America, Inc. | Method of fabricating single-layer and multi-layer single crystalline silicon and silicon devices on plastic using sacrificial glass |
| US7276430B2 (en) * | 2004-12-14 | 2007-10-02 | Electronics And Telecommunications Research Institute | Manufacturing method of silicon on insulator wafer |
| JP2006303089A (ja) * | 2005-04-19 | 2006-11-02 | Sumco Corp | シリコン基板の洗浄方法 |
| FR2896619B1 (fr) * | 2006-01-23 | 2008-05-23 | Soitec Silicon On Insulator | Procede de fabrication d'un substrat composite a proprietes electriques ameliorees |
| FR2911430B1 (fr) * | 2007-01-15 | 2009-04-17 | Soitec Silicon On Insulator | "procede de fabrication d'un substrat hybride" |
| KR101443580B1 (ko) * | 2007-05-11 | 2014-10-30 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Soi구조를 갖는 기판 |
-
2008
- 2008-09-29 US US12/240,186 patent/US8101501B2/en not_active Expired - Fee Related
- 2008-10-06 TW TW097138415A patent/TWI453803B/zh not_active IP Right Cessation
- 2008-10-07 KR KR1020080098043A patent/KR101498576B1/ko not_active Expired - Fee Related
- 2008-10-09 JP JP2008262641A patent/JP2009111375A/ja not_active Withdrawn
- 2008-10-09 CN CN2008101665153A patent/CN101409214B/zh not_active Expired - Fee Related
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03265136A (ja) * | 1990-03-15 | 1991-11-26 | Fujitsu Ltd | 半導体基板のドライ洗浄方法 |
| JPH1197379A (ja) * | 1997-07-25 | 1999-04-09 | Denso Corp | 半導体基板及び半導体基板の製造方法 |
| JPH11233449A (ja) * | 1998-02-13 | 1999-08-27 | Denso Corp | 半導体基板の製造方法 |
| JP2000012285A (ja) * | 1998-06-26 | 2000-01-14 | Nissin Electric Co Ltd | パルスバイアス水素負イオン注入方法及び注入装置 |
| JP2000077287A (ja) * | 1998-08-26 | 2000-03-14 | Nissin Electric Co Ltd | 結晶薄膜基板の製造方法 |
| JP2000331899A (ja) * | 1999-05-21 | 2000-11-30 | Shin Etsu Handotai Co Ltd | Soiウェーハの製造方法およびsoiウェーハ |
| WO2001048825A1 (en) * | 1999-12-24 | 2001-07-05 | Shin-Etsu Handotai Co., Ltd. | Method for manufacturing bonded wafer |
| JP2001203340A (ja) * | 2000-01-21 | 2001-07-27 | Nissin Electric Co Ltd | シリコン系結晶薄膜の形成方法 |
| WO2007014320A2 (en) * | 2005-07-27 | 2007-02-01 | Silicon Genesis Corporation | Method and structure for fabricating multiple tile regions onto a plate using a controlled cleaving process |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2016012729A (ja) * | 2009-06-26 | 2016-01-21 | 株式会社半導体エネルギー研究所 | 半導体装置 |
| JP2012019125A (ja) * | 2010-07-09 | 2012-01-26 | Semiconductor Energy Lab Co Ltd | 半導体基板の作製方法、及び半導体装置の作製方法 |
| CN102593285A (zh) * | 2012-03-06 | 2012-07-18 | 华灿光电股份有限公司 | 一种回收图形化蓝宝石衬底的方法 |
| CN102593285B (zh) * | 2012-03-06 | 2014-07-09 | 华灿光电股份有限公司 | 一种回收图形化蓝宝石衬底的方法 |
| JP2022164678A (ja) * | 2017-08-04 | 2022-10-27 | 株式会社半導体エネルギー研究所 | 半導体装置 |
| US12243447B2 (en) | 2017-08-04 | 2025-03-04 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and display device |
Also Published As
| Publication number | Publication date |
|---|---|
| TW200931503A (en) | 2009-07-16 |
| US20090098709A1 (en) | 2009-04-16 |
| CN101409214A (zh) | 2009-04-15 |
| US8101501B2 (en) | 2012-01-24 |
| CN101409214B (zh) | 2012-11-14 |
| KR20090037312A (ko) | 2009-04-15 |
| KR101498576B1 (ko) | 2015-03-04 |
| TWI453803B (zh) | 2014-09-21 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US8101501B2 (en) | Method of manufacturing semiconductor device | |
| JP5250228B2 (ja) | 半導体装置の作製方法 | |
| JP5619474B2 (ja) | Soi基板の作製方法 | |
| JP5523693B2 (ja) | 半導体基板の作製方法 | |
| US8772128B2 (en) | Method for manufacturing semiconductor device | |
| US8318587B2 (en) | Method for manufacturing semiconductor device | |
| US7851332B2 (en) | Semiconductor device and method for manufacturing the same | |
| US20090142905A1 (en) | Method for manufacturing soi substrate | |
| US20100022070A1 (en) | Method for manufacturing soi substrate | |
| US7829396B2 (en) | Manufacturing method of semiconductor device and manufacturing apparatus of the same | |
| US7816234B2 (en) | Method for manufacturing semiconductor device | |
| JP2009071287A (ja) | 半導体装置の作製方法および製造装置 | |
| US8415228B2 (en) | Manufacturing method of SOI substrate and semiconductor device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20110914 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20110914 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20130827 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20130829 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20130913 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20140218 |
|
| A761 | Written withdrawal of application |
Free format text: JAPANESE INTERMEDIATE CODE: A761 Effective date: 20140414 |