TWI453803B - 半導體裝置的製造方法 - Google Patents

半導體裝置的製造方法 Download PDF

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Publication number
TWI453803B
TWI453803B TW097138415A TW97138415A TWI453803B TW I453803 B TWI453803 B TW I453803B TW 097138415 A TW097138415 A TW 097138415A TW 97138415 A TW97138415 A TW 97138415A TW I453803 B TWI453803 B TW I453803B
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TW
Taiwan
Prior art keywords
substrate
film
insulating film
semiconductor
bonding
Prior art date
Application number
TW097138415A
Other languages
English (en)
Chinese (zh)
Other versions
TW200931503A (en
Inventor
大沼英人
飯窪陽一
山崎舜平
Original Assignee
半導體能源研究所股份有限公司
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Publication date
Application filed by 半導體能源研究所股份有限公司 filed Critical 半導體能源研究所股份有限公司
Publication of TW200931503A publication Critical patent/TW200931503A/zh
Application granted granted Critical
Publication of TWI453803B publication Critical patent/TWI453803B/zh

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H10D86/021—Manufacture or treatment of multiple TFTs
    • H10D86/0214—Manufacture or treatment of multiple TFTs using temporary substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H10P90/1916—Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
    • H10D30/0323—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon comprising monocrystalline silicon

Landscapes

  • Thin Film Transistor (AREA)
  • Recrystallisation Techniques (AREA)
  • Liquid Crystal (AREA)
TW097138415A 2007-10-10 2008-10-06 半導體裝置的製造方法 TWI453803B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007264051 2007-10-10

Publications (2)

Publication Number Publication Date
TW200931503A TW200931503A (en) 2009-07-16
TWI453803B true TWI453803B (zh) 2014-09-21

Family

ID=40534650

Family Applications (1)

Application Number Title Priority Date Filing Date
TW097138415A TWI453803B (zh) 2007-10-10 2008-10-06 半導體裝置的製造方法

Country Status (5)

Country Link
US (1) US8101501B2 (enExample)
JP (1) JP2009111375A (enExample)
KR (1) KR101498576B1 (enExample)
CN (1) CN101409214B (enExample)
TW (1) TWI453803B (enExample)

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US8361890B2 (en) 2009-07-28 2013-01-29 Gigasi Solar, Inc. Systems, methods and materials including crystallization of substrates via sub-melt laser anneal, as well as products produced by such processes
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JP5713603B2 (ja) * 2009-09-02 2015-05-07 株式会社半導体エネルギー研究所 Ｓｏｉ基板の作製方法
TWI426565B (zh) * 2009-10-15 2014-02-11 友達光電股份有限公司 顯示面板及薄膜電晶體之閘極絕緣層的重工方法
KR101772639B1 (ko) * 2009-10-16 2017-08-29 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
WO2011066485A2 (en) * 2009-11-25 2011-06-03 Gigasi Solar, Inc. Systems, methods and products including features of laser irradiation and/or cleaving of silicon with other substrates or layers
TWI451474B (zh) * 2009-12-14 2014-09-01 李天錫 一種製作可轉移性晶體薄膜的方法
KR102878874B1 (ko) * 2009-12-28 2025-10-29 가부시키가이샤 한도오따이 에네루기 켄큐쇼 기억 장치와 반도체 장치
JP5618656B2 (ja) * 2010-07-09 2014-11-05 株式会社半導体エネルギー研究所 半導体基板の作製方法
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WO2012136267A1 (de) 2011-04-08 2012-10-11 Ev Group E. Thallner Gmbh Verfahren zum permanenten bonden von wafern
CN102593285B (zh) * 2012-03-06 2014-07-09 华灿光电股份有限公司 一种回收图形化蓝宝石衬底的方法
FR2995445B1 (fr) * 2012-09-07 2016-01-08 Soitec Silicon On Insulator Procede de fabrication d'une structure en vue d'une separation ulterieure
JP6393574B2 (ja) * 2014-10-09 2018-09-19 東京エレクトロン株式会社 エッチング方法
US9870940B2 (en) 2015-08-03 2018-01-16 Samsung Electronics Co., Ltd. Methods of forming nanosheets on lattice mismatched substrates
JP6737066B2 (ja) * 2016-08-22 2020-08-05 株式会社Sumco エピタキシャルシリコンウェーハの製造方法、エピタキシャルシリコンウェーハ、及び固体撮像素子の製造方法
CN106449689A (zh) * 2016-11-11 2017-02-22 中国电子科技集团公司第四十四研究所 带聚酰亚胺垫层的帧转移可见光ccd
JP6810578B2 (ja) * 2016-11-18 2021-01-06 株式会社Ｓｃｒｅｅｎホールディングス ドーパント導入方法および熱処理方法
JP7118973B2 (ja) * 2017-08-04 2022-08-16 株式会社半導体エネルギー研究所 半導体装置
FR3077923B1 (fr) * 2018-02-12 2021-07-16 Soitec Silicon On Insulator Procede de fabrication d'une structure de type semi-conducteur sur isolant par transfert de couche
CN112262467B (zh) * 2018-06-08 2024-08-09 环球晶圆股份有限公司 将硅薄层移转的方法

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Patent Citations (1)

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Also Published As

Publication number Publication date
US20090098709A1 (en) 2009-04-16
CN101409214B (zh) 2012-11-14
TW200931503A (en) 2009-07-16
JP2009111375A (ja) 2009-05-21
CN101409214A (zh) 2009-04-15
KR101498576B1 (ko) 2015-03-04
US8101501B2 (en) 2012-01-24
KR20090037312A (ko) 2009-04-15

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