JP2007515079A5 - - Google Patents

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Publication number
JP2007515079A5
JP2007515079A5 JP2006545755A JP2006545755A JP2007515079A5 JP 2007515079 A5 JP2007515079 A5 JP 2007515079A5 JP 2006545755 A JP2006545755 A JP 2006545755A JP 2006545755 A JP2006545755 A JP 2006545755A JP 2007515079 A5 JP2007515079 A5 JP 2007515079A5
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Japan
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region
grooves
manufacturing
semiconductor device
doped region
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JP2006545755A
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Japanese (ja)
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JP2007515079A (ja
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Priority claimed from PCT/US2004/041302 external-priority patent/WO2005065140A2/en
Publication of JP2007515079A publication Critical patent/JP2007515079A/ja
Publication of JP2007515079A5 publication Critical patent/JP2007515079A5/ja
Pending legal-status Critical Current

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JP2006545755A 2003-12-19 2004-12-10 従来の端子を備えた超接合装置の製造方法 Pending JP2007515079A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US53150103P 2003-12-19 2003-12-19
PCT/US2004/041302 WO2005065140A2 (en) 2003-12-19 2004-12-10 Method of manufacturing a superjunction device with conventional terminations

Related Child Applications (1)

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JP2008227992A Division JP5154347B2 (ja) 2003-12-19 2008-09-05 超接合半導体ディバイスおよび超接合半導体ディバイスの製造方法

Publications (2)

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JP2007515079A JP2007515079A (ja) 2007-06-07
JP2007515079A5 true JP2007515079A5 (enExample) 2008-10-23

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JP2006545755A Pending JP2007515079A (ja) 2003-12-19 2004-12-10 従来の端子を備えた超接合装置の製造方法
JP2008227992A Expired - Fee Related JP5154347B2 (ja) 2003-12-19 2008-09-05 超接合半導体ディバイスおよび超接合半導体ディバイスの製造方法

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JP2008227992A Expired - Fee Related JP5154347B2 (ja) 2003-12-19 2008-09-05 超接合半導体ディバイスおよび超接合半導体ディバイスの製造方法

Country Status (6)

Country Link
US (2) US7041560B2 (enExample)
EP (1) EP1701686A4 (enExample)
JP (2) JP2007515079A (enExample)
KR (2) KR20080100265A (enExample)
TW (1) TWI368948B (enExample)
WO (1) WO2005065140A2 (enExample)

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