JP2006190962A - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
- Publication number
- JP2006190962A JP2006190962A JP2005235850A JP2005235850A JP2006190962A JP 2006190962 A JP2006190962 A JP 2006190962A JP 2005235850 A JP2005235850 A JP 2005235850A JP 2005235850 A JP2005235850 A JP 2005235850A JP 2006190962 A JP2006190962 A JP 2006190962A
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- Prior art keywords
- insulating film
- interlayer insulating
- porous
- film
- porous interlayer
- Prior art date
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 124
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 70
- 238000010894 electron beam technology Methods 0.000 claims abstract description 99
- 230000001678 irradiating effect Effects 0.000 claims abstract description 75
- 239000000758 substrate Substances 0.000 claims abstract description 68
- 238000010438 heat treatment Methods 0.000 claims description 107
- 238000000034 method Methods 0.000 claims description 105
- 239000000463 material Substances 0.000 claims description 86
- 239000011148 porous material Substances 0.000 claims description 23
- 150000001875 compounds Chemical class 0.000 claims description 19
- 239000002994 raw material Substances 0.000 claims description 15
- 238000001947 vapour-phase growth Methods 0.000 claims description 11
- 239000002904 solvent Substances 0.000 claims description 9
- 238000007740 vapor deposition Methods 0.000 claims description 8
- 238000007669 thermal treatment Methods 0.000 claims description 2
- 238000009413 insulation Methods 0.000 abstract description 24
- 210000002381 plasma Anatomy 0.000 abstract 1
- 230000002265 prevention Effects 0.000 abstract 1
- 239000011229 interlayer Substances 0.000 description 702
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 95
- 239000007789 gas Substances 0.000 description 79
- 230000000052 comparative effect Effects 0.000 description 72
- 239000004020 conductor Substances 0.000 description 58
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 52
- 238000004132 cross linking Methods 0.000 description 39
- 238000001723 curing Methods 0.000 description 37
- 239000010410 layer Substances 0.000 description 36
- 239000000377 silicon dioxide Substances 0.000 description 35
- 238000006243 chemical reaction Methods 0.000 description 33
- 229920002120 photoresistant polymer Polymers 0.000 description 26
- 229910052814 silicon oxide Inorganic materials 0.000 description 25
- 239000002243 precursor Substances 0.000 description 20
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 19
- 239000012159 carrier gas Substances 0.000 description 19
- 238000005259 measurement Methods 0.000 description 19
- 229910052710 silicon Inorganic materials 0.000 description 19
- 239000010703 silicon Substances 0.000 description 19
- 230000001133 acceleration Effects 0.000 description 16
- 238000005530 etching Methods 0.000 description 15
- 230000004888 barrier function Effects 0.000 description 14
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 12
- 238000004528 spin coating Methods 0.000 description 12
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 10
- 229910004298 SiO 2 Inorganic materials 0.000 description 10
- 230000015572 biosynthetic process Effects 0.000 description 10
- 229910052799 carbon Inorganic materials 0.000 description 10
- 238000004544 sputter deposition Methods 0.000 description 10
- 239000006200 vaporizer Substances 0.000 description 10
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 9
- 238000009792 diffusion process Methods 0.000 description 9
- 230000003071 parasitic effect Effects 0.000 description 9
- 238000000151 deposition Methods 0.000 description 8
- 150000002894 organic compounds Chemical class 0.000 description 8
- -1 phenylethyldioxy Chemical group 0.000 description 8
- 238000000206 photolithography Methods 0.000 description 8
- 230000008021 deposition Effects 0.000 description 7
- 238000001227 electron beam curing Methods 0.000 description 7
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 7
- 229910052721 tungsten Inorganic materials 0.000 description 7
- 239000010937 tungsten Substances 0.000 description 7
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 6
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 description 6
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 description 6
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 6
- 229910001882 dioxygen Inorganic materials 0.000 description 6
- 230000009977 dual effect Effects 0.000 description 6
- 238000009713 electroplating Methods 0.000 description 6
- 229910052731 fluorine Inorganic materials 0.000 description 6
- 239000011737 fluorine Substances 0.000 description 6
- 239000001257 hydrogen Substances 0.000 description 6
- 229910052739 hydrogen Inorganic materials 0.000 description 6
- 239000001301 oxygen Substances 0.000 description 6
- 229910052760 oxygen Inorganic materials 0.000 description 6
- 239000011261 inert gas Substances 0.000 description 5
- 125000005372 silanol group Chemical group 0.000 description 5
- PQDJYEQOELDLCP-UHFFFAOYSA-N trimethylsilane Chemical compound C[SiH](C)C PQDJYEQOELDLCP-UHFFFAOYSA-N 0.000 description 5
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 4
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 description 4
- CSNNHWWHGAXBCP-UHFFFAOYSA-L Magnesium sulfate Chemical compound [Mg+2].[O-][S+2]([O-])([O-])[O-] CSNNHWWHGAXBCP-UHFFFAOYSA-L 0.000 description 4
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 4
- 230000032683 aging Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 238000002955 isolation Methods 0.000 description 4
- QSHDDOUJBYECFT-UHFFFAOYSA-N mercury Chemical compound [Hg] QSHDDOUJBYECFT-UHFFFAOYSA-N 0.000 description 4
- 229910052753 mercury Inorganic materials 0.000 description 4
- 125000001997 phenyl group Chemical group [H]C1=C([H])C([H])=C(*)C([H])=C1[H] 0.000 description 4
- 229920000642 polymer Polymers 0.000 description 4
- 239000000243 solution Substances 0.000 description 4
- 230000003595 spectral effect Effects 0.000 description 4
- VDZOOKBUILJEDG-UHFFFAOYSA-M tetrabutylammonium hydroxide Chemical compound [OH-].CCCC[N+](CCCC)(CCCC)CCCC VDZOOKBUILJEDG-UHFFFAOYSA-M 0.000 description 4
- 238000005033 Fourier transform infrared spectroscopy Methods 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- 125000000217 alkyl group Chemical group 0.000 description 3
- 229910052786 argon Inorganic materials 0.000 description 3
- 238000009833 condensation Methods 0.000 description 3
- 230000005494 condensation Effects 0.000 description 3
- 230000018044 dehydration Effects 0.000 description 3
- 238000006297 dehydration reaction Methods 0.000 description 3
- 229910001873 dinitrogen Inorganic materials 0.000 description 3
- KPUWHANPEXNPJT-UHFFFAOYSA-N disiloxane Chemical class [SiH3]O[SiH3] KPUWHANPEXNPJT-UHFFFAOYSA-N 0.000 description 3
- UQEAIHBTYFGYIE-UHFFFAOYSA-N hexamethyldisiloxane Chemical compound C[Si](C)(C)O[Si](C)(C)C UQEAIHBTYFGYIE-UHFFFAOYSA-N 0.000 description 3
- 238000006460 hydrolysis reaction Methods 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 239000000178 monomer Substances 0.000 description 3
- 229910052757 nitrogen Inorganic materials 0.000 description 3
- 238000007254 oxidation reaction Methods 0.000 description 3
- 150000003377 silicon compounds Chemical class 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- 230000035882 stress Effects 0.000 description 3
- CPUDPFPXCZDNGI-UHFFFAOYSA-N triethoxy(methyl)silane Chemical compound CCO[Si](C)(OCC)OCC CPUDPFPXCZDNGI-UHFFFAOYSA-N 0.000 description 3
- 229920000178 Acrylic resin Polymers 0.000 description 2
- 239000004925 Acrylic resin Substances 0.000 description 2
- KAKZBPTYRLMSJV-UHFFFAOYSA-N Butadiene Chemical group C=CC=C KAKZBPTYRLMSJV-UHFFFAOYSA-N 0.000 description 2
- CURLTUGMZLYLDI-UHFFFAOYSA-N Carbon dioxide Chemical compound O=C=O CURLTUGMZLYLDI-UHFFFAOYSA-N 0.000 description 2
- NTIZESTWPVYFNL-UHFFFAOYSA-N Methyl isobutyl ketone Chemical compound CC(C)CC(C)=O NTIZESTWPVYFNL-UHFFFAOYSA-N 0.000 description 2
- UIHCLUNTQKBZGK-UHFFFAOYSA-N Methyl isobutyl ketone Natural products CCC(C)C(C)=O UIHCLUNTQKBZGK-UHFFFAOYSA-N 0.000 description 2
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 description 2
- 229910020177 SiOF Inorganic materials 0.000 description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 2
- 238000000862 absorption spectrum Methods 0.000 description 2
- 229910021529 ammonia Inorganic materials 0.000 description 2
- 239000007864 aqueous solution Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 238000006482 condensation reaction Methods 0.000 description 2
- JHIVVAPYMSGYDF-UHFFFAOYSA-N cyclohexanone Chemical compound O=C1CCCCC1 JHIVVAPYMSGYDF-UHFFFAOYSA-N 0.000 description 2
- 239000002019 doping agent Substances 0.000 description 2
- 239000001307 helium Substances 0.000 description 2
- 229910052734 helium Inorganic materials 0.000 description 2
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 229910052943 magnesium sulfate Inorganic materials 0.000 description 2
- 235000019341 magnesium sulphate Nutrition 0.000 description 2
- VNWKTOKETHGBQD-UHFFFAOYSA-N methane Chemical compound C VNWKTOKETHGBQD-UHFFFAOYSA-N 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 239000005360 phosphosilicate glass Substances 0.000 description 2
- BPSIOYPQMFLKFR-UHFFFAOYSA-N trimethoxy-[3-(oxiran-2-ylmethoxy)propyl]silane Chemical compound CO[Si](OC)(OC)CCCOCC1CO1 BPSIOYPQMFLKFR-UHFFFAOYSA-N 0.000 description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 2
- OTMSDBZUPAUEDD-UHFFFAOYSA-N Ethane Chemical compound CC OTMSDBZUPAUEDD-UHFFFAOYSA-N 0.000 description 1
- VGGSQFUCUMXWEO-UHFFFAOYSA-N Ethene Chemical compound C=C VGGSQFUCUMXWEO-UHFFFAOYSA-N 0.000 description 1
- 239000005977 Ethylene Substances 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 239000004743 Polypropylene Substances 0.000 description 1
- NIXOWILDQLNWCW-UHFFFAOYSA-N acrylic acid group Chemical group C(C=C)(=O)O NIXOWILDQLNWCW-UHFFFAOYSA-N 0.000 description 1
- 125000003282 alkyl amino group Chemical group 0.000 description 1
- 125000001797 benzyl group Chemical group [H]C1=C([H])C([H])=C(C([H])=C1[H])C([H])([H])* 0.000 description 1
- 239000004305 biphenyl Substances 0.000 description 1
- 235000010290 biphenyl Nutrition 0.000 description 1
- 125000006267 biphenyl group Chemical group 0.000 description 1
- 239000001569 carbon dioxide Substances 0.000 description 1
- 229910002092 carbon dioxide Inorganic materials 0.000 description 1
- 239000003054 catalyst Substances 0.000 description 1
- 230000003197 catalytic effect Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 125000004177 diethyl group Chemical group [H]C([H])([H])C([H])([H])* 0.000 description 1
- 238000007865 diluting Methods 0.000 description 1
- 125000000118 dimethyl group Chemical group [H]C([H])([H])* 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- PYGSKMBEVAICCR-UHFFFAOYSA-N hexa-1,5-diene Chemical group C=CCCC=C PYGSKMBEVAICCR-UHFFFAOYSA-N 0.000 description 1
- 230000007062 hydrolysis Effects 0.000 description 1
- 230000002209 hydrophobic effect Effects 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000005304 joining Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- OKHRRIGNGQFVEE-UHFFFAOYSA-N methyl(diphenyl)silicon Chemical compound C=1C=CC=CC=1[Si](C)C1=CC=CC=C1 OKHRRIGNGQFVEE-UHFFFAOYSA-N 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- VLKZOEOYAKHREP-UHFFFAOYSA-N n-Hexane Chemical group CCCCCC VLKZOEOYAKHREP-UHFFFAOYSA-N 0.000 description 1
- 125000000962 organic group Chemical group 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- ZUOUZKKEUPVFJK-UHFFFAOYSA-N phenylbenzene Natural products C1=CC=CC=C1C1=CC=CC=C1 ZUOUZKKEUPVFJK-UHFFFAOYSA-N 0.000 description 1
- 229920000090 poly(aryl ether) Polymers 0.000 description 1
- 238000006068 polycondensation reaction Methods 0.000 description 1
- 229920013716 polyethylene resin Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 229920001155 polypropylene Polymers 0.000 description 1
- QQONPFPTGQHPMA-UHFFFAOYSA-N propylene Natural products CC=C QQONPFPTGQHPMA-UHFFFAOYSA-N 0.000 description 1
- 125000004805 propylene group Chemical group [H]C([H])([H])C([H])([*:1])C([H])([H])[*:2] 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 238000000790 scattering method Methods 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000000927 vapour-phase epitaxy Methods 0.000 description 1
- 239000011800 void material Substances 0.000 description 1
- 229910052724 xenon Inorganic materials 0.000 description 1
- FHNFHKCVQCLJFQ-UHFFFAOYSA-N xenon atom Chemical compound [Xe] FHNFHKCVQCLJFQ-UHFFFAOYSA-N 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/5329—Insulating materials
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02118—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02203—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being porous
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
- H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
- H01L21/02211—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
- H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
- H01L21/02214—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen
- H01L21/02216—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen the compound being a molecule comprising at least one silicon-oxygen bond and the compound having hydrogen or an organic group attached to the silicon or oxygen, e.g. a siloxane
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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Abstract
【解決手段】半導体基板上に多孔質の第1の絶縁膜38を形成する工程と、第1の絶縁膜上に、第1の絶縁膜より密度の高い第2の絶縁膜40を形成する工程と、第1の絶縁膜上に第2の絶縁膜が存在している状態で、電子線、紫外線又はプラズマを照射し、第1の絶縁膜を硬化させる工程とを有している。緻密性の高い第2の絶縁膜を介して第1の絶縁膜に電子線等を照射するため、第1の絶縁膜に大きなダメージが加わるのを防止しつつ、第1の絶縁膜を硬化させることができる。第1の絶縁膜にダメージが加わるのを防止することができるため、吸湿性の増大や密度の増大を防止することができ、ひいては、比誘電率の増大を防止することができる。従って、比誘電率が低く、しかも機械的強度の高い絶縁膜を有する半導体装置を提供することができる。
【選択図】 図2
Description
本発明の一実施形態による半導体装置の製造方法を図1乃至図8を用いて説明する。図1乃至図8は、本実施形態による半導体装置の製造方法を示す工程断面図である。
X=A/(A+B)
により求められる。
本発明は上記実施形態に限らず種々の変形が可能である。
まず、以下のようにして、クラスタ状のシリカを含む絶縁膜材料(シリカクラスタ前駆体)を作製した。即ち、テトラエトキシシラン20.8g(0.1mol)、メチルトリエトキシシラン17.8g(0.1mol)、グリシドキシプロピルトリメトキシシラン23.6g(0.1mol)、及び、メチルイソブチルケトン39.6gを、200mlの反応容器内に入れ、1%のテトラブチルアンモニウムハイドロキサイド水溶液16.2gを10分間で滴下した。滴下終了後、熟成反応を2時間行った。次に、硫酸マグネシウム5gを添加し、過剰の水分を除去した。次に、ロータリーエバポレータを用い、熟成反応の際に生成されたエタノールを、反応溶液が50mlになるまで除去した。こうして得られた反応溶液に、メチルイソブチルケトンを20ml添加し、絶縁膜材料(シリカクラスタ前駆体)を作製した。
まず、実施例1〜6と同様にして、絶縁膜材料(多孔質シリカ前駆体)を作製し、シリコンウェハ上に絶縁膜材料を塗布し、熱処理(ソフトベーク)を行うことにより、多孔質の層間絶縁膜を形成した。
まず、実施例1〜6と同様にして、絶縁膜材料(多孔質シリカ前駆体)を作製し、シリコンウェハ上に絶縁膜材料を塗布し、熱処理(ソフトベーク)を行うことにより、多孔質の層間絶縁膜を形成した。
まず、実施例1〜6と同様にして、絶縁膜材料(多孔質シリカ前駆体)を作製し、シリコンウェハ上に絶縁膜材料を塗布し、熱処理(ソフトベーク)を行うことにより、多孔質の層間絶縁膜を形成した。
まず、実施例1乃至6と同様にして、絶縁膜材料(多孔質シリカ前駆体)を作製し、シリコンウェハ上に絶縁膜材料を塗布し、熱処理(ソフトベーク)を行うことにより、多孔質の層間絶縁膜を形成した。
まず、実施例1〜6と同様にして、絶縁膜材料(多孔質シリカ前駆体)を作製し、シリコンウェハ上に絶縁膜材料を塗布し、熱処理(ソフトベーク)を行うことにより、多孔質の層間絶縁膜を形成した。
まず、実施例1乃至6と同様にして、絶縁膜材料(多孔質シリカ前駆体)を作製し、シリコンウェハ上に絶縁膜材料を塗布し、熱処理(ソフトベーク)を行うことにより、多孔質の層間絶縁膜を形成した。
まず、半導体基板10上に、LOCOS法により素子分離膜12を形成した。次に、素子領域14上に、ゲート絶縁膜16を介してゲート電極18を形成した。次に、ゲート電極18の側面に、サイドウォール絶縁膜20を形成した。次に、サイドウォール絶縁膜20及びゲート電極18をマスクとして半導体基板10内にドーパント不純物を導入することにより、ゲート電極18の両側の半導体基板10内にソース/ドレイン拡散層22を形成した。こうして、ゲート電極18とソース/ドレイン拡散層22とを有するトランジスタ24を形成した(図1(a)参照)。
図9乃至図15は、比較例による半導体装置の製造方法を示す工程断面図である。
まず、実施例19と同様にして、トランジスタ24を形成し(図1(a)参照)、層間絶縁膜26及びストッパ膜28を形成し(図1(b)参照)、この後、コンタクトホール30内に導体プラグ34(図1(c)参照)を埋め込んだ。
まず、実施例19と同様にして、トランジスタ24を形成し(図9(a)参照)、層間絶縁膜26及びストッパ膜28を形成し(図9(b)参照)、この後、コンタクトホール30内に導体プラグ34を埋め込んだ(図9(c)参照)。
まず、実施例19と同様にして、トランジスタ24を形成し(図1(a)参照)、層間絶縁膜26及びストッパ膜28を形成し(図1(b)参照)、この後、コンタクトホール30内に導体プラグ34(図1(c)参照)を埋め込んだ。
まず、実施例19と同様にして、トランジスタ24を形成し(図9(a)参照)、層間絶縁膜26及びストッパ膜28を形成し(図9(b)参照)、この後、コンタクトホール30内に導体プラグ34を埋め込んだ(図9(c)参照)。
まず、実施例1〜6と同様にして、絶縁膜材料(多孔質シリカ前駆体)を作製し、シリコンウェハ上に絶縁膜材料を塗布し、熱処理(ソフトベーク)を行うことにより、多孔質の層間絶縁膜を形成した。
まず、実施例1乃至6と同様にして、絶縁膜材料(多孔質シリカ前駆体)を作製し、シリコンウェハ上に絶縁膜材料を塗布し、熱処理(ソフトベーク)を行うことにより、多孔質の層間絶縁膜を形成した。
まず、実施例1〜6と同様にして、絶縁膜材料(多孔質シリカ前駆体)を作製し、シリコンウェハ上に絶縁膜材料を塗布し、熱処理(ソフトベーク)を行うことにより、多孔質の層間絶縁膜を形成した。
まず、実施例1乃至6と同様にして、絶縁膜材料(多孔質シリカ前駆体)を作製し、シリコンウェハ上に絶縁膜材料を塗布し、熱処理(ソフトベーク)を行うことにより、多孔質の層間絶縁膜を形成した。
まず、実施例1乃至6と同様にして、絶縁膜材料(多孔質シリカ前駆体)を作製し、シリコンウェハ上に絶縁膜材料を塗布し、熱処理(ソフトベーク)を行うことにより、多孔質の層間絶縁膜を形成した。
まず、実施例1乃至6と同様にして、絶縁膜材料(多孔質シリカ前駆体)を作製し、シリコンウェハ上に絶縁膜材料を塗布し、熱処理(ソフトベーク)を行うことにより、多孔質の層間絶縁膜を形成した。
まず、実施例1〜6と同様にして、絶縁膜材料(多孔質シリカ前駆体)を作製し、シリコンウェハ上に絶縁膜材料を塗布し、熱処理(ソフトベーク)を行うことにより、多孔質の層間絶縁膜を形成した。
まず、実施例1乃至6と同様にして、絶縁膜材料(多孔質シリカ前駆体)を作製し、シリコンウェハ上に絶縁膜材料を塗布し、熱処理(ソフトベーク)を行うことにより、多孔質の層間絶縁膜を形成した。
まず、実施例1乃至6と同様にして、絶縁膜材料(多孔質シリカ前駆体)を作製し、シリコンウェハ上に絶縁膜材料を塗布し、熱処理(ソフトベーク)を行うことにより、多孔質の層間絶縁膜を形成した。
まず、実施例1乃至6と同様にして、絶縁膜材料(多孔質シリカ前駆体)を作製し、シリコンウェハ上に絶縁膜材料を塗布し、熱処理(ソフトベーク)を行うことにより、多孔質の層間絶縁膜を形成した。
まず、実施例19と同様にして、トランジスタ24を形成し(図1(a)参照)、層間絶縁膜26及びストッパ膜28を形成し(図1(b)参照)、この後、コンタクトホール30内に導体プラグ34(図1(c)参照)を埋め込んだ。
まず、実施例19と同様にして、トランジスタ24を形成し(図9(a)参照)、層間絶縁膜26及びストッパ膜28を形成し(図9(b)参照)、この後、コンタクトホール30内に導体プラグ34を埋め込んだ(図9(c)参照)。
まず、実施例19と同様にして、トランジスタ24を形成し(図1(a)参照)、層間絶縁膜26及びストッパ膜28を形成し(図1(b)参照)、この後、コンタクトホール30内に導体プラグ34(図1(c)参照)を埋め込んだ。
まず、実施例19と同様にして、トランジスタ24を形成し(図1(a)参照)、層間絶縁膜26及びストッパ膜28を形成し(図1(b)参照)、この後、コンタクトホール30内に導体プラグ34(図1(c)参照)を埋め込んだ。
まず、実施例19と同様にして、トランジスタ24を形成し(図1(a)参照)、層間絶縁膜26及びストッパ膜28を形成し(図1(b)参照)、この後、コンタクトホール30内に導体プラグ34(図1(c)参照)を埋め込んだ。
まず、実施例19と同様にして、トランジスタ24を形成し(図9(a)参照)、層間絶縁膜26及びストッパ膜28を形成し(図9(b)参照)、この後、コンタクトホール30内に導体プラグ34を埋め込んだ(図9(c)参照)。
(付記1)
半導体基板上に多孔質の第1の絶縁膜を形成する工程と、
前記第1の絶縁膜上に、前記第1の絶縁膜より密度の高い第2の絶縁膜を形成する工程と、
前記第1の絶縁膜上に前記第2の絶縁膜が存在している状態で、電子線、紫外線又はプラズマを照射し、前記第1の絶縁膜を硬化させる工程と
を有することを特徴とする半導体装置の製造方法。
(付記2)
付記1記載の半導体装置の製造方法において、
前記第1の絶縁膜を硬化させる工程では、電子線、紫外線又はプラズマを照射しながら、熱処理を行うことにより、前記第1の絶縁膜を硬化させる
ことを特徴とする半導体装置の製造方法。
(付記3)
付記1記載の半導体装置の製造方法において、
前記第1の絶縁膜を硬化させる工程では、前記半導体基板を加熱せずに、紫外線又はプラズマを照射することにより、前記第1の絶縁膜を硬化させる
ことを特徴とする半導体装置の製造方法。
(付記4)
付記1乃至3のいずれかに記載の半導体装置の製造方法において、
前記第1の絶縁膜を硬化させる工程では、1〜100eVの照射エネルギーでプラズマを照射することにより、前記第1の絶縁膜を硬化させる
ことを特徴とする半導体装置の製造方法。
(付記5)
付記1乃至4のいずれかに記載の半導体装置の製造方法において、
前記第2の絶縁膜の密度は、1〜3g/cm3である
ことを特徴とする半導体装置の製造方法。
(付記6)
付記5記載の半導体装置の製造方法において、
前記第2の絶縁膜の密度は、1〜2.5g/cm3である
ことを特徴とする半導体装置の製造方法。
(付記7)
付記1乃至6のいずれかに記載の半導体装置の製造方法において、
前記第2の絶縁膜の膜厚は、5〜70nmである
ことを特徴とする半導体装置の製造方法。
(付記8)
付記7記載の半導体装置の製造方法において、
前記第2の絶縁膜の膜厚は、10〜50nmである
ことを特徴とする半導体装置の製造方法。
(付記9)
付記1乃至8のいずれかに記載の半導体装置の製造方法において、
前記第1の絶縁膜を形成する工程は、クラスタ状の化合物を含む絶縁膜材料を塗布する工程と;熱処理を行い、前記絶縁膜材料中の溶媒を蒸発させることにより、多孔質の前記第1の絶縁膜を形成する工程とを有する
ことを特徴とする半導体装置の製造方法。
(付記10)
付記1乃至8のいずれかに記載の半導体装置の製造方法において、
前記第1の絶縁膜を形成する工程は、熱分解性化合物を含む絶縁膜材料を塗布する工程と;熱処理を行うことにより、前記熱分解性化合物を分解し、前記絶縁膜材料中に空孔を形成することにより、多孔質の前記第1の絶縁膜を形成する工程とを有する
ことを特徴とする半導体装置の製造方法。
(付記11)
付記1乃至8のいずれかに記載の半導体装置の製造方法において、
前記第1の絶縁膜を形成する工程では、気相成長法により多孔質の前記第1の絶縁膜を形成する
ことを特徴とする半導体装置の製造方法。
(付記12)
付記1乃至8のいずれかに記載の半導体装置の製造方法において、
前記第1の絶縁膜を形成する工程では、熱分解性又は酸化分解性の原子団を含む原料を用い、前記原子団を分解させながら、気相成長法により多孔質の前記第1の絶縁膜を形成する
ことを特徴とする半導体装置の製造方法。
(付記13)
付記1乃至12のいずれかに記載の半導体装置の製造方法において、
前記第2の絶縁膜を形成する工程では、気相成長法により、シリコン酸化膜、カーボンがドープされたシリコン酸化膜、水素化SiC膜、窒化SiC膜、又は、水素化酸化SiC膜より成る前記第2の絶縁膜を形成する
ことを特徴とする半導体装置の製造方法。
(付記14)
付記1乃至12のいずれかに記載の半導体装置の製造方法において、
前記第2の絶縁膜を形成する工程は、塗布法によりシリコン酸化膜を形成する工程と;前記シリコン酸化膜を熱処理することにより、前記シリコン酸化膜より成る前記第2の絶縁膜を形成する工程とを有する
ことを特徴とする半導体装置の製造方法。
(付記15)
付記2記載の半導体装置の製造方法において、
前記第1の絶縁膜を硬化させる工程における熱処理温度は、200〜500℃である
ことを特徴とする半導体装置の製造方法。
(付記16)
付記9記載の半導体装置の製造方法において、
前記第1の絶縁膜を形成する工程における熱処理温度は、200〜350℃である
ことを特徴とする半導体装置の製造方法。
(付記17)
付記9記載の半導体装置の製造方法において、
前記第1の絶縁膜を形成する工程では、前記第1の絶縁膜における架橋率が10〜90%となるように、熱処理を行う
ことを特徴とする半導体装置の製造方法。
(付記18)
付記1乃至17のいずれかに記載の半導体装置の製造方法において、
前記第1の絶縁膜を硬化する工程の後に、前記第1の絶縁膜及び前記第2の絶縁膜に溝を形成する工程と;前記溝内に配線を埋め込む工程とを更に有する
ことを特徴とする半導体装置の製造方法。
12…素子分離膜
14…素子領域
16…ゲート絶縁膜
18…ゲート電極
20…サイドウォール絶縁膜
22…ソース/ドレイン拡散層
24…トランジスタ
26…層間絶縁膜
28…絶縁膜
30…コンタクトホール
32…密着層
34…導体プラグ
36…絶縁膜
38…多孔質の層間絶縁膜
40…緻密性の高い絶縁膜
42…フォトレジスト膜
44…開口部
46…溝
48…積層膜
50…配線
52…絶縁膜
54…多孔質の層間絶縁膜
56…緻密性の高い絶縁膜
58…多孔質の層間絶縁膜
60…緻密性の高い絶縁膜
62…フォトレジスト膜
64…開口部
66…コンタクトホール
68…フォトレジスト膜
70…開口部
72…溝
74…積層膜
76…Cu膜
76a…配線
76b…導体プラグ
78…絶縁膜
80…シラノール基
82…シロキサン結合
84…空孔
Claims (10)
- 半導体基板上に多孔質の第1の絶縁膜を形成する工程と、
前記第1の絶縁膜上に、前記第1の絶縁膜より密度の高い第2の絶縁膜を形成する工程と、
前記第1の絶縁膜上に前記第2の絶縁膜が存在している状態で、電子線、紫外線又はプラズマを照射し、前記第1の絶縁膜を硬化させる工程と
を有することを特徴とする半導体装置の製造方法。 - 請求項1記載の半導体装置の製造方法において、
前記第1の絶縁膜を硬化させる工程では、電子線、紫外線又はプラズマを照射しながら、熱処理を行うことにより、前記第1の絶縁膜を硬化させる
ことを特徴とする半導体装置の製造方法。 - 請求項1又は2記載の半導体装置の製造方法において、
前記第1の絶縁膜を硬化させる工程では、1〜100eVの照射エネルギーでプラズマを照射することにより、前記第1の絶縁膜を硬化させる
ことを特徴とする半導体装置の製造方法。 - 請求項1乃至3のいずれか1項に記載の半導体装置の製造方法において、
前記第2の絶縁膜の密度は、1〜3g/cm3である
ことを特徴とする半導体装置の製造方法。 - 請求項1乃至4のいずれか1項に記載の半導体装置の製造方法において、
前記第2の絶縁膜の膜厚は、5〜70nmである
ことを特徴とする半導体装置の製造方法。 - 請求項1乃至5のいずれか1項に記載の半導体装置の製造方法において、
前記第1の絶縁膜を形成する工程は、クラスタ状の化合物を含む絶縁膜材料を塗布する工程と;熱処理を行い、前記絶縁膜材料中の溶媒を蒸発させることにより、多孔質の前記第1の絶縁膜を形成する工程とを有する
ことを特徴とする半導体装置の製造方法。 - 請求項1乃至5のいずれか1項に記載の半導体装置の製造方法において、
前記第1の絶縁膜を形成する工程は、熱分解性化合物を含む絶縁膜材料を塗布する工程と;熱処理を行うことにより、前記熱分解性化合物を分解し、前記絶縁膜材料中に空孔を形成することにより、多孔質の前記第1の絶縁膜を形成する工程とを有する
ことを特徴とする半導体装置の製造方法。 - 請求項1乃至5のいずれか1項に記載の半導体装置の製造方法において、
前記第1の絶縁膜を形成する工程では、気相成長法により多孔質の前記第1の絶縁膜を形成する
ことを特徴とする半導体装置の製造方法。 - 請求項1乃至5のいずれか1項に記載の半導体装置の製造方法において、
前記第1の絶縁膜を形成する工程では、熱分解性又は酸化分解性の原子団を含む原料を用い、前記原子団を分解させながら、気相成長法により多孔質の前記第1の絶縁膜を形成する
ことを特徴とする半導体装置の製造方法。 - 請求項1乃至9のいずれか1項に記載の半導体装置の製造方法において、
前記第1の絶縁膜を硬化する工程の後に、前記第1の絶縁膜及び前記第2の絶縁膜に溝を形成する工程と;前記溝内に配線を埋め込む工程とを更に有する
ことを特徴とする半導体装置の製造方法。
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JP2008130991A (ja) * | 2006-11-24 | 2008-06-05 | Fujitsu Ltd | 半導体装置及びその製造方法 |
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JP2018050078A (ja) * | 2012-07-20 | 2018-03-29 | 株式会社半導体エネルギー研究所 | 半導体装置 |
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Also Published As
Publication number | Publication date |
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KR20060065493A (ko) | 2006-06-14 |
US20060128167A1 (en) | 2006-06-15 |
JP4667165B2 (ja) | 2011-04-06 |
CN100477106C (zh) | 2009-04-08 |
KR100749622B1 (ko) | 2007-08-14 |
CN1787186A (zh) | 2006-06-14 |
TW200633055A (en) | 2006-09-16 |
CN1787187A (zh) | 2006-06-14 |
TWI275145B (en) | 2007-03-01 |
US7262142B2 (en) | 2007-08-28 |
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