IT1161895B - Memoria a semiconduttori - Google Patents

Memoria a semiconduttori

Info

Publication number
IT1161895B
IT1161895B IT19579/83A IT1957983A IT1161895B IT 1161895 B IT1161895 B IT 1161895B IT 19579/83 A IT19579/83 A IT 19579/83A IT 1957983 A IT1957983 A IT 1957983A IT 1161895 B IT1161895 B IT 1161895B
Authority
IT
Italy
Prior art keywords
semiconductor memory
semiconductor
memory
Prior art date
Application number
IT19579/83A
Other languages
English (en)
Other versions
IT8319579A0 (it
IT8319579A1 (it
Inventor
Shinoda Takashi
Sakai Osamu
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of IT8319579A0 publication Critical patent/IT8319579A0/it
Publication of IT8319579A1 publication Critical patent/IT8319579A1/it
Application granted granted Critical
Publication of IT1161895B publication Critical patent/IT1161895B/it

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C17/00Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1076Parity data used in redundant arrays of independent storages, e.g. in RAID systems
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C17/00Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/08Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
    • G11C17/10Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM
    • G11C17/12Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices
    • G11C17/126Virtual ground arrays
IT19579/83A 1982-02-15 1983-02-14 Memoria a semiconduttori IT1161895B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57021130A JPS58139399A (ja) 1982-02-15 1982-02-15 半導体記憶装置

Publications (3)

Publication Number Publication Date
IT8319579A0 IT8319579A0 (it) 1983-02-14
IT8319579A1 IT8319579A1 (it) 1984-08-14
IT1161895B true IT1161895B (it) 1987-03-18

Family

ID=12046302

Family Applications (1)

Application Number Title Priority Date Filing Date
IT19579/83A IT1161895B (it) 1982-02-15 1983-02-14 Memoria a semiconduttori

Country Status (8)

Country Link
US (2) US4703453A (it)
JP (1) JPS58139399A (it)
KR (1) KR900004813B1 (it)
DE (1) DE3305056C2 (it)
FR (2) FR2521761B1 (it)
GB (2) GB2116389B (it)
HK (1) HK69987A (it)
IT (1) IT1161895B (it)

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FR2528613B1 (fr) * 1982-06-09 1991-09-20 Hitachi Ltd Memoire a semi-conducteurs
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JPS6142795A (ja) * 1984-08-03 1986-03-01 Toshiba Corp 半導体記憶装置の行デコ−ダ系
US4692923A (en) * 1984-09-28 1987-09-08 Ncr Corporation Fault tolerant memory
JPS61123100A (ja) * 1984-11-20 1986-06-10 Fujitsu Ltd 半導体記憶装置
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JP2684365B2 (ja) * 1987-04-24 1997-12-03 株式会社日立製作所 半導体記憶装置
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JPH0734314B2 (ja) * 1989-07-13 1995-04-12 株式会社東芝 半導体記憶装置
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JP3236105B2 (ja) * 1993-03-17 2001-12-10 富士通株式会社 不揮発性半導体記憶装置及びその動作試験方法
US5392245A (en) * 1993-08-13 1995-02-21 Micron Technology, Inc. Redundancy elements using thin film transistors (TFTs)
US5309389A (en) * 1993-08-27 1994-05-03 Honeywell Inc. Read-only memory with complementary data lines
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US5898638A (en) * 1997-03-11 1999-04-27 Micron Technology, Inc. Latching wordline driver for multi-bank memory
US5909449A (en) * 1997-09-08 1999-06-01 Invox Technology Multibit-per-cell non-volatile memory with error detection and correction
US6061551A (en) 1998-10-21 2000-05-09 Parkervision, Inc. Method and system for down-converting electromagnetic signals
US9325556B2 (en) 1998-10-21 2016-04-26 Parkervision, Inc. Methods and systems for down-converting a signal
US6046958A (en) * 1999-01-11 2000-04-04 Micron Technology, Inc. Latching wordline driver for multi-bank memory
US6574746B1 (en) * 1999-07-02 2003-06-03 Sun Microsystems, Inc. System and method for improving multi-bit error protection in computer memory systems
JP2002109878A (ja) * 2000-09-29 2002-04-12 Oki Electric Ind Co Ltd シリアルアクセスメモリ
JP4877894B2 (ja) 2001-07-04 2012-02-15 ルネサスエレクトロニクス株式会社 半導体装置
JP4484124B2 (ja) * 2001-07-04 2010-06-16 株式会社ルネサステクノロジ 半導体装置
JP2003077294A (ja) * 2001-08-31 2003-03-14 Mitsubishi Electric Corp メモリ回路
JP4418153B2 (ja) 2002-12-27 2010-02-17 株式会社ルネサステクノロジ 半導体装置
US7173852B2 (en) * 2003-10-03 2007-02-06 Sandisk Corporation Corrected data storage and handling methods
US7012835B2 (en) * 2003-10-03 2006-03-14 Sandisk Corporation Flash memory data correction and scrub techniques
JP2005203064A (ja) * 2004-01-19 2005-07-28 Toshiba Corp 半導体記憶装置
US7177212B2 (en) * 2004-01-23 2007-02-13 Agere Systems Inc. Method and apparatus for reducing leakage current in a read only memory device using shortened precharge phase
JP4413091B2 (ja) * 2004-06-29 2010-02-10 株式会社ルネサステクノロジ 半導体装置
US7315916B2 (en) * 2004-12-16 2008-01-01 Sandisk Corporation Scratch pad block
US7395404B2 (en) * 2004-12-16 2008-07-01 Sandisk Corporation Cluster auto-alignment for storing addressable data packets in a non-volatile memory array
JP2006179057A (ja) * 2004-12-21 2006-07-06 Fujitsu Ltd 半導体メモリ
JP4846384B2 (ja) * 2006-02-20 2011-12-28 株式会社東芝 半導体記憶装置
US7716538B2 (en) * 2006-09-27 2010-05-11 Sandisk Corporation Memory with cell population distribution assisted read margining
US7886204B2 (en) * 2006-09-27 2011-02-08 Sandisk Corporation Methods of cell population distribution assisted read margining
JP2008108297A (ja) * 2006-10-23 2008-05-08 Toshiba Corp 不揮発性半導体記憶装置
US7477547B2 (en) * 2007-03-28 2009-01-13 Sandisk Corporation Flash memory refresh techniques triggered by controlled scrub data reads
US7573773B2 (en) * 2007-03-28 2009-08-11 Sandisk Corporation Flash memory with data refresh triggered by controlled scrub data reads
JP2013033560A (ja) 2009-12-03 2013-02-14 Panasonic Corp 半導体記憶装置
US8687421B2 (en) 2011-11-21 2014-04-01 Sandisk Technologies Inc. Scrub techniques for use with dynamic read
US8954824B2 (en) * 2012-02-28 2015-02-10 Micron Technology, Inc. Error detection or correction of stored signals after one or more heat events in one or more memory devices
US9230689B2 (en) 2014-03-17 2016-01-05 Sandisk Technologies Inc. Finding read disturbs on non-volatile memories
US9552171B2 (en) 2014-10-29 2017-01-24 Sandisk Technologies Llc Read scrub with adaptive counter management
US9978456B2 (en) 2014-11-17 2018-05-22 Sandisk Technologies Llc Techniques for reducing read disturb in partially written blocks of non-volatile memory
US9349479B1 (en) 2014-11-18 2016-05-24 Sandisk Technologies Inc. Boundary word line operation in nonvolatile memory
US9449700B2 (en) 2015-02-13 2016-09-20 Sandisk Technologies Llc Boundary word line search and open block read methods with reduced read disturb
US9653154B2 (en) 2015-09-21 2017-05-16 Sandisk Technologies Llc Write abort detection for multi-state memories
KR20180073129A (ko) * 2016-12-22 2018-07-02 에스케이하이닉스 주식회사 에러 정정 코드 회로를 갖는 반도체 메모리 장치

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US3812336A (en) 1972-12-18 1974-05-21 Ibm Dynamic address translation scheme using orthogonal squares
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Also Published As

Publication number Publication date
GB2116389B (en) 1986-05-21
FR2522183B1 (fr) 1989-12-15
DE3305056C2 (de) 1994-05-11
GB8510570D0 (en) 1985-05-30
GB2157038A (en) 1985-10-16
KR840003894A (ko) 1984-10-04
US4817052A (en) 1989-03-28
US4703453A (en) 1987-10-27
FR2521761B1 (fr) 1990-12-28
GB2116389A (en) 1983-09-21
JPS58139399A (ja) 1983-08-18
GB8301289D0 (en) 1983-02-16
KR900004813B1 (ko) 1990-07-07
IT8319579A0 (it) 1983-02-14
IT8319579A1 (it) 1984-08-14
HK69987A (en) 1987-10-02
FR2521761A1 (fr) 1983-08-19
FR2522183A1 (fr) 1983-08-26
DE3305056A1 (de) 1983-08-25
GB2157038B (en) 1986-07-02

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Legal Events

Date Code Title Description
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19950224