DE3382555D1 - Halbleiterspeicheranordnung. - Google Patents

Halbleiterspeicheranordnung.

Info

Publication number
DE3382555D1
DE3382555D1 DE8383401300T DE3382555T DE3382555D1 DE 3382555 D1 DE3382555 D1 DE 3382555D1 DE 8383401300 T DE8383401300 T DE 8383401300T DE 3382555 T DE3382555 T DE 3382555T DE 3382555 D1 DE3382555 D1 DE 3382555D1
Authority
DE
Germany
Prior art keywords
semiconductor memory
memory arrangement
arrangement
semiconductor
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8383401300T
Other languages
English (en)
Inventor
Kouji Ueno
Tamio Miyamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3382555D1 publication Critical patent/DE3382555D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
    • G11C17/18—Auxiliary circuits, e.g. for writing into memory

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Read Only Memory (AREA)
DE8383401300T 1982-06-30 1983-06-23 Halbleiterspeicheranordnung. Expired - Fee Related DE3382555D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57111536A JPS5922295A (ja) 1982-06-30 1982-06-30 半導体記憶装置

Publications (1)

Publication Number Publication Date
DE3382555D1 true DE3382555D1 (de) 1992-06-11

Family

ID=14563836

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8383401300T Expired - Fee Related DE3382555D1 (de) 1982-06-30 1983-06-23 Halbleiterspeicheranordnung.

Country Status (5)

Country Link
US (1) US4599688A (de)
EP (1) EP0098215B1 (de)
JP (1) JPS5922295A (de)
DE (1) DE3382555D1 (de)
IE (1) IE58553B1 (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5828680B2 (ja) * 1979-04-27 1983-06-17 富士通株式会社 半導体記憶装置
JPS61150199A (ja) * 1984-12-25 1986-07-08 Nec Corp 半導体記憶装置
EP0229081A4 (de) * 1985-07-09 1990-03-22 Motorola Inc Anpassungsfähiges zeilentreiberschaltung und ausgangsschaltung für programmierbaren nur-lese-speicher.
US4734885A (en) * 1985-10-17 1988-03-29 Harris Corporation Programming arrangement for programmable devices
FR2608826B1 (fr) * 1986-12-19 1989-03-17 Eurotechnique Sa Circuit integre comportant des elements d'aiguillage vers des elements de redondance dans une memoire
FR2623653B1 (fr) * 1987-11-24 1992-10-23 Sgs Thomson Microelectronics Procede de test de cellules de memoire electriquement programmable et circuit integre correspondant
FR2632110B1 (fr) * 1988-05-27 1990-10-12 Bendix Electronics Sa Procede et dispositif de programmation d'une memoire du type prom et memoire en faisant application
US4972375A (en) * 1988-08-30 1990-11-20 Fujitsu Limited Programmable semiconductor memory circuit
KR920006985A (ko) * 1990-09-19 1992-04-28 김광호 스테이틱램의 부하 조절회로
US5498562A (en) * 1993-04-07 1996-03-12 Micron Technology, Inc. Semiconductor processing methods of forming stacked capacitors
JP6265295B1 (ja) 2017-06-14 2018-01-24 Smk株式会社 コンタクト

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55140265A (en) * 1979-04-13 1980-11-01 Fujitsu Ltd Semiconductor memory device and method of fabricating the same
JPS55142475A (en) * 1979-04-23 1980-11-07 Fujitsu Ltd Decoder circuit
JPS5828679B2 (ja) * 1979-04-25 1983-06-17 富士通株式会社 半導体記憶装置の書込み回路
JPS5828680B2 (ja) * 1979-04-27 1983-06-17 富士通株式会社 半導体記憶装置
JPS606040B2 (ja) * 1979-06-07 1985-02-15 日本電気株式会社 集積回路
JPS57143798A (en) * 1981-03-02 1982-09-06 Fujitsu Ltd Programmable element

Also Published As

Publication number Publication date
EP0098215A2 (de) 1984-01-11
EP0098215B1 (de) 1992-05-06
JPS5922295A (ja) 1984-02-04
US4599688A (en) 1986-07-08
IE58553B1 (en) 1993-10-06
IE831541L (en) 1983-12-30
JPS6137717B2 (de) 1986-08-25
EP0098215A3 (en) 1987-05-13

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee