JPS5577083A - Semiconductor memory unit - Google Patents
Semiconductor memory unitInfo
- Publication number
- JPS5577083A JPS5577083A JP15036578A JP15036578A JPS5577083A JP S5577083 A JPS5577083 A JP S5577083A JP 15036578 A JP15036578 A JP 15036578A JP 15036578 A JP15036578 A JP 15036578A JP S5577083 A JPS5577083 A JP S5577083A
- Authority
- JP
- Japan
- Prior art keywords
- sense amplifier
- amplifier circuit
- input information
- bit lines
- cells
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4097—Bit-line organisation, e.g. bit-line layout, folded bit lines
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Static Random-Access Memory (AREA)
Abstract
PURPOSE:To increase the input information of a sense amplifier circuit by connecting bit lines, divided into several, to memory cells and by controlling connections between those bit lines and the sense amplifier circuit through switching transistors by a signal corresponding to an address signal. CONSTITUTION:Symmetrical memory cells MC1, MC2... selected by symmetric word lines WL1, WL2... are connected to respectively-divided symmetric bit lines BL1, BL2..., which are symmetrically connected to sense amplifier circuit A in parallel by way of switching transistors Tr5, Tr6... controlled by address signals respectively. Therefore, ones cell MC1, etc., is selected, input information to circuit A is in proprotion to the ratio of storage capacity C1 to the sum of floating capacities C7 and C11, and greater than that when cells are connected in series, so that even if cells would increase in number, the input information applied to the sense amplifier circuit can be increased. Further, the designing of a pattern is simplified because pitches in terms of the pattern designing of the sense amplifier circuit can be increased.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15036578A JPS5577083A (en) | 1978-12-04 | 1978-12-04 | Semiconductor memory unit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15036578A JPS5577083A (en) | 1978-12-04 | 1978-12-04 | Semiconductor memory unit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5577083A true JPS5577083A (en) | 1980-06-10 |
Family
ID=15495394
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15036578A Pending JPS5577083A (en) | 1978-12-04 | 1978-12-04 | Semiconductor memory unit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5577083A (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6134792A (en) * | 1984-07-25 | 1986-02-19 | Toshiba Corp | Semiconductor memory device |
US4606010A (en) * | 1981-10-23 | 1986-08-12 | Tokyo Shibaura Denki Kabushiki Kaisha | Dynamic memory device |
JPS61242396A (en) * | 1985-04-19 | 1986-10-28 | Nec Corp | Semiconductor memory |
US4627031A (en) * | 1985-01-07 | 1986-12-02 | Thomson Components-Mostek Corporation | CMOS memory arrangement |
US4636988A (en) * | 1985-01-07 | 1987-01-13 | Thomson Components-Mostek Corporation | CMOS memory arrangement with reduced data line compacitance |
US4703453A (en) * | 1982-02-15 | 1987-10-27 | Hitachi, Ltd. | Semiconductor memory with an improved dummy cell arrangement and with a built-in error correcting code circuit |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54149532A (en) * | 1978-05-17 | 1979-11-22 | Nec Corp | Semiconductor memory unit |
JPS54158827A (en) * | 1978-06-05 | 1979-12-15 | Mitsubishi Electric Corp | Semiconductor integrated circuit |
JPS5548895A (en) * | 1978-09-29 | 1980-04-08 | Siemens Ag | Device for reading and reproducing information stored in one transistor memory element |
-
1978
- 1978-12-04 JP JP15036578A patent/JPS5577083A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54149532A (en) * | 1978-05-17 | 1979-11-22 | Nec Corp | Semiconductor memory unit |
JPS54158827A (en) * | 1978-06-05 | 1979-12-15 | Mitsubishi Electric Corp | Semiconductor integrated circuit |
JPS5548895A (en) * | 1978-09-29 | 1980-04-08 | Siemens Ag | Device for reading and reproducing information stored in one transistor memory element |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4606010A (en) * | 1981-10-23 | 1986-08-12 | Tokyo Shibaura Denki Kabushiki Kaisha | Dynamic memory device |
US4703453A (en) * | 1982-02-15 | 1987-10-27 | Hitachi, Ltd. | Semiconductor memory with an improved dummy cell arrangement and with a built-in error correcting code circuit |
US4817052A (en) * | 1982-02-15 | 1989-03-28 | Hitachi, Ltd. | Semiconductor memory with an improved dummy cell arrangement and with a built-in error correcting code circuit |
JPS6134792A (en) * | 1984-07-25 | 1986-02-19 | Toshiba Corp | Semiconductor memory device |
US4627031A (en) * | 1985-01-07 | 1986-12-02 | Thomson Components-Mostek Corporation | CMOS memory arrangement |
US4636988A (en) * | 1985-01-07 | 1987-01-13 | Thomson Components-Mostek Corporation | CMOS memory arrangement with reduced data line compacitance |
JPS61242396A (en) * | 1985-04-19 | 1986-10-28 | Nec Corp | Semiconductor memory |
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