JPS57109184A - Dynamic memory device - Google Patents

Dynamic memory device

Info

Publication number
JPS57109184A
JPS57109184A JP55184226A JP18422680A JPS57109184A JP S57109184 A JPS57109184 A JP S57109184A JP 55184226 A JP55184226 A JP 55184226A JP 18422680 A JP18422680 A JP 18422680A JP S57109184 A JPS57109184 A JP S57109184A
Authority
JP
Japan
Prior art keywords
dummy cell
mosfet
nodes
constitution
dummy
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP55184226A
Other languages
Japanese (ja)
Other versions
JPS601713B2 (en
Inventor
Toru Furuyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP55184226A priority Critical patent/JPS601713B2/en
Priority to KR1019810004747A priority patent/KR830008071A/en
Publication of JPS57109184A publication Critical patent/JPS57109184A/en
Publication of JPS601713B2 publication Critical patent/JPS601713B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4099—Dummy cell treatment; Reference voltage generators

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)

Abstract

PURPOSE:To enable to write in an intermediate potential to a dummy cell in excellent reliability and with simple circuit, by providing a readout MOSFET between the dummy cell and a bit line, and providing a short-circuiting MOSFET between pairs of storage nodes in the dummy cell. CONSTITUTION:The device is provided with bit lines BL1 and BL2 connected to signal input/output nodes N1 and N2 of sense amplifiers SA and SA of FF constitution, memory cells MC1 and MC2 connected to each bit line, and dummy cells DC1 and DC2. A specified potential is written in each dummy cell from the bit lines BL1 and BL2 through readout MOSFET-Q14 and Q15. A short circuit MOSFET-Q16 is provided between dummy cell pair storage nodes N3 and N4, and the nodes N3 and N4 are set to the intermediate potential of the power supply potential VDD with the control of the Q16.
JP55184226A 1980-12-11 1980-12-25 dynamic memory device Expired JPS601713B2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP55184226A JPS601713B2 (en) 1980-12-25 1980-12-25 dynamic memory device
KR1019810004747A KR830008071A (en) 1980-12-11 1981-12-05 Vibration damper

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55184226A JPS601713B2 (en) 1980-12-25 1980-12-25 dynamic memory device

Publications (2)

Publication Number Publication Date
JPS57109184A true JPS57109184A (en) 1982-07-07
JPS601713B2 JPS601713B2 (en) 1985-01-17

Family

ID=16149571

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55184226A Expired JPS601713B2 (en) 1980-12-11 1980-12-25 dynamic memory device

Country Status (1)

Country Link
JP (1) JPS601713B2 (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5952495A (en) * 1982-09-17 1984-03-27 Hitachi Ltd Mos-ram device
EP0124868A2 (en) * 1983-05-04 1984-11-14 Nec Corporation Semiconductor memory
FR2553558A1 (en) * 1983-10-17 1985-04-19 Hitachi Ltd DYNAMIC MEMORY
JPS60236191A (en) * 1984-05-08 1985-11-22 Matsushita Electric Ind Co Ltd Semiconductor memory device
JPS62129997A (en) * 1985-11-13 1987-06-12 Mitsubishi Electric Corp Dynamic ram
US5258959A (en) * 1990-12-28 1993-11-02 Sgs-Thomson Microelectronics, S.R.L. Memory cell reading circuit

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5952495A (en) * 1982-09-17 1984-03-27 Hitachi Ltd Mos-ram device
JPH0379798B2 (en) * 1982-09-17 1991-12-19 Hitachi Ltd
EP0124868A2 (en) * 1983-05-04 1984-11-14 Nec Corporation Semiconductor memory
FR2553558A1 (en) * 1983-10-17 1985-04-19 Hitachi Ltd DYNAMIC MEMORY
JPS60236191A (en) * 1984-05-08 1985-11-22 Matsushita Electric Ind Co Ltd Semiconductor memory device
JPS62129997A (en) * 1985-11-13 1987-06-12 Mitsubishi Electric Corp Dynamic ram
US5258959A (en) * 1990-12-28 1993-11-02 Sgs-Thomson Microelectronics, S.R.L. Memory cell reading circuit

Also Published As

Publication number Publication date
JPS601713B2 (en) 1985-01-17

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