JPS5427734A - Dynamic semiconductor memory - Google Patents

Dynamic semiconductor memory

Info

Publication number
JPS5427734A
JPS5427734A JP9312977A JP9312977A JPS5427734A JP S5427734 A JPS5427734 A JP S5427734A JP 9312977 A JP9312977 A JP 9312977A JP 9312977 A JP9312977 A JP 9312977A JP S5427734 A JPS5427734 A JP S5427734A
Authority
JP
Japan
Prior art keywords
semiconductor memory
dynamic semiconductor
dummy cell
deteriorating
capacitance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9312977A
Other languages
Japanese (ja)
Inventor
Toru Furuyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP9312977A priority Critical patent/JPS5427734A/en
Publication of JPS5427734A publication Critical patent/JPS5427734A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409Read-write [R-W] circuits 
    • G11C11/4099Dummy cell treatment; Reference voltage generators

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)

Abstract

PURPOSE:To prevent a sense margin from deteriorating by utilizing merits of a balanced sense circuit with a dummy cell and memory cell made equal in capacitance and by making it possible to write data to the dummy cell at an intermediate level in a precharging interval.
JP9312977A 1977-08-03 1977-08-03 Dynamic semiconductor memory Pending JPS5427734A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9312977A JPS5427734A (en) 1977-08-03 1977-08-03 Dynamic semiconductor memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9312977A JPS5427734A (en) 1977-08-03 1977-08-03 Dynamic semiconductor memory

Publications (1)

Publication Number Publication Date
JPS5427734A true JPS5427734A (en) 1979-03-02

Family

ID=14073901

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9312977A Pending JPS5427734A (en) 1977-08-03 1977-08-03 Dynamic semiconductor memory

Country Status (1)

Country Link
JP (1) JPS5427734A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56153579A (en) * 1980-04-30 1981-11-27 Nec Corp Semiconductor storage circuit
JPS5753889A (en) * 1980-07-31 1982-03-31 Siemens Ag
JPS57186291A (en) * 1981-05-11 1982-11-16 Mitsubishi Electric Corp Semiconductor memory device
JPS5857693A (en) * 1981-09-30 1983-04-05 Toshiba Corp Mos dynamic type storage device
JPS61178795A (en) * 1985-02-01 1986-08-11 Toshiba Corp Dynamic type semiconductor memory device
JPS6271090A (en) * 1985-09-24 1987-04-01 Nec Corp Semiconductor memory
JPS6271091A (en) * 1985-09-24 1987-04-01 Nec Corp Semiconductor memory

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56153579A (en) * 1980-04-30 1981-11-27 Nec Corp Semiconductor storage circuit
JPS5753889A (en) * 1980-07-31 1982-03-31 Siemens Ag
JPS57186291A (en) * 1981-05-11 1982-11-16 Mitsubishi Electric Corp Semiconductor memory device
JPS5857693A (en) * 1981-09-30 1983-04-05 Toshiba Corp Mos dynamic type storage device
JPH0364958B2 (en) * 1981-09-30 1991-10-09
JPS61178795A (en) * 1985-02-01 1986-08-11 Toshiba Corp Dynamic type semiconductor memory device
JPH0510756B2 (en) * 1985-02-01 1993-02-10 Tokyo Shibaura Electric Co
JPS6271090A (en) * 1985-09-24 1987-04-01 Nec Corp Semiconductor memory
JPS6271091A (en) * 1985-09-24 1987-04-01 Nec Corp Semiconductor memory

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