JPS5411648A - Semiconductor memory unit - Google Patents

Semiconductor memory unit

Info

Publication number
JPS5411648A
JPS5411648A JP7684177A JP7684177A JPS5411648A JP S5411648 A JPS5411648 A JP S5411648A JP 7684177 A JP7684177 A JP 7684177A JP 7684177 A JP7684177 A JP 7684177A JP S5411648 A JPS5411648 A JP S5411648A
Authority
JP
Japan
Prior art keywords
semiconductor memory
memory unit
clock signal
half period
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7684177A
Other languages
Japanese (ja)
Other versions
JPS5719504B2 (en
Inventor
Hideo Kikuchi
Ryusuke Hoshikawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP7684177A priority Critical patent/JPS5411648A/en
Publication of JPS5411648A publication Critical patent/JPS5411648A/en
Publication of JPS5719504B2 publication Critical patent/JPS5719504B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Static Random-Access Memory (AREA)

Abstract

PURPOSE:To establish the address designation circuit and data readout circuit of RAM with simple constitution and high speed, by performing precharging at the first half period of the clock signal and by performing the memory cell selection and readout operation at the latter half period of the clock signal.
JP7684177A 1977-06-28 1977-06-28 Semiconductor memory unit Granted JPS5411648A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7684177A JPS5411648A (en) 1977-06-28 1977-06-28 Semiconductor memory unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7684177A JPS5411648A (en) 1977-06-28 1977-06-28 Semiconductor memory unit

Publications (2)

Publication Number Publication Date
JPS5411648A true JPS5411648A (en) 1979-01-27
JPS5719504B2 JPS5719504B2 (en) 1982-04-22

Family

ID=13616887

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7684177A Granted JPS5411648A (en) 1977-06-28 1977-06-28 Semiconductor memory unit

Country Status (1)

Country Link
JP (1) JPS5411648A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55108984A (en) * 1979-02-14 1980-08-21 Nec Corp Memorieed information read system
JPS5812194A (en) * 1981-07-15 1983-01-24 Oki Electric Ind Co Ltd Latching circuit of address input signal
JPS60239991A (en) * 1984-05-14 1985-11-28 Mitsubishi Electric Corp Decoder circuit

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49115741A (en) * 1973-03-08 1974-11-05

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49115741A (en) * 1973-03-08 1974-11-05

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55108984A (en) * 1979-02-14 1980-08-21 Nec Corp Memorieed information read system
JPS6249679B2 (en) * 1979-02-14 1987-10-20 Nippon Electric Co
JPS5812194A (en) * 1981-07-15 1983-01-24 Oki Electric Ind Co Ltd Latching circuit of address input signal
JPS60239991A (en) * 1984-05-14 1985-11-28 Mitsubishi Electric Corp Decoder circuit

Also Published As

Publication number Publication date
JPS5719504B2 (en) 1982-04-22

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