JPS533049A - Logical circuit - Google Patents
Logical circuitInfo
- Publication number
- JPS533049A JPS533049A JP7637376A JP7637376A JPS533049A JP S533049 A JPS533049 A JP S533049A JP 7637376 A JP7637376 A JP 7637376A JP 7637376 A JP7637376 A JP 7637376A JP S533049 A JPS533049 A JP S533049A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- logical circuit
- output
- applying
- reduce
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000002411 adverse Effects 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management
Landscapes
- Logic Circuits (AREA)
Abstract
PURPOSE:To reduce the delay time from the writing signal or chip selection signal to the memory output by applying the differential signal of adverse polarity to each other to the output circuit in the form of an output control signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7637376A JPS533049A (en) | 1976-06-30 | 1976-06-30 | Logical circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7637376A JPS533049A (en) | 1976-06-30 | 1976-06-30 | Logical circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS533049A true JPS533049A (en) | 1978-01-12 |
Family
ID=13603531
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7637376A Pending JPS533049A (en) | 1976-06-30 | 1976-06-30 | Logical circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS533049A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57125521A (en) * | 1980-12-30 | 1982-08-04 | Ibm | Current control gate circuit |
| JPS61260710A (en) * | 1985-05-14 | 1986-11-18 | Sony Corp | Flip-flop |
| JPS62165431A (en) * | 1986-01-16 | 1987-07-22 | Hitachi Cable Ltd | Emitter coupled AND gate circuit |
| JPS63263915A (en) * | 1987-04-15 | 1988-10-31 | インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン | Driving circuit |
-
1976
- 1976-06-30 JP JP7637376A patent/JPS533049A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57125521A (en) * | 1980-12-30 | 1982-08-04 | Ibm | Current control gate circuit |
| JPS61260710A (en) * | 1985-05-14 | 1986-11-18 | Sony Corp | Flip-flop |
| JPS62165431A (en) * | 1986-01-16 | 1987-07-22 | Hitachi Cable Ltd | Emitter coupled AND gate circuit |
| JPS63263915A (en) * | 1987-04-15 | 1988-10-31 | インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン | Driving circuit |
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