IL99979A - Treatment of silicon wafers in order to achieve controlled precipitation profiles therein adapted for manufacturing electronic components - Google Patents

Treatment of silicon wafers in order to achieve controlled precipitation profiles therein adapted for manufacturing electronic components

Info

Publication number
IL99979A
IL99979A IL9997991A IL9997991A IL99979A IL 99979 A IL99979 A IL 99979A IL 9997991 A IL9997991 A IL 9997991A IL 9997991 A IL9997991 A IL 9997991A IL 99979 A IL99979 A IL 99979A
Authority
IL
Israel
Prior art keywords
wafers
treatment
silicon wafers
face
thermal
Prior art date
Application number
IL9997991A
Other languages
English (en)
Other versions
IL99979A0 (en
Original Assignee
Memc Electronic Materials
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Memc Electronic Materials filed Critical Memc Electronic Materials
Publication of IL99979A0 publication Critical patent/IL99979A0/xx
Publication of IL99979A publication Critical patent/IL99979A/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • H01L21/3225—Thermally inducing defects using oxygen present in the silicon body for intrinsic gettering

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Formation Of Insulating Films (AREA)
  • Silicon Compounds (AREA)
  • Surgical Instruments (AREA)
  • Safety Valves (AREA)
  • Vessels, Lead-In Wires, Accessory Apparatuses For Cathode-Ray Tubes (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
IL9997991A 1990-11-15 1991-11-07 Treatment of silicon wafers in order to achieve controlled precipitation profiles therein adapted for manufacturing electronic components IL99979A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT48481A IT1242014B (it) 1990-11-15 1990-11-15 Procedimento per il trattamento di fette di silicio per ottenere in esse profili di precipitazione controllati per la produzione di componenti elettronici.

Publications (2)

Publication Number Publication Date
IL99979A0 IL99979A0 (en) 1992-08-18
IL99979A true IL99979A (en) 1995-07-31

Family

ID=11266818

Family Applications (1)

Application Number Title Priority Date Filing Date
IL9997991A IL99979A (en) 1990-11-15 1991-11-07 Treatment of silicon wafers in order to achieve controlled precipitation profiles therein adapted for manufacturing electronic components

Country Status (17)

Country Link
US (1) US5403406A (it)
EP (1) EP0557415B1 (it)
JP (2) JP3412636B2 (it)
KR (1) KR100247464B1 (it)
AT (1) ATE176084T1 (it)
AU (1) AU9033591A (it)
CZ (1) CZ84993A3 (it)
DE (1) DE69130802T2 (it)
FI (1) FI932024A7 (it)
IL (1) IL99979A (it)
IT (1) IT1242014B (it)
MY (1) MY110258A (it)
SG (1) SG64901A1 (it)
SK (1) SK47093A3 (it)
TW (1) TW205110B (it)
WO (1) WO1992009101A1 (it)
ZA (1) ZA918831B (it)

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US5788763A (en) * 1995-03-09 1998-08-04 Toshiba Ceramics Co., Ltd. Manufacturing method of a silicon wafer having a controlled BMD concentration
US5593494A (en) * 1995-03-14 1997-01-14 Memc Electronic Materials, Inc. Precision controlled precipitation of oxygen in silicon
SG64470A1 (en) 1997-02-13 1999-04-27 Samsung Electronics Co Ltd Methods of manufacturing monocrystalline silicon ingots and wafers by controlling pull rate profiles in a hot zone furnace and ingots and wafers manufactured thereby
US6503594B2 (en) 1997-02-13 2003-01-07 Samsung Electronics Co., Ltd. Silicon wafers having controlled distribution of defects and slip
US6485807B1 (en) 1997-02-13 2002-11-26 Samsung Electronics Co., Ltd. Silicon wafers having controlled distribution of defects, and methods of preparing the same
US5994761A (en) 1997-02-26 1999-11-30 Memc Electronic Materials Spa Ideal oxygen precipitating silicon wafers and oxygen out-diffusion-less process therefor
DE69806369T2 (de) 1997-04-09 2003-07-10 Memc Electronic Materials, Inc. Silicium mit niedriger fehlerdichte und idealem sauerstoffniederschlag
TW429478B (en) * 1997-08-29 2001-04-11 Toshiba Corp Semiconductor device and method for manufacturing the same
US5882989A (en) * 1997-09-22 1999-03-16 Memc Electronic Materials, Inc. Process for the preparation of silicon wafers having a controlled distribution of oxygen precipitate nucleation centers
US6340392B1 (en) 1997-10-24 2002-01-22 Samsung Electronics Co., Ltd. Pulling methods for manufacturing monocrystalline silicone ingots by controlling temperature at the center and edge of an ingot-melt interface
JPH11150119A (ja) * 1997-11-14 1999-06-02 Sumitomo Sitix Corp シリコン半導体基板の熱処理方法とその装置
JP3746153B2 (ja) * 1998-06-09 2006-02-15 信越半導体株式会社 シリコンウエーハの熱処理方法
US6828690B1 (en) * 1998-08-05 2004-12-07 Memc Electronic Materials, Inc. Non-uniform minority carrier lifetime distributions in high performance silicon power devices
WO2000013226A1 (en) * 1998-09-02 2000-03-09 Memc Electronic Materials, Inc. Process for preparing an ideal oxygen precipitating silicon wafer
KR100581305B1 (ko) * 1998-09-02 2006-05-22 엠이엠씨 일렉트로닉 머티리얼즈 인코포레이티드 저결함 밀도 단결정 실리콘으로부터의 ｓｏｉ 구조체
US6336968B1 (en) 1998-09-02 2002-01-08 Memc Electronic Materials, Inc. Non-oxygen precipitating czochralski silicon wafers
CN1181522C (zh) 1998-09-02 2004-12-22 Memc电子材料有限公司 具有改进的内部收气的热退火单晶硅片及其热处理工艺
WO2000022198A1 (en) 1998-10-14 2000-04-20 Memc Electronic Materials, Inc. Thermally annealed, low defect density single crystal silicon
JP2000154070A (ja) * 1998-11-16 2000-06-06 Suminoe Textile Co Ltd セラミックス三次元構造体及びその製造方法
US6284384B1 (en) * 1998-12-09 2001-09-04 Memc Electronic Materials, Inc. Epitaxial silicon wafer with intrinsic gettering
DE19924649B4 (de) * 1999-05-28 2004-08-05 Siltronic Ag Halbleiterscheiben mit Kristallgitter-Defekten und Verfahren zur Herstellung derselben
US20030051656A1 (en) 1999-06-14 2003-03-20 Charles Chiun-Chieh Yang Method for the preparation of an epitaxial silicon wafer with intrinsic gettering
US6635587B1 (en) 1999-09-23 2003-10-21 Memc Electronic Materials, Inc. Method for producing czochralski silicon free of agglomerated self-interstitial defects
KR100378184B1 (ko) * 1999-11-13 2003-03-29 삼성전자주식회사 제어된 결함 분포를 갖는 실리콘 웨이퍼, 그의 제조공정및 단결정 실리콘 잉곳의 제조를 위한 초크랄스키 풀러
JP2001308101A (ja) * 2000-04-19 2001-11-02 Mitsubishi Materials Silicon Corp シリコンウェーハの熱処理方法及びシリコンウェーハ
DE10024710A1 (de) * 2000-05-18 2001-12-20 Steag Rtp Systems Gmbh Einstellung von Defektprofilen in Kristallen oder kristallähnlichen Strukturen
US6339016B1 (en) 2000-06-30 2002-01-15 Memc Electronic Materials, Inc. Method and apparatus for forming an epitaxial silicon wafer with a denuded zone
KR20030021185A (ko) * 2000-06-30 2003-03-12 엠이엠씨 일렉트로닉 머티리얼즈 인코포레이티드 디누디드 존을 갖는 실리콘 웨이퍼를 형성하는 방법 및 장치
US6599815B1 (en) 2000-06-30 2003-07-29 Memc Electronic Materials, Inc. Method and apparatus for forming a silicon wafer with a denuded zone
JP4055343B2 (ja) * 2000-09-26 2008-03-05 株式会社Ｓｕｍｃｏ シリコン半導体基板の熱処理方法
JP4106862B2 (ja) * 2000-10-25 2008-06-25 信越半導体株式会社 シリコンウェーハの製造方法
TWI256076B (en) * 2001-04-11 2006-06-01 Memc Electronic Materials Control of thermal donor formation in high resistivity CZ silicon
TW541581B (en) * 2001-04-20 2003-07-11 Memc Electronic Materials Method for the preparation of a semiconductor substrate with a non-uniform distribution of stabilized oxygen precipitates
US7749910B2 (en) * 2001-07-04 2010-07-06 S.O.I.Tec Silicon On Insulator Technologies Method of reducing the surface roughness of a semiconductor wafer
US7883628B2 (en) * 2001-07-04 2011-02-08 S.O.I.Tec Silicon On Insulator Technologies Method of reducing the surface roughness of a semiconductor wafer
FR2827078B1 (fr) * 2001-07-04 2005-02-04 Soitec Silicon On Insulator Procede de diminution de rugosite de surface
JP4567251B2 (ja) * 2001-09-14 2010-10-20 シルトロニック・ジャパン株式会社 シリコン半導体基板およびその製造方法
US6955718B2 (en) * 2003-07-08 2005-10-18 Memc Electronic Materials, Inc. Process for preparing a stabilized ideal oxygen precipitating silicon wafer
JP2005051040A (ja) * 2003-07-29 2005-02-24 Matsushita Electric Ind Co Ltd 半導体装置の製造方法及び半導体基板
KR100531552B1 (ko) * 2003-09-05 2005-11-28 주식회사 하이닉스반도체 실리콘 웨이퍼 및 그 제조방법
US7485928B2 (en) * 2005-11-09 2009-02-03 Memc Electronic Materials, Inc. Arsenic and phosphorus doped silicon wafer substrates having intrinsic gettering
US20090004426A1 (en) * 2007-06-29 2009-01-01 Memc Electronic Materials, Inc. Suppression of Oxygen Precipitation in Heavily Doped Single Crystal Silicon Substrates
US20090004458A1 (en) * 2007-06-29 2009-01-01 Memc Electronic Materials, Inc. Diffusion Control in Heavily Doped Substrates
JP2009177194A (ja) * 2009-03-19 2009-08-06 Sumco Corp シリコンウェーハの製造方法、シリコンウェーハ
JP7110204B2 (ja) * 2016-12-28 2022-08-01 サンエディソン・セミコンダクター・リミテッド イントリンシックゲッタリングおよびゲート酸化物完全性歩留まりを有するシリコンウエハを処理する方法

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JPS56158431A (en) * 1980-05-13 1981-12-07 Meidensha Electric Mfg Co Ltd Forming of oxidized film of semiconductor element for electric power
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Also Published As

Publication number Publication date
TW205110B (it) 1993-05-01
EP0557415A1 (en) 1993-09-01
SK47093A3 (en) 1993-08-11
FI932024A0 (fi) 1993-05-05
FI932024L (fi) 1993-06-29
MY110258A (en) 1998-03-31
JPH06504878A (ja) 1994-06-02
DE69130802D1 (de) 1999-03-04
FI932024A7 (fi) 1993-06-29
JP3412636B2 (ja) 2003-06-03
AU9033591A (en) 1992-06-11
US5403406A (en) 1995-04-04
IT9048481A0 (it) 1990-11-15
ATE176084T1 (de) 1999-02-15
IL99979A0 (en) 1992-08-18
IT1242014B (it) 1994-02-02
CZ84993A3 (en) 1993-11-17
KR100247464B1 (ko) 2000-03-15
DE69130802T2 (de) 1999-08-19
ZA918831B (en) 1992-08-26
IT9048481A1 (it) 1992-05-15
SG64901A1 (en) 1999-05-25
EP0557415B1 (en) 1999-01-20
WO1992009101A1 (en) 1992-05-29
JP2003243402A (ja) 2003-08-29

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