AU9033591A - Process for achieving controlled precipitation profiles in silicon wafers - Google Patents

Process for achieving controlled precipitation profiles in silicon wafers

Info

Publication number
AU9033591A
AU9033591A AU90335/91A AU9033591A AU9033591A AU 9033591 A AU9033591 A AU 9033591A AU 90335/91 A AU90335/91 A AU 90335/91A AU 9033591 A AU9033591 A AU 9033591A AU 9033591 A AU9033591 A AU 9033591A
Authority
AU
Australia
Prior art keywords
face
pct
central plane
nucleation centers
silicon wafers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU90335/91A
Inventor
Robert Falster
Giancarlo Ferrero
Graham Fisher
Massimiliano Olmo
Marco Pagani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
MEMC Electronic Materials SpA
Original Assignee
MEMC Electronic Materials SpA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by MEMC Electronic Materials SpA filed Critical MEMC Electronic Materials SpA
Publication of AU9033591A publication Critical patent/AU9033591A/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • H01L21/3225—Thermally inducing defects using oxygen present in the silicon body for intrinsic gettering

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Formation Of Insulating Films (AREA)
  • Silicon Compounds (AREA)
  • Surgical Instruments (AREA)
  • Safety Valves (AREA)
  • Vessels, Lead-In Wires, Accessory Apparatuses For Cathode-Ray Tubes (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

PCT No. PCT/IT91/00095 Sec. 371 Date May 13, 1993 Sec. 102(e) Date May 13, 1993 PCT Filed Nov. 11, 1991 PCT Pub. No. WO92/09101 PCT Pub. Date May 29, 1992.A silicon wafer containing oxygen precipitate nucleation centers (or oxygen precipitates) and having a first face, a second face, and a central plane equidistant between the first and second faces. The nucleation centers (or oxygen precipitates) have a non-uniform distribution between the first and second faces with a maximum density of the nucleation centers (or oxygen precipitates) being in a region which is between the first face and the central plane and nearer to the first face than the central plane. The density of the nucleation centers (or oxygen precipitates) increases from the first face to the region of maximum density and decreasing from the region of maximum density to the central plane.
AU90335/91A 1990-11-15 1991-11-11 Process for achieving controlled precipitation profiles in silicon wafers Abandoned AU9033591A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
IT48481A IT1242014B (en) 1990-11-15 1990-11-15 PROCEDURE FOR THE TREATMENT OF SILICON SLICES TO OBTAIN IN IT CONTROLLED PRECIPITATION PROFILES FOR THE PRODUCTION OF ELECTRONIC COMPONENTS.
IT48481/90 1990-11-15

Publications (1)

Publication Number Publication Date
AU9033591A true AU9033591A (en) 1992-06-11

Family

ID=11266818

Family Applications (1)

Application Number Title Priority Date Filing Date
AU90335/91A Abandoned AU9033591A (en) 1990-11-15 1991-11-11 Process for achieving controlled precipitation profiles in silicon wafers

Country Status (17)

Country Link
US (1) US5403406A (en)
EP (1) EP0557415B1 (en)
JP (2) JP3412636B2 (en)
KR (1) KR100247464B1 (en)
AT (1) ATE176084T1 (en)
AU (1) AU9033591A (en)
CZ (1) CZ84993A3 (en)
DE (1) DE69130802T2 (en)
FI (1) FI932024A (en)
IL (1) IL99979A (en)
IT (1) IT1242014B (en)
MY (1) MY110258A (en)
SG (1) SG64901A1 (en)
SK (1) SK47093A3 (en)
TW (1) TW205110B (en)
WO (1) WO1992009101A1 (en)
ZA (1) ZA918831B (en)

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US6503594B2 (en) * 1997-02-13 2003-01-07 Samsung Electronics Co., Ltd. Silicon wafers having controlled distribution of defects and slip
US6485807B1 (en) 1997-02-13 2002-11-26 Samsung Electronics Co., Ltd. Silicon wafers having controlled distribution of defects, and methods of preparing the same
SG64470A1 (en) 1997-02-13 1999-04-27 Samsung Electronics Co Ltd Methods of manufacturing monocrystalline silicon ingots and wafers by controlling pull rate profiles in a hot zone furnace and ingots and wafers manufactured thereby
US5994761A (en) * 1997-02-26 1999-11-30 Memc Electronic Materials Spa Ideal oxygen precipitating silicon wafers and oxygen out-diffusion-less process therefor
DE69841714D1 (en) 1997-04-09 2010-07-22 Memc Electronic Materials Silicon with low defect density and ideal oxygen precipitation
TW429478B (en) * 1997-08-29 2001-04-11 Toshiba Corp Semiconductor device and method for manufacturing the same
US5882989A (en) * 1997-09-22 1999-03-16 Memc Electronic Materials, Inc. Process for the preparation of silicon wafers having a controlled distribution of oxygen precipitate nucleation centers
US6340392B1 (en) 1997-10-24 2002-01-22 Samsung Electronics Co., Ltd. Pulling methods for manufacturing monocrystalline silicone ingots by controlling temperature at the center and edge of an ingot-melt interface
JPH11150119A (en) * 1997-11-14 1999-06-02 Sumitomo Sitix Corp Method and device for heat-treating silicon semiconductor substance
JP3746153B2 (en) * 1998-06-09 2006-02-15 信越半導体株式会社 Heat treatment method for silicon wafer
US6828690B1 (en) * 1998-08-05 2004-12-07 Memc Electronic Materials, Inc. Non-uniform minority carrier lifetime distributions in high performance silicon power devices
JP4405083B2 (en) 1998-09-02 2010-01-27 エムイーエムシー・エレクトロニック・マテリアルズ・インコーポレイテッド Method for producing ideal oxygen-deposited silicon wafer
JP2002524845A (en) * 1998-09-02 2002-08-06 エムイーエムシー・エレクトロニック・マテリアルズ・インコーポレイテッド Silicon-on-insulator structure obtained from single crystal silicon with low defect density
JP4405082B2 (en) 1998-09-02 2010-01-27 エムイーエムシー・エレクトロニック・マテリアルズ・インコーポレイテッド Thermally annealed wafers with improved internal getterability
US6336968B1 (en) 1998-09-02 2002-01-08 Memc Electronic Materials, Inc. Non-oxygen precipitating czochralski silicon wafers
JP4875800B2 (en) 1998-10-14 2012-02-15 エムイーエムシー・エレクトロニック・マテリアルズ・インコーポレイテッド Manufacturing method of single crystal silicon wafer
JP2000154070A (en) * 1998-11-16 2000-06-06 Suminoe Textile Co Ltd Ceramic three dimensional structure and its production
US6284384B1 (en) 1998-12-09 2001-09-04 Memc Electronic Materials, Inc. Epitaxial silicon wafer with intrinsic gettering
DE19924649B4 (en) * 1999-05-28 2004-08-05 Siltronic Ag Semiconductor wafers with crystal lattice defects and method for producing the same
US20030051656A1 (en) 1999-06-14 2003-03-20 Charles Chiun-Chieh Yang Method for the preparation of an epitaxial silicon wafer with intrinsic gettering
US6635587B1 (en) 1999-09-23 2003-10-21 Memc Electronic Materials, Inc. Method for producing czochralski silicon free of agglomerated self-interstitial defects
KR100378184B1 (en) * 1999-11-13 2003-03-29 삼성전자주식회사 Silicon wafer having controlled distribution of defects, process for the preparation of the same and czochralski puller for manufacturing monocrystalline silicon ingot
JP2001308101A (en) * 2000-04-19 2001-11-02 Mitsubishi Materials Silicon Corp Silicon wafer and its heat treatment method
DE10024710A1 (en) 2000-05-18 2001-12-20 Steag Rtp Systems Gmbh Setting defect profiles in crystals or crystal-like structures
US6599815B1 (en) 2000-06-30 2003-07-29 Memc Electronic Materials, Inc. Method and apparatus for forming a silicon wafer with a denuded zone
CN1441961A (en) * 2000-06-30 2003-09-10 Memc电子材料有限公司 Method and apparatus for forming silicon wafer with denuded zone
US6339016B1 (en) 2000-06-30 2002-01-15 Memc Electronic Materials, Inc. Method and apparatus for forming an epitaxial silicon wafer with a denuded zone
JP4055343B2 (en) * 2000-09-26 2008-03-05 株式会社Ｓｕｍｃｏ Heat treatment method for silicon semiconductor substrate
JP4106862B2 (en) * 2000-10-25 2008-06-25 信越半導体株式会社 Silicon wafer manufacturing method
US6897084B2 (en) * 2001-04-11 2005-05-24 Memc Electronic Materials, Inc. Control of oxygen precipitate formation in high resistivity CZ silicon
US20020179006A1 (en) * 2001-04-20 2002-12-05 Memc Electronic Materials, Inc. Method for the preparation of a semiconductor substrate with a non-uniform distribution of stabilized oxygen precipitates
FR2827078B1 (en) * 2001-07-04 2005-02-04 Soitec Silicon On Insulator METHOD FOR REDUCING SURFACE ROUGHNESS
US7883628B2 (en) * 2001-07-04 2011-02-08 S.O.I.Tec Silicon On Insulator Technologies Method of reducing the surface roughness of a semiconductor wafer
US7749910B2 (en) * 2001-07-04 2010-07-06 S.O.I.Tec Silicon On Insulator Technologies Method of reducing the surface roughness of a semiconductor wafer
JP4567251B2 (en) * 2001-09-14 2010-10-20 シルトロニック・ジャパン株式会社 Silicon semiconductor substrate and manufacturing method thereof
US6955718B2 (en) * 2003-07-08 2005-10-18 Memc Electronic Materials, Inc. Process for preparing a stabilized ideal oxygen precipitating silicon wafer
JP2005051040A (en) * 2003-07-29 2005-02-24 Matsushita Electric Ind Co Ltd Method of manufacturing semiconductor device, and semiconductor substrate
KR100531552B1 (en) * 2003-09-05 2005-11-28 주식회사 하이닉스반도체 Silicon wafer and method of fabricating the same
US7485928B2 (en) * 2005-11-09 2009-02-03 Memc Electronic Materials, Inc. Arsenic and phosphorus doped silicon wafer substrates having intrinsic gettering
US20090004458A1 (en) * 2007-06-29 2009-01-01 Memc Electronic Materials, Inc. Diffusion Control in Heavily Doped Substrates
US20090004426A1 (en) * 2007-06-29 2009-01-01 Memc Electronic Materials, Inc. Suppression of Oxygen Precipitation in Heavily Doped Single Crystal Silicon Substrates
JP2009177194A (en) * 2009-03-19 2009-08-06 Sumco Corp Method of manufacturing silicon wafer, and silicon wafer
WO2018125565A1 (en) * 2016-12-28 2018-07-05 Sunedison Semiconductor Limited Method of treating silicon wafers to have intrinsic gettering and gate oxide integrity yield

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JPS5680139A (en) * 1979-12-05 1981-07-01 Chiyou Lsi Gijutsu Kenkyu Kumiai Manufacture of semiconductor device
JPS56158431A (en) * 1980-05-13 1981-12-07 Meidensha Electric Mfg Co Ltd Forming of oxidized film of semiconductor element for electric power
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JPS60133734A (en) * 1983-12-21 1985-07-16 Mitsubishi Electric Corp Manufacture of semiconductor device
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US4622082A (en) * 1984-06-25 1986-11-11 Monsanto Company Conditioned semiconductor substrates
US4868133A (en) * 1988-02-11 1989-09-19 Dns Electronic Materials, Inc. Semiconductor wafer fabrication with improved control of internal gettering sites using RTA
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US5228927A (en) * 1988-03-25 1993-07-20 Shin-Etsu Handotai Company Limited Method for heat-treating gallium arsenide monocrystals
US5096839A (en) * 1989-09-20 1992-03-17 Kabushiki Kaisha Toshiba Silicon wafer with defined interstitial oxygen concentration

Also Published As

Publication number Publication date
US5403406A (en) 1995-04-04
DE69130802T2 (en) 1999-08-19
EP0557415A1 (en) 1993-09-01
KR100247464B1 (en) 2000-03-15
TW205110B (en) 1993-05-01
FI932024A (en) 1993-06-29
MY110258A (en) 1998-03-31
JP2003243402A (en) 2003-08-29
JP3412636B2 (en) 2003-06-03
IT9048481A0 (en) 1990-11-15
CZ84993A3 (en) 1993-11-17
IT9048481A1 (en) 1992-05-15
FI932024A0 (en) 1993-05-05
WO1992009101A1 (en) 1992-05-29
IL99979A0 (en) 1992-08-18
ATE176084T1 (en) 1999-02-15
EP0557415B1 (en) 1999-01-20
IT1242014B (en) 1994-02-02
JPH06504878A (en) 1994-06-02
ZA918831B (en) 1992-08-26
SG64901A1 (en) 1999-05-25
IL99979A (en) 1995-07-31
DE69130802D1 (en) 1999-03-04
SK47093A3 (en) 1993-08-11

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