JPH0697664B2 - Compound semiconductor annealing method - Google Patents

Description

TECHNICAL FIELD The present invention implants an ion that can be an N-type or P-type impurity into a compound semiconductor such as GaAs or InP, and then anneals the compound semiconductor at a high temperature to form an ion-implanted layer. It relates to a method of activation.

[Background technology]

When manufacturing a transistor or an integrated circuit by ion implantation using a compound semiconductor crystal substrate such as GaAs, an annealing step is indispensable for forming a conductive layer. Annealing is generally a high temperature heat treatment for several tens of minutes in a resistance heating furnace for a compound semiconductor substrate into which ions have been implanted. Since the heating temperature is higher than the temperature at which components with high vapor pressure contained in the substrate, such as As and P, start to vaporize, there is a problem in that the substrate undergoes thermal decomposition. Therefore, there is a problem that the electrical properties of the conductive layer formed on the surface of the substrate change due to the annealing, resulting in large variations.

In order to prevent this, annealing is performed under the vapor pressure of a component with a high vapor pressure, or a protective film for preventing evaporation, such as SiO ₂ film or Si ₃ N ₄
A method of annealing after forming the film on the substrate surface is adopted. However, in the former method, the gas containing a component having a high vapor pressure is toxic, so that the operation and treatment become complicated processes, and the productivity remains extremely low. On the other hand, in the latter case, since the properties of the film differ depending on the method of forming the protective film and the forming conditions, stability and reproducibility are low, and there is a problem that the protective film is cracked during annealing.

Further, in the conventional annealing method, high temperature heat treatment is performed for several tens of minutes in an electric furnace, so that residual impurities such as Cr and Mn in the substrate crystal diffuse or increase the concentration in the vicinity of the surface, so that they do not interact with the ion-implanted atoms. Is known to affect. For this reason, the activation rate due to annealing becomes unstable, making it difficult to control the electrical characteristics of transistors and integrated circuits. Further, in the conventional annealing method, lateral diffusion is also known, in which the implanted atoms diffuse for a sufficient number of microns in a direction parallel to the surface during annealing. For this reason, the implantation region, for example, the effective gate length changes, which is a serious problem from the aspect of device manufacturing that requires fine processing of 1 μm.

On the other hand, in recent years, an annealing method using an infrared lamp has been reported. FIG. 3 is an example thereof. Due to the feature that the substrate can be heated rapidly, the annealing time can be about 2 orders of magnitude shorter than that of the conventional method, so lateral diffusion can be suppressed and evaporation of As and P components with high vapor pressure can be minimized. It is reported that it can. However, evaporation of As and P cannot be eliminated in principle. For example, even if only heat-treated at 800 ° C. for 10 seconds, minute spots are formed over the entire surface of the mirror-polished GaAs substrate, so-called As loss is observed, and there is still a problem with evaporation of As and P.

Further, it is known that crystal annealing called "slipline", which is large enough to be observed with the naked eye, occurs when annealing is performed by taking advantage of the feature of rapid heating of an infrared lamp. This means that the crystallinity of that portion is destroyed, which is a serious obstacle to controlling the electrical characteristics of the transistor and the integrated circuit.

[Disclosure of Invention]

The present invention solves the drawbacks of the conventional method, and provides an annealing method capable of preventing thermal decomposition of a compound semiconductor, suppressing lateral diffusion, and preventing the occurrence of slip lines.

Hereinafter, the present invention will be described with reference to Examples. FIG. 1 illustrates a configuration of an annealing method according to the present invention when a GaAs substrate is used as a compound semiconductor. After being evacuated once, a pair of carbon graphite plates 13 of the same shape with a thickness of several mm are held in the center of the quartz tube 11 filled with N ₂ gas through a quartz jig 12 on both sides. With a thickness of 1000Å
A pair of GaAs substrates 15 with Si ₃ N ₄ film 14 formed by plasma CVD method
Are placed so that their ion-implanted surfaces face each other, and the quartz tube 11 is irradiated with heat from both sides of the GaAs substrate 15 by using a lamp heater 16 to heat it. The annealing temperature is
The heating rate and the annealing temperature were kept constant by measuring with a thermocouple installed near the GaAs substrate 15 and PID controlling the power applied to the lamp with reference to this. The sample annealed at 900 ° C. for 10 seconds by the annealing method according to the present invention showed the same carrier concentration profile as the sample annealed at 800 ° C. for 20 minutes in the conventional electric furnace. Furthermore, no slip line was observed in the conventional method even when the annealing was performed by rapid heating with the temperature rising rate during annealing of 20 ° C./sec to 80 ° C./sec, the same as in the conventional method.

In addition, when a lamp anneal method under the above conditions was applied to fabricate a GaAs field effect transistor with a pinch-off voltage in the range of 0V to -1.2V, the variation in pinch-off voltage of about 7,000 transistors in a 17mm x 17mm area was 1 sigma. At 50-10
I got a result of 0 mV. By the way, the variation when annealed as shown in FIG. 2 is as large as 150 to 250 mV for 1 sigma, and it is clear that the present invention has an effect of reducing the variation. The effects of mutually preventing thermal decomposition were confirmed.

One of the requirements constituting the present invention is to use not only infrared rays but also light having a shorter wavelength than infrared rays as the heat rays from the lamp. Since the compound semiconductor has a large transmittance with respect to the light rays in the infrared region, the heating of the compound semiconductor substrate by the infrared light is substantially inefficient. Therefore, in the present invention, the heating efficiency is remarkably improved by directly heating the substrate with light having a wavelength shorter than that of infrared rays and simultaneously heating the carbon graphite jig on which the substrate is placed with infrared rays.

Another requirement of the present invention is that the object, which efficiently absorbs the light from the lamp and serves as a heat source with respect to the semiconductor substrate, is arranged symmetrically in close contact with the substrate. As shown in FIG. 3, in the conventional method, the substrate is directly exposed to the atmosphere, and there is a steep temperature gradient in the thickness direction of the substrate, particularly on the substrate surface.
In the present invention, such a temperature gradient can be eliminated and slip lines can be prevented. From this point of view, the object sandwiching the substrate will satisfy the object of the present invention as long as it is a material that efficiently absorbs the light from the lamp, and is not limited to the examples.

Still another requirement is to form a protective film of an inorganic compound on at least the ion-implanted surface of the compound semiconductor substrate and anneal it. This makes it possible to completely prevent the evaporation of components having a high vapor pressure. Considering from this purpose, the inorganic compound film is not limited to the Si ₃ N ₄ film and the plasma CVD method of the embodiment, and other inorganic compound films such as SiO
It is also possible to form the _two films, the Al ₂ O ₃ film, the AlN film and the like by a known manufacturing method.

Further, the annealing is not limited to the N ₂ gas of the embodiment because the object of the present invention can be satisfied if the annealing is performed in an inert gas so that an unnecessary chemical reaction does not occur in the compound semiconductor substrate at a high temperature. In addition to N ₂ and N ₂ , an inert gas such as Ar and He, a H ₂ gas, and a mixed gas thereof can be applied.

[Brief description of drawings]

FIG. 1 is a diagram showing a configuration example of an annealing method according to the present invention, and FIG. 2 is a diagram for explaining an embodiment of the present invention. FIG. 3 shows a configuration example of a conventional annealing method. 11 …… Quartz tube 12 …… Quartz jig 13 …… Carbon graphite plate 14 …… Inorganic compound film 15 …… Compound semiconductor substrate 16 …… Lamp heater

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification code Internal reference number FI Technical indication location H01L 21/265 21/324 C 8617-4M D 8617-4M

Claims (1)

[Claims] 1. A compound semiconductor substrate is implanted with ions that can be N-type or P-type, and an inorganic compound film is formed on at least this ion-implanted surface. Stacked so as to face each other, sandwich the compound semiconductor substrate from the both sides in the thickness direction by a pair of supports made of a material that absorbs infrared rays and light in a wavelength range shorter than that, Annealing of a compound semiconductor, characterized in that supports are symmetrically arranged on both sides of the compound semiconductor substrates which are superposed, and the supports are heated by using a lamp having a spectrum in an infrared ray and a shorter wavelength region. Law.