JPS56158431A - Forming of oxidized film of semiconductor element for electric power - Google Patents
Forming of oxidized film of semiconductor element for electric powerInfo
- Publication number
- JPS56158431A JPS56158431A JP6295080A JP6295080A JPS56158431A JP S56158431 A JPS56158431 A JP S56158431A JP 6295080 A JP6295080 A JP 6295080A JP 6295080 A JP6295080 A JP 6295080A JP S56158431 A JPS56158431 A JP S56158431A
- Authority
- JP
- Japan
- Prior art keywords
- dry
- wet
- temperature
- fixed period
- oxidation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
Abstract
PURPOSE:To contrive to reduce defects of crystal by a process wherein an Si substrate is put ito dry N2 at 500-900 deg.C to be raised up to the oxidation temperature whereby up to 90% of the set temperature dry N2 is fed, then for a fixed period dry O2 is fed and thereafter to be changed over to wet O2 for maintaining for a fixed period to be slowly cooled as predetermined. CONSTITUTION:An Si substrate is put into the furnace being filled with dry N2 to be heated up to 900 deg.C for preventing low temperature oxidation. Next, when N2 surpassing 1,100 deg.C is changed over to dry O2 to be kept for more than 10min for making dense SiO2. After maintaining at the set temperature of 1,150 deg.C for more than 5min, the atmosphere is changed into wet O2 to be kept for a fixed period followed by wet oxidation for quick growth of SiO2. Subsequently the temperature is lowered to 900 deg.C at 100-300 deg.C/hr for further lowering at 50-60 deg.C/min. According to said process, crystal defects can be considerably checked.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6295080A JPS56158431A (en) | 1980-05-13 | 1980-05-13 | Forming of oxidized film of semiconductor element for electric power |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6295080A JPS56158431A (en) | 1980-05-13 | 1980-05-13 | Forming of oxidized film of semiconductor element for electric power |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS56158431A true JPS56158431A (en) | 1981-12-07 |
JPS6217853B2 JPS6217853B2 (en) | 1987-04-20 |
Family
ID=13215096
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6295080A Granted JPS56158431A (en) | 1980-05-13 | 1980-05-13 | Forming of oxidized film of semiconductor element for electric power |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56158431A (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59227128A (en) * | 1983-06-08 | 1984-12-20 | Hitachi Ltd | Oxidation method for semiconductor substrate |
JPS61220338A (en) * | 1985-03-26 | 1986-09-30 | Toshiba Corp | Manufacture of semiconductor device |
US4885257A (en) * | 1983-07-29 | 1989-12-05 | Kabushiki Kaisha Toshiba | Gettering process with multi-step annealing and inert ion implantation |
US5401669A (en) * | 1993-05-13 | 1995-03-28 | Memc Electronic Materials, Spa | Process for the preparation of silicon wafers having controlled distribution of oxygen precipitate nucleation centers |
US5403406A (en) * | 1990-11-15 | 1995-04-04 | Memc Electronic Materials, Spa | Silicon wafers having controlled precipitation distribution |
US6235563B1 (en) * | 1989-02-14 | 2001-05-22 | Seiko Epson Corporation | Semiconductor device and method of manufacturing the same |
-
1980
- 1980-05-13 JP JP6295080A patent/JPS56158431A/en active Granted
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59227128A (en) * | 1983-06-08 | 1984-12-20 | Hitachi Ltd | Oxidation method for semiconductor substrate |
JPH0223023B2 (en) * | 1983-06-08 | 1990-05-22 | Hitachi Ltd | |
US4885257A (en) * | 1983-07-29 | 1989-12-05 | Kabushiki Kaisha Toshiba | Gettering process with multi-step annealing and inert ion implantation |
JPS61220338A (en) * | 1985-03-26 | 1986-09-30 | Toshiba Corp | Manufacture of semiconductor device |
US6235563B1 (en) * | 1989-02-14 | 2001-05-22 | Seiko Epson Corporation | Semiconductor device and method of manufacturing the same |
US6403497B1 (en) | 1989-02-14 | 2002-06-11 | Seiko Epson Corporation | Method of manufacturing semiconductor device by two stage heating of deposited noncrystalline semiconductor |
US5403406A (en) * | 1990-11-15 | 1995-04-04 | Memc Electronic Materials, Spa | Silicon wafers having controlled precipitation distribution |
US5401669A (en) * | 1993-05-13 | 1995-03-28 | Memc Electronic Materials, Spa | Process for the preparation of silicon wafers having controlled distribution of oxygen precipitate nucleation centers |
Also Published As
Publication number | Publication date |
---|---|
JPS6217853B2 (en) | 1987-04-20 |
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