JPS59227128A - Oxidation method for semiconductor substrate - Google Patents

Oxidation method for semiconductor substrate

Info

Publication number
JPS59227128A
JPS59227128A JP58100915A JP10091583A JPS59227128A JP S59227128 A JPS59227128 A JP S59227128A JP 58100915 A JP58100915 A JP 58100915A JP 10091583 A JP10091583 A JP 10091583A JP S59227128 A JPS59227128 A JP S59227128A
Authority
JP
Japan
Prior art keywords
semiconductor substrate
oxide film
oxidizing
forming
initial
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58100915A
Other languages
Japanese (ja)
Other versions
JPH0223023B2 (en
Inventor
Hideo Honma
本間 秀男
Naohiro Monma
直弘 門馬
Masami Naito
正美 内藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP58100915A priority Critical patent/JPS59227128A/en
Publication of JPS59227128A publication Critical patent/JPS59227128A/en
Publication of JPH0223023B2 publication Critical patent/JPH0223023B2/ja
Priority to JP3121917A priority patent/JPH0783019B2/en
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate

Abstract

PURPOSE:To enable the attainment of an oxide film being uniform and having excellent repeatability by a method wherein a process of forming a thin initial oxide film of uniform thickness on a semiconductor substrate is provided before a process of forming a substantial oxide film on the semiconductor substrate. CONSTITUTION:After an unnecessary oxide film formed on the surface of an Si wafer 1 is removed completely, said surface is washed by flowing water. Next, dry oxygen is let to flow from a gas inlet port 3A into a quartz diffusion tube 3 heated by a heating furnace 4, the wafer 1 is inserted into the tube and held for a prescribed time, and thereby a thin initial oxide film of uniform thickness is formed on the wafer 1. Then, as a process of forming a substantial oxide film, dry oxygen is let to flow from one end 3A into the tube 3 maintained at a higher temperature than in the process in which the initial oxide film is formed, and then the wafer 1 with the initial oxide film formed thereon is inserted into the tube and held therein for a prescribed time. According to this oxidation method, the non-uniformity of the thickness of the oxide film in an initial period of growth thereof is eliminated, and thus an oxide film having very excellent uniformity and repeatability can be formed.

Description

【発明の詳細な説明】 (利用分野) 本発明は半導体基体の酸化法に係シ、特に、半導体基体
の表面に形成される酸化膜厚の均一性および再現性を改
善することのできる、半導体基体の酸化法に関する。
DETAILED DESCRIPTION OF THE INVENTION (Field of Application) The present invention relates to a method for oxidizing a semiconductor substrate, and in particular, to a method for oxidizing a semiconductor substrate, which can improve the uniformity and reproducibility of the oxide film thickness formed on the surface of the semiconductor substrate. Concerning a method of oxidizing a substrate.

(背 景) MOS)ランジスタで蝋、ゲート酸化膜の厚みが、その
しきい値電圧(vl)等の特性を左右するII!なパラ
メータであることは周知のとうりである。
(Background) In a MOS transistor, the thickness of the wax and gate oxide film influences its threshold voltage (vl) and other characteristics II! It is well known that this is a very important parameter.

近年、MOS  LSIの高集積化に伴い、前記ゲート
酸化膜の薄膜化が進んでいる。その結果、膜厚の均一化
が、製造プロセス上の重要なfilliとなってきてい
る。
In recent years, as MOS LSIs have become more highly integrated, the gate oxide film has become thinner. As a result, uniformity of film thickness has become an important filli in the manufacturing process.

ゲート酸化膜の形成法としては、 (1)他の方法に比べて膜厚の再現性が優れていること
や、 (2)装置が簡便であること などの造田刀・ゆ、酸化性の雰囲気ガス中で半導体基体
を加熱処理する熱酸化法が一般に用いられている。
The method for forming the gate oxide film has two advantages: (1) superior reproducibility of film thickness compared to other methods; (2) simple equipment; A thermal oxidation method in which a semiconductor substrate is heat-treated in a gas is generally used.

通常の場合、MOS  LSI等のゲート隈化膜の形成
は、ゲート酸化以前の工程で形成された半導体基体表面
のゲート形成領域の不要酸化膜を、フッ酸系の溶液で完
全に除去した後、酸化性の雰囲気ガス中で、前記半導体
基体を加熱処理することによって行なわれている。
Normally, when forming a gate shading film for MOS LSI, etc., the unnecessary oxide film in the gate formation region on the surface of the semiconductor substrate, which was formed in the process before gate oxidation, is completely removed using a hydrofluoric acid solution. This is carried out by heat-treating the semiconductor substrate in an oxidizing atmospheric gas.

しかし、この方法では、半導体基体の面内及びロット内
、ロット間の膜厚ばらつきが大きく、均一性、再現性が
十分でないという問題があった。゛すなわち、前記の方
法では、 (1)その基板が熱酸化炉のどの位置にをがれてぃたか
Kよって、形成される酸化膜の厚みが異なる。
However, this method has the problem that the film thickness varies greatly within the plane of the semiconductor substrate, within a lot, and between lots, resulting in insufficient uniformity and reproducibility. That is, in the above method: (1) The thickness of the oxide film formed differs depending on where in the thermal oxidation furnace the substrate is removed.

(2)一枚の基板内でも、酸化膜の厚みにばらつきを生
ずる。
(2) Even within a single substrate, variations occur in the thickness of the oxide film.

(3)ロフトごとに、同じ条件で処理しても、厚みがば
らり〈。
(3) Even if each loft is processed under the same conditions, the thickness will vary.

などの欠点があった。There were drawbacks such as.

(目 的) それゆえ、本発明の目的は、上記した不都合や欠点を除
去し、酸化膜の均一性および再現性の良好な、半導体基
体の酸化法を提供することにある。
(Objective) Therefore, it is an object of the present invention to provide a method for oxidizing a semiconductor substrate, which eliminates the above-mentioned disadvantages and drawbacks and provides a good uniformity and reproducibility of an oxide film.

(概 lり かかる目的を達成する本発明の特徴とするところは、半
導体基体を酸化性雰囲気ガス中で加熱処理して実質酸化
膜を形成する工程の前に1半導体基体に厚みの均一な、
極く薄い酸化膜を形成する工程を設けたことにある。
(Generally speaking, the present invention is characterized by the fact that, before the step of heat-treating the semiconductor substrate in an oxidizing atmosphere gas to form a substantial oxide film, a semiconductor substrate having a uniform thickness is formed.
The reason is that a process is provided to form an extremely thin oxide film.

(実施例) 以下、本発明について更に詳しく説明する。(Example) The present invention will be explained in more detail below.

膜厚dらつきの形態を詳細に調べた結果、膜厚のはらつ
きは、主に酸化の初期に起っていることがわかった。ま
た膜厚のばらつきは酸化の生長速度が大きいほど大きい
こともわかった。
As a result of a detailed investigation of the form of film thickness fluctuation, it was found that film thickness fluctuation mainly occurs at the initial stage of oxidation. It was also found that the variation in film thickness increases as the oxidation growth rate increases.

この原因は、前記の如く、酸化工程の初期に、7ツ酸系
の溶液で、半導体基体表面の酸化膜が完全に除去され、
極めて活性な表面が露出しでいるためであると考えられ
る。
The reason for this is that, as mentioned above, at the beginning of the oxidation process, the oxide film on the surface of the semiconductor substrate is completely removed with a heptazate-based solution.
This is thought to be because the extremely active surface remains exposed.

なぜならd、このように活性化された表WIh。Because d, the table WIh thus activated.

周知のよりに、高温の酸化性雰囲気中にさらされると、
酸化が極めて速い速度で進行する。しかも、このとき形
成される初期の酸化膜ははらつきが極めて大きい。そし
て、このばらつきは酸化速度が大きい場合径、顕著に現
われる。
As is well known, when exposed to a high temperature oxidizing atmosphere,
Oxidation proceeds at an extremely rapid rate. Moreover, the initial oxide film formed at this time has extremely large fluctuations. This variation becomes more noticeable when the oxidation rate is high.

しかし、一旦20〜30λ程度の酸化膜が形成されると
、その後は比較的ばらつきの少ない酸化が進行する。
However, once an oxide film of about 20 to 30 λ is formed, oxidation progresses with relatively little variation.

従りて、醸化初期に膜厚のばらつきを生じなけれは、均
一な酸化膜が形成できるはずである。すなわち、実質酸
化膜を形成する通常の酸化工程の前に、厚みの均一な酸
化薄膜をあらかじめ形成しておけば、最終的な酸化膜厚
のばらつきを大きく低減できるはずである。
Therefore, a uniform oxide film should be able to be formed unless variations in film thickness occur at the early stage of fermentation. That is, if a thin oxide film with a uniform thickness is formed in advance before a normal oxidation process for forming a substantial oxide film, it should be possible to greatly reduce variations in the final oxide film thickness.

本発明社、前述のような考察に基づいて案出されたもの
である。
This invention was devised by the present inventor based on the above considerations.

実質酸化膜を形成する酸化処理前に、厚みの均一な散化
薄膜を形成する方法として杜、前記の如く酸化初期の膜
厚がばらつく範囲の酸化速度を低下させることが考えら
れる。すなわち、酸化性雰囲気ガス中で半導体基体を加
熱処理する前に、(1)これよシ低温において加熱処理
する方法、あるいは (2)前記酸化性の雰囲気ガスよりも酸素又は水分の分
圧を下げた雰囲気ガス中で加熱処理する方法、 などが考えられる。
Before the oxidation treatment to form a substantial oxide film, one possible method for forming a dispersed thin film with a uniform thickness is to reduce the oxidation rate in the range where the film thickness varies at the initial stage of oxidation, as described above. That is, before heat-treating a semiconductor substrate in an oxidizing atmospheric gas, (1) a method of heat-treating at a much lower temperature, or (2) a method of lowering the partial pressure of oxygen or moisture than the aforementioned oxidizing atmospheric gas. Possible methods include heat treatment in a heated atmosphere gas.

仁れらの方法であれば、半導体基体の表面に成長する初
期酸化膜の生長速度が、実質酸化膜を形成する工程での
生長速度よシ小さいので、比較的厚みの均一な初期酸化
薄膜を形成することができる。
With Nire et al.'s method, the growth rate of the initial oxide film that grows on the surface of the semiconductor substrate is smaller than the growth rate in the process of forming a substantial oxide film, so it is possible to form an initial oxide thin film with a relatively uniform thickness. can be formed.

実質酸化膜を形成する酸化工程の前に、厚みの均一な初
期酸化薄膜を形成する他の方法としては、半導体基体を
7ツ酸系の溶液で処理して所望部分の不要酸化膜を完全
に除去した後、酸化性の溶液に浸漬する方法が考えられ
る。
Another method for forming an initial thin oxide film with a uniform thickness before the oxidation process to form a substantial oxide film is to treat the semiconductor substrate with a heptazate-based solution to completely remove unnecessary oxide films from desired areas. One possible method is to immerse it in an oxidizing solution after removing it.

この場合に好適な酸化性の溶液としては、硝酸、塩酸、
硫酸あるいは王水などがあげられる。また、これらの溶
液とアルカリ溶液(例えに1アンモニア水など)との混
合溶液であってもよい。なお、アルカリ溶液はシリコン
に対してエツチング作用をもつが、混合溶液が、全体と
して酸化性であればよい。
Suitable oxidizing solutions in this case include nitric acid, hydrochloric acid,
Examples include sulfuric acid or aqua regia. Alternatively, a mixed solution of these solutions and an alkaline solution (for example, 1 ammonia water, etc.) may be used. Although the alkaline solution has an etching effect on silicon, it is sufficient if the mixed solution as a whole is oxidizing.

一例として、100℃に保たれた硝酸中に、シリコン基
板を20分間浸漬すれば、約20′Aの均一な酸化膜が
生長する。このシリコンウニハラ酸化性雰囲気ガス中て
加熱処理1れE1極めて均一性の良い酸化膜が形成でき
る。
For example, if a silicon substrate is immersed in nitric acid maintained at 100° C. for 20 minutes, a uniform oxide film of about 20'A will grow. By heating the silicon urchin in the oxidizing atmospheric gas E1, an oxide film with extremely good uniformity can be formed.

第1Ii!、lは本発明の方法を実施するのに好適な熱
酸化装置の構造を示す断面図である。
1st Ii! , l are cross-sectional views showing the structure of a thermal oxidation apparatus suitable for carrying out the method of the present invention.

石英拡散管3の内部には、ウェハホルダ2が装填され、
ウェハホルダ2の上には、多数のシリコン基体lが、互
いに間隔をおいて平行に載置ぜれる。石英拡散管3の外
周には加熱用電気炉4が配置される。
A wafer holder 2 is loaded inside the quartz diffusion tube 3,
A large number of silicon substrates 1 are placed on the wafer holder 2 in parallel and spaced apart from each other. A heating electric furnace 4 is arranged around the outer periphery of the quartz diffusion tube 3 .

また、石英拡散管3は処理カス導入口3Aを有している
Furthermore, the quartz diffusion tube 3 has a treatment scum inlet 3A.

つぎに、本発明者らが行なった実駿例について具体的に
説明する。
Next, an actual example conducted by the present inventors will be specifically explained.

爽験例1゜ この実験において用いた牛導体基体杜、面方位(10す
、n型導電性、抵抗率10flcrn、直径76■、厚
み500μmのシリコンウェハ〜1(20枚)である。
Experimental Example 1 The conductor substrates used in this experiment were silicon wafers (20 wafers) having a surface orientation of 10 mm, n-type conductivity, resistivity of 10 flcrn, diameter of 76 mm, and thickness of 500 μm.

まず、このシリコンクエバをHF:H,O= 1 : 
4の溶液中に1分間浸漬し、表面に形成されていた不要
な酸化膜を完全に除去した後、純水中で約15分間流水
洗浄した。なお、この洗浄によりてシリコンウェハに生
成された酸化膜は、2〜3^の厚さであった。
First, convert this silicon cube into HF:H,O=1:
After being immersed in the solution of No. 4 for 1 minute to completely remove the unnecessary oxide film formed on the surface, it was washed in running pure water for about 15 minutes. Note that the oxide film formed on the silicon wafer by this cleaning had a thickness of 2 to 3^.

次に、加熱用電気炉4によjt800℃に保たれた石英
拡散管3内に、その一端の処理ガス導入口3Aから乾燥
WR素を31/分の割合で流し、この中に前記シリコン
クエバlを挿入して10分間保持した後、石英拡散管3
内から取り出した。このとき、シリコンクエバに形成さ
れた初期酸化膜は20Aであった。
Next, the dry WR element is poured into the quartz diffusion tube 3 kept at 800° C. by the heating electric furnace 4 from the processing gas inlet 3A at one end at a rate of 31/min, and the silicone WR element is poured into the quartz diffusion tube 3 kept at 800° C. After inserting and holding for 10 minutes, insert the quartz diffusion tube 3
I took it out from inside. At this time, the initial oxide film formed on the silicon cube was 20A.

次に実質酸化膜を形成する工程として、1ooo℃に保
たれた石英拡散管内に一端3Aから乾燥酸素を3t15
+ずつ流し、初期酸化薄膜を形成した紬記シリコンウェ
ハを挿入して60分間保持した。その後、シリコンウェ
ハ1を石英拡散管3から取り出し、酸化膜厚をエリプン
メータにて測定した1゜膜厚の測定は、各ウェハについ
て、中心の1点及び周辺の4点(シリコンウェハの端カ
ラ10W+の点で相互に90の角度をもつ位置)の計5
点である。このようにして全ウェハ(20枚)を測定し
た。更に、同一の実験を10ロット繰り返し行ない、再
現性を評価した結果を、第2図AK示した。
Next, as a step to form a substantial oxide film, 3t15 of dry oxygen is introduced into the quartz diffusion tube maintained at 100°C from 3A at one end.
A silicon wafer having an initial oxidized film formed thereon was inserted and held for 60 minutes. Thereafter, the silicon wafer 1 was taken out from the quartz diffusion tube 3, and the oxide film thickness was measured using an ellipsometer. 5 positions at an angle of 90 to each other)
It is a point. All wafers (20 wafers) were measured in this manner. Furthermore, the same experiment was repeated for 10 lots and the reproducibility was evaluated. The results are shown in FIG. 2AK.

また比較のために、800℃での熱処理(初期酸化薄膜
の形成処理)を施こさない(他の条件は本実験例と同一
)従来法での実験も、10ロット行ない、結果を第2@
Bに示した。
For comparison, we also conducted 10 lots of experiments using the conventional method without heat treatment at 800°C (initial oxide thin film formation treatment) (other conditions were the same as in this experiment), and the results were reported in the second @
Shown in B.

なお、表1に本実験例と従来法との膜厚ばらつきの比較
を、ウェハ面内及びロット内、ロット間#112図A、
Bの比較及び表1から明らかなように1本発明による実
験例では、従来法に比べてウェハ面内及びPット内、ロ
ット間のいずれにおいてもばらつきがi以下に低減して
おり、本発明の効果が確認できた。
Table 1 shows a comparison of the film thickness variations between this experimental example and the conventional method.
As is clear from the comparison of B and Table 1, in the experimental example according to the present invention, the variation within the wafer surface, within the Plot, and between lots was reduced to less than i compared to the conventional method. The effectiveness of the invention was confirmed.

実施例 次1(本発明の第20奥験例について説明する。Example Next 1 (The 20th example of the present invention will be explained.

用いた半導体基体は、前記第1の実験例ど同一であり、
シリコンウェハの前処理洗浄も同一である。
The semiconductor substrate used was the same as in the first experimental example,
The pretreatment cleaning of silicon wafers is also the same.

まず、950°CK保たれた石英拡散管3内に、一端3
Aから酸素0.611分と窒素2.71/分の混合気体
を流し、この中にシリコンウェハ1を挿入して10分間
保持した後、我人カスを酸素6115;+のみに切り換
えて60分間保持した。
First, one end of the 3
A mixed gas of 0.611 min of oxygen and 2.71 min of nitrogen was flowed through A, and after inserting the silicon wafer 1 into this and holding it for 10 minutes, the gas was switched to only oxygen 6115;+ for 60 minutes. held.

その後、石英拡散管6内からシリコンウェハ1を取り出
し、第1の実験例と同様な方法で、膜厚を評価し、た。
Thereafter, the silicon wafer 1 was taken out from inside the quartz diffusion tube 6, and the film thickness was evaluated in the same manner as in the first experimental example.

なお、#記混合気体による10分間の熱電′理で、シリ
コンウェハに生成された初期酸化膜厚は、40〜42λ
であった。
In addition, the initial oxide film thickness generated on the silicon wafer by thermoelectric treatment for 10 minutes using the mixed gas # is 40 to 42λ.
Met.

更に、同一の実験を10ロット繰シ返し行ない、再現性
を評価した結果を第3図Cに示した。また、比較のため
酸素0.317分と窒素2.71797の混合気体中で
の熱処理を施こさない(池の争件は本実験例と同一)従
来法での実験も10ロット行ない、その結果を第3図り
に示した。
Furthermore, the same experiment was repeated in 10 lots and the reproducibility was evaluated. The results are shown in FIG. 3C. For comparison, we also conducted 10 lots of experiments using the conventional method without heat treatment in a gas mixture of 0.317 minutes of oxygen and 2.7179 hours of nitrogen (the issue of ponds is the same as this experiment example). is shown in the third diagram.

なお、表2に本実験例と従来法との膜厚はらつきの比較
を、ウェハ面内及びロット内、ロット間に分けて示した
Note that Table 2 shows a comparison of film thickness variations between this experimental example and the conventional method, divided into within the wafer plane, within a lot, and between lots.

表  2 第3図C,Dの比較及び表2から明らかなように、本発
明の実験例では、従来法に比べて、ウェハ面内及びロー
ト内、ロット間のいずれにおいてもばらつきがに以下に
低減しており、本発明の効果が確認できた。
Table 2 As is clear from the comparison between Figures C and D and Table 2, in the experimental example of the present invention, the variation within the wafer plane, within the funnel, and between lots was significantly reduced compared to the conventional method. The effect of the present invention was confirmed.

実施例 次に本発明の第3の実験例について説明する。Example Next, a third experimental example of the present invention will be explained.

用いた半導体基体は面方位(100)、n m導電性、
抵抗率2Ω譚、直径100wm、厚み500μmのシリ
コンウェハ(20枚)である。
The semiconductor substrate used had a plane orientation (100), nm conductivity,
These are silicon wafers (20 pieces) with a resistivity of 2Ω, a diameter of 100 wm, and a thickness of 500 μm.

まず、このウェハをHF:HtO=1 : 4の溶液中
に1分間浸漬し、表面に生成されていた不要な酸化膜を
完全に除去した後、純水中で約15分間流水洗浄した。
First, this wafer was immersed in a solution of HF:HtO=1:4 for 1 minute to completely remove an unnecessary oxide film formed on the surface, and then washed in running pure water for about 15 minutes.

更にその後、100℃に保たれた硝酸(HNO,) 中
に20分間浸漬した後、純水中で約15分間流水洗浄し
た。
Furthermore, after that, it was immersed in nitric acid (HNO,) maintained at 100° C. for 20 minutes, and then washed in running pure water for about 15 minutes.

前記の処理でシリコンウェハに生成された初期酸化膜厚
は19〜20°であった。こうして洗浄しンtシリコン
ウェハを、950℃に保たれた石英拡散1f3内に一端
から酸素317分とS1素311分の混合気体を流した
中に挿入して、100分間保持した。
The initial oxide film thickness produced on the silicon wafer by the above process was 19-20 degrees. The thus cleaned silicon wafer was inserted into a quartz diffusion chamber kept at 950° C. in which a mixed gas of 317 minutes of oxygen and 311 minutes of S1 was flowed from one end, and held for 100 minutes.

その後、シリコンウェハ1を石英拡散管3から取り出し
、第1の実験例と同様にして、実質酸化膜の膜厚を測定
した。更に、同一の実験を10ロット繰り返し、評価し
た結果を第4図Eに示した。
Thereafter, the silicon wafer 1 was taken out from the quartz diffusion tube 3, and the substantial thickness of the oxide film was measured in the same manner as in the first experimental example. Furthermore, the same experiment was repeated for 10 lots, and the evaluation results are shown in FIG. 4E.

また比較のために、硝酸中に浸漬する処理を旅さない(
他の条件は本実験例と同一)従来法での実験も10ロッ
ト行ない、結果を第4図Fに示した。
Also for comparison, the process of immersion in nitric acid is not carried out (
Other conditions were the same as in this experiment) Experiments using the conventional method were also conducted in 10 lots, and the results are shown in FIG. 4F.

な訃、表3に本実験例と従来法との膜厚ばらつきの比較
を、ウェハ面内及びロット内、ロット間に分けて示した
。    表  3 第4図A、Bの比較及び表3から明らかなように、本実
験例によれけ、従来法に比べてウェハ面内及びロット内
、ロット間のいずれにおいてもばらつきがA以下に低減
しておシ、本発明の効果が確認できた。
Furthermore, Table 3 shows a comparison of film thickness variations between this experimental example and the conventional method, divided into within the wafer plane, within a lot, and between lots. Table 3 As is clear from the comparison between Figures A and B in Figure 4 and Table 3, this experimental example reduced the deviation within the wafer surface, within a lot, and between lots to below A compared to the conventional method. Finally, the effects of the present invention were confirmed.

実施例 次に、本発明の第4の嚢験例について説明する。Example Next, a fourth bag test example of the present invention will be explained.

用いた半導体基体は、面方位(100)、n型導電性、
抵抗率8Ω譚、直径100m1厚み500μmのシリコ
ンウェハでちる。シリコンウェハの前処理洗浄は、前記
第1の実験例と同一で行なった。
The semiconductor substrate used had a plane orientation (100), n-type conductivity,
Chilled with a silicon wafer with a resistivity of 8Ω, a diameter of 100m, and a thickness of 500μm. The pretreatment cleaning of the silicon wafer was performed in the same manner as in the first experimental example.

まず、950℃に保たれた石英拡散管3内に、その一端
3Aから酸素3.ot/l)と水素0.061贋を流し
て燃焼させる。その結果生じる2、97 ty%の酸素
と0.061/fj−の水蒸気(HtO)との混合気流
中に、シリコンウェハを挿入し2分間保持した。
First, oxygen 3. ot/l) and 0.061 ml of hydrogen to be combusted. A silicon wafer was inserted into the resulting mixed gas flow of 2.97 ty% oxygen and 0.061/fj- water vapor (HtO) and held for 2 minutes.

その後、酸素を31791の一定流量に保持したまま、
水素流量を1.81z%に切)換え(このときは、水素
の燃焼により、1.8j乃)の水蒸気と2.11.々の
酸素の混合気流となる)10分冊保持した。
After that, while maintaining the oxygen at a constant flow rate of 31791,
The hydrogen flow rate is changed to 1.81z%) (in this case, due to the combustion of hydrogen, 1.8j~) water vapor and 2.11. 10 volumes were held (resulting in a mixed air flow of different oxygen).

その後、石英拡散管3自からシリコンウェハlを取シ出
し、第1の実験例と同様な方法で、膜厚を評価した1、
史に同一の実験を1013ノド静シ返し行ない、^担悸
を評価した峙朱を、第5図Gに示した。
After that, the silicon wafer l was taken out from the quartz diffusion tube 3, and the film thickness was evaluated using the same method as in the first experimental example.
The same experiment was repeated 1013 times, and the results of the evaluation of palpitations are shown in Figure 5G.

tた比K (’) タメK flJ! In 2.97
175> ト水RsfAO,oet/分の混合気流中で
の熱処理を施こさない(他の条件は本実M例と1141
−)従来法での実験も10(1ット行ない、その結果を
ffi51MHに示した、。
tta ratioK (') tameK flJ! In 2.97
175> Heat treatment is not performed in a mixed air flow of water RsfAO, oet/min (other conditions are the present Example M and 1141
-) Experiments using the conventional method were also conducted for 10 times (1 unit), and the results were shown on ffi51MH.

なお、宍4に、本実験例と従来法とのM厚ばらつきの比
較を、ウェハ面内及びロット内、ロット第5図G、Hの
比較及び表4から明らかなように、本発明の実験例によ
れば従来法に比べてウェハ面内、ロット内、ロット間の
いずれにおいても、ばらつきがA以下に低減しており、
本発明の効果が確認できた1゜ なお、特許請求の範囲に記載した他の条件で実験しても
、本発明の効果を奏することが確認された。
In addition, Figure 4 shows a comparison of the M thickness variation between this experimental example and the conventional method. For example, compared to the conventional method, the variation within a wafer, within a lot, and between lots has been reduced to below A.
The effects of the present invention have been confirmed 1. Furthermore, it has been confirmed that the effects of the present invention can be achieved even when experiments are conducted under other conditions described in the claims.

(効 果) 以上において説明したように、本発明によれば、酸化膜
の生長初期における膜厚ばらつきがなくなるので、極め
て均一性、再現性の良い酸化膜が形成でき、ひいてはM
OS  LSI等の特性及び製造歩留りを大幅に向上す
ることができる。
(Effects) As explained above, according to the present invention, film thickness variations in the early stage of oxide film growth are eliminated, so an oxide film with extremely good uniformity and reproducibility can be formed, and as a result, M
The characteristics and manufacturing yield of OS LSI etc. can be significantly improved.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の方法を実施するのに好適な熱酸化装置
の栴造を示す断面図、第2図、第3図、第4図および第
5図は本発明の方法によって製造した酸化膜厚のばらつ
き状況を従来法によるほらつき状況と対比して示す図で
ある。。 1・・・シリコンML  2・・・ウエノ1ホルダ、3
・・・石衿拡散管、4・・・加熱用電気炉、3A・・・
処理ガス導入口 代理人弁理士  平 木 道 人 第1図 ム 第2図 第 3 図        o゛yL4号ロット番号 1S 4 悶 1  2  3 4  5 6 7  8 9 10ロ
ット番号 第5図 1  2 3 4 5 6 7 8 9 10口・シト
番号
FIG. 1 is a sectional view showing the construction of a thermal oxidation apparatus suitable for carrying out the method of the present invention, and FIGS. 2, 3, 4, and 5 show oxidation FIG. 3 is a diagram showing the state of film thickness variation in comparison with the state of flaking caused by a conventional method. . 1... Silicon ML 2... Ueno 1 holder, 3
...Stone collar diffusion tube, 4...Electric furnace for heating, 3A...
Processing gas inlet representative Patent attorney Michito Hiraki Figure 1 Figure 2 Figure 3 Figure oyL4 Lot number 1S 4 Agony 1 2 3 4 5 6 7 8 9 10 Lot number Figure 5 1 2 3 4 5 6 7 8 9 10 units/site number

Claims (1)

【特許請求の範囲】 (1)酸化性の雰囲気ガス中で半導体基体を加熱処理し
て成される半導体基体の酸化法において、半導体基体を
前記酸化性雰囲気ガス中で加熱処理して実質酸化膜を形
成する工程の前に、半導体基体を実質酸化する前記工程
における酸化速度より遅い速度で半導体基体に厚みの均
一な初期酸化薄膜を形成する工程を設けたことを特徴と
する半導体基体の酸化法。 (2、特許請求の範囲第1項において、前記半導体基体
に初期酸化薄膜を形成する工程が、半導体基体を実質酸
化する工程の温度より低い温度で実行されることを特徴
とする半導体基体の酸化法。 (3)特許請求の範囲第1項において、前記半導体基体
に初期酸化薄膜を形成する工程が、半導体基体を実質酸
化する工程の雰囲気より、酸素分圧の低い条件で実行さ
れることを特徴とする半導体基体の酸化法。 (4)特許請求の範囲第1項に訃いて、前記半導体基体
に初期酸化薄膜を形成する工程が、酸化性の薬液処理で
成されることを特徴とする半導体基体の酸化法。 (5)特許請求の範囲第1項において、前記半導体基体
に初期酸化薄膜を形成する工程が、半導体基体を実質酸
化する工程の雰囲気よυ、水蒸気分圧の低い条件で実行
されることを特徴とする半導体基体の酸化法。
[Scope of Claims] (1) In a method of oxidizing a semiconductor substrate, which is performed by heat-treating a semiconductor substrate in an oxidizing atmospheric gas, the semiconductor substrate is heated in the oxidizing atmospheric gas to form a substantial oxide film. A method for oxidizing a semiconductor substrate, comprising, before the step of forming, a step of forming an initial oxide thin film with a uniform thickness on the semiconductor substrate at a rate slower than the oxidation rate in the step of substantially oxidizing the semiconductor substrate. . (2. In Claim 1, the oxidation of a semiconductor substrate is characterized in that the step of forming an initial oxide thin film on the semiconductor substrate is performed at a temperature lower than the temperature of the step of substantially oxidizing the semiconductor substrate. (3) In claim 1, it is provided that the step of forming an initial oxide thin film on the semiconductor substrate is carried out under conditions with a lower oxygen partial pressure than the atmosphere of the step of substantially oxidizing the semiconductor substrate. A method for oxidizing a semiconductor substrate characterized by: (4) According to claim 1, the step of forming an initial oxide thin film on the semiconductor substrate is performed by an oxidizing chemical treatment. (5) A method for oxidizing a semiconductor substrate. (5) In claim 1, the step of forming an initial oxidized thin film on the semiconductor substrate is performed under conditions where the water vapor partial pressure is lower than the atmosphere of the step of substantially oxidizing the semiconductor substrate. A method of oxidizing a semiconductor substrate, characterized in that it is carried out.
JP58100915A 1983-06-08 1983-06-08 Oxidation method for semiconductor substrate Granted JPS59227128A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP58100915A JPS59227128A (en) 1983-06-08 1983-06-08 Oxidation method for semiconductor substrate
JP3121917A JPH0783019B2 (en) 1983-06-08 1991-04-25 Oxidation method of semiconductor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58100915A JPS59227128A (en) 1983-06-08 1983-06-08 Oxidation method for semiconductor substrate

Related Child Applications (2)

Application Number Title Priority Date Filing Date
JP3121917A Division JPH0783019B2 (en) 1983-06-08 1991-04-25 Oxidation method of semiconductor substrate
JP5016798A Division JPH0727898B2 (en) 1993-01-08 1993-01-08 Oxidation method of semiconductor substrate

Publications (2)

Publication Number Publication Date
JPS59227128A true JPS59227128A (en) 1984-12-20
JPH0223023B2 JPH0223023B2 (en) 1990-05-22

Family

ID=14286629

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58100915A Granted JPS59227128A (en) 1983-06-08 1983-06-08 Oxidation method for semiconductor substrate

Country Status (1)

Country Link
JP (1) JPS59227128A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06244174A (en) * 1993-08-04 1994-09-02 Tadahiro Omi Formation of insulating oxide film
JPH09251995A (en) * 1989-05-07 1997-09-22 Tadahiro Omi Method for forming insulation oxide film
US7064084B2 (en) 2001-02-28 2006-06-20 Tokyo Electron Limited Oxide film forming method

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100343151B1 (en) * 1999-10-28 2002-07-05 김덕중 High voltage semiconductor device using SIPOS and method for fabricating the same

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4870481A (en) * 1971-12-23 1973-09-25
JPS5421265A (en) * 1977-07-19 1979-02-17 Mitsubishi Electric Corp Forming method of semiconductor oxide film
JPS5447577A (en) * 1977-09-22 1979-04-14 Fujitsu Ltd Production of semiconductor device
JPS56158431A (en) * 1980-05-13 1981-12-07 Meidensha Electric Mfg Co Ltd Forming of oxidized film of semiconductor element for electric power

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4870481A (en) * 1971-12-23 1973-09-25
JPS5421265A (en) * 1977-07-19 1979-02-17 Mitsubishi Electric Corp Forming method of semiconductor oxide film
JPS5447577A (en) * 1977-09-22 1979-04-14 Fujitsu Ltd Production of semiconductor device
JPS56158431A (en) * 1980-05-13 1981-12-07 Meidensha Electric Mfg Co Ltd Forming of oxidized film of semiconductor element for electric power

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09251995A (en) * 1989-05-07 1997-09-22 Tadahiro Omi Method for forming insulation oxide film
JPH06244174A (en) * 1993-08-04 1994-09-02 Tadahiro Omi Formation of insulating oxide film
US7064084B2 (en) 2001-02-28 2006-06-20 Tokyo Electron Limited Oxide film forming method

Also Published As

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JPH0223023B2 (en) 1990-05-22

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