JPS62123098A - Silicon single crystal - Google Patents

Silicon single crystal

Info

Publication number
JPS62123098A
JPS62123098A JP26135185A JP26135185A JPS62123098A JP S62123098 A JPS62123098 A JP S62123098A JP 26135185 A JP26135185 A JP 26135185A JP 26135185 A JP26135185 A JP 26135185A JP S62123098 A JPS62123098 A JP S62123098A
Authority
JP
Japan
Prior art keywords
gas
silicon single
single crystal
oxidation
heat treatment
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP26135185A
Other languages
Japanese (ja)
Other versions
JPH0561240B2 (en
Inventor
Hiroshi Shirai
宏 白井
Norihei Takai
高井 法平
Yoshio Kirino
桐野 好生
Kenji Akai
赤井 賢二
Takeshi Kon
今 武志
Hiromitsu Nakanishi
中西 宏円
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Coorstek KK
Original Assignee
Toshiba Ceramics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Ceramics Co Ltd filed Critical Toshiba Ceramics Co Ltd
Priority to JP26135185A priority Critical patent/JPS62123098A/en
Publication of JPS62123098A publication Critical patent/JPS62123098A/en
Publication of JPH0561240B2 publication Critical patent/JPH0561240B2/ja
Granted legal-status Critical Current

Links

Abstract

PURPOSE:To obtain a silicon single crystal having great effect on reduction of crystal defect density, by heat-treating the silicon single crystal for semiconductor within a specific temperature range in an atmosphere of H2 gas over a specified time. CONSTITUTION:A silicon single crystal for semiconductors, particularly CZ- silicon single crystal for semiconductors is heat-treated within 800-1,350 deg.C temperature range in an atmosphere of H2 gas for 1sec-48hr. The H2 gas may be 100% H2 gas and diluted with N2 gas or inert gas or a mixed gas thereof. In the latter case, the ratio of H2 to N2 or inert gas is preferably 1:>=9.

Description

【発明の詳細な説明】 ・ の1 この発明は半導体用のシリコン単結晶の改良に関するも
のである。
DETAILED DESCRIPTION OF THE INVENTION - No. 1 This invention relates to improvements in silicon single crystals for semiconductors.

従1と艮頂− 半導体用のシリコン単結晶において、結晶欠陥を低減す
るために種々の処理が行なわれている。例えば、そのよ
うな結晶欠陥を低減する技術の1つとして無欠陥NJ 
(D enudedzone>処理が知られている。
1 and 1 - Various treatments are carried out to reduce crystal defects in silicon single crystals for semiconductors. For example, one of the technologies to reduce such crystal defects is defect-free NJ.
(Denudedzone> processing is known.

無欠陥層処理を施したウェーハは高温熱処理工程を経て
製造されるため、ウェーハ表面の格子間のM素濃度が減
少する。そのために、ウェーハ表面近傍には微小欠陥(
Blllk  Micro  Defect 、酸素析
出物)が生成せず、デバイスプロセスにおいて、結晶欠
陥の誘因となる汚染重金属元素がバルク中の微小欠陥(
3ulk  M 1cro  defect)にトラッ
プされる。すなわち、イントリンシック・ゲッタリング
効果(rG効果)が生ずるのである。この結果、酸化誘
起積層欠陥(Oxidation  1nduced 
 Stacking  Fault)の発生が減少する
Since the wafer subjected to the defect-free layer treatment is manufactured through a high-temperature heat treatment process, the concentration of M element between the lattices on the wafer surface is reduced. Therefore, micro defects (
Blllk Micro Defects (oxygen precipitates) are not generated, and in the device process, contaminating heavy metal elements that cause crystal defects are caused by micro defects (oxygen precipitates) in the bulk.
3ulk M 1cro defect). That is, an intrinsic gettering effect (rG effect) occurs. As a result, oxidation induced stacking faults
The occurrence of stacking faults is reduced.

一般にIG効果は製造歩留りの向上とデバイスの信頼性
の向上に役立つといわれている。
It is generally said that the IG effect is useful for improving manufacturing yield and device reliability.

Bが ンしようとするIJ。IJ that B tries to turn on.

無欠陥層処理を行なったウェーハであっても、基板の元
の酸化誘起積層欠陥密度が大きい場合には、所望の酸化
誘起8!i層欠陥密度の低下が期待できないことがある
Even if the wafer is treated with a defect-free layer, if the original oxidation-induced stacking fault density of the substrate is large, the desired oxidation-induced stacking fault density of 8! In some cases, a reduction in the i-layer defect density cannot be expected.

また、無欠陥層処理を行なうには、相当長い熱処理時間
が必要であり、そのため、製造’iJ率が悪くなる欠点
がある。
Furthermore, in order to perform the defect-free layer treatment, a considerably long heat treatment time is required, which has the disadvantage that the manufacturing rate becomes low.

また、無欠陥層処理を行なったウェーハにあっては、結
晶中の格子間の酸素を析出させてしまうため、ウェーハ
の機械的強度が低下し、スリップ等が生じやずくなる。
Furthermore, in wafers treated with a defect-free layer, oxygen is precipitated between lattices in the crystal, which reduces the mechanical strength of the wafer and makes slipping and the like less likely.

ユJ日と圧力− この発明は前述のような従来技術の欠点を解消して、結
晶欠陥密度の低減効果が大きいシリコン単結晶を提供す
ることを目的としている。
SUMMARY OF THE INVENTION An object of the present invention is to eliminate the drawbacks of the prior art as described above and to provide a silicon single crystal that is highly effective in reducing crystal defect density.

ユ」LΔ、LL このような目的を達成するために、この発明は、半導体
用のシリコン単結晶であって、N2ガスの雰囲気下にお
いて800℃から1350℃までの温度範囲で1秒間な
いし48時間にわたって熱処理したことを特徴とするシ
リコン単結晶を要旨としている。
In order to achieve such an object, the present invention provides a silicon single crystal for semiconductors which is heated in a temperature range of 800° C. to 1350° C. for 1 second to 48 hours in an atmosphere of N2 gas. The gist is a silicon single crystal that is characterized by being heat-treated over a period of time.

ム 1、を ゛するためのm: この発明にあっては、N2ガスの雰囲気下においてシリ
コン単結晶を熱処理する。その際、処理温度の範囲は8
00℃〜1350℃であり、処理時開は1秒間から48
時間までの範囲内である。N2ガスは、H2ガス100
%のものでもよいし、またN2ガスや不活性ガスあるい
はこれらの混合ガスで希釈されたものであってもよい。
Step 1: In this invention, a silicon single crystal is heat-treated in an N2 gas atmosphere. At that time, the processing temperature range is 8
00°C to 1350°C, and the opening time during processing is 1 second to 48°C.
Within hours. N2 gas is H2 gas 100
%, or diluted with N2 gas, inert gas, or a mixed gas thereof.

後者の場合、[」2とN2または不活性ガスとの比率を
1=9以上にするのが望ましい。
In the latter case, it is desirable that the ratio of 2 and N2 or inert gas be 1=9 or more.

なお、この発明は半導体用のチョコラルスキー引き上げ
法(CZ法)により育成したシリコン単結晶を含むもの
である。
Note that this invention includes a silicon single crystal grown by the Czochralski pulling method (CZ method) for semiconductors.

1皿 シリコン!11結晶をN2ガスの雰囲気下で高温にて熱
処理することにより、熱処理によって誘起される結晶欠
陥密度を大幅に低減することができる。しかも、このよ
うな熱処理であると、他の特性に影響を与えることがな
く、実用上の作用効果が大である。
1 dish silicone! By heat-treating the No. 11 crystal at high temperature in an N2 gas atmosphere, the crystal defect density induced by the heat treatment can be significantly reduced. Moreover, such heat treatment does not affect other properties and has great practical effects.

丸11上 同−のCZ−シリコン単結晶インゴットの同一領域から
切り出したnタイプ、20Ωcm程度で面方位(100
)のミラーウェー八を、表1に示すように、N2100
%ガスあるいは)−12100%ガスの雰囲気下におい
て熱処理温度、熱処理時間をかえて熱処理をした。
N-type cut from the same area of the same CZ-silicon single crystal ingot as above in circle 11, with surface orientation (100
) as shown in Table 1, N2100
Heat treatment was performed in an atmosphere of % gas or )-12100% gas while changing the heat treatment temperature and heat treatment time.

さらに、これらのウェーハを乾燥02ガス雰囲気下にお
いて、1000℃にて16時間熱処理したのち、ライト
エツチング(Wrightetching )を行なっ
た。用いたライトエツチング液の組成を表2に示す。
Further, these wafers were heat treated at 1000° C. for 16 hours in a dry O2 gas atmosphere, and then light etched. Table 2 shows the composition of the light etching solution used.

ライトエツチングを行なったサンプルについて、顕微鏡
を使って酸化誘起積層欠陥密度を測定した。その結果を
第1図と第2図に示す。第1図は、熱処理時間を30分
として熱処理温度を800℃から1350’Cまで変え
たときの酸化誘起積層欠陥の発生状況を示す。
The oxidation-induced stacking fault density of the light-etched samples was measured using a microscope. The results are shown in FIGS. 1 and 2. FIG. 1 shows the occurrence of oxidation-induced stacking faults when the heat treatment time was 30 minutes and the heat treatment temperature was varied from 800°C to 1350'C.

第2図は、熱処理温度を1100℃として熱処理時間を
0時間から100時間まで変えたときの酸化誘起積層欠
陥の発生状況を示ず。
FIG. 2 does not show the occurrence of oxidation-induced stacking faults when the heat treatment temperature was 1100° C. and the heat treatment time was varied from 0 hours to 100 hours.

この結果から、N2アニール、f−1zアニールを行な
った場合の方が、行なわない場合よりも、酸化誘起積層
欠陥の発生頻度は低く、さらにN2アニールサンプルよ
りもH2アニールサンプルの方が、酸化誘起積層欠陥の
発生頻度が低いことが明らかである。N2アニールサン
プルよりもN2アニールサンプルの方が酸化誘起積層欠
陥の発生頻度が低いことから、酸化誘起積層欠陥の低減
に関して、つ工−ハ表面近傍の酸素の外方拡散による効
果以外に、N2アニールによる効果が確認される。
From this result, the frequency of oxidation-induced stacking faults is lower when N2 annealing and f-1z annealing are performed than when they are not performed, and furthermore, the frequency of oxidation-induced stacking faults is lower in the H2-annealed sample than in the N2-annealed sample. It is clear that the frequency of occurrence of stacking faults is low. The frequency of occurrence of oxidation-induced stacking faults is lower in the N2-annealed sample than in the N2-annealed sample. The effect of this is confirmed.

この実験から、H2ガス雰囲気下における熱処理により
酸化誘起積層欠陥の発生が抑制されることが明らかにな
った。
This experiment revealed that heat treatment in an H2 gas atmosphere suppresses the occurrence of oxidation-induced stacking faults.

第1図および第2図から明らかなように、熱処理時間は
1秒間〜48時間の範囲内が適切である。また、熱処理
温度は800℃〜1350℃までの温度範囲が適当であ
る。
As is clear from FIGS. 1 and 2, the appropriate heat treatment time is within the range of 1 second to 48 hours. Further, the appropriate heat treatment temperature ranges from 800°C to 1350°C.

及1iL 1〕タイプ、100cm程度でチョコラルスキー法によ
り引き上げた方位(100)のシリコン単結晶の隣接す
る2つのブロックを取出した。これらのブロックは直径
125mmで、長さが5cmであった。これら2つのブ
ロックの一方をH2100%ガスの雰囲気下で1200
℃にて48時間熱処理した。このブロックともう1つの
ブロックとを通常のミラーウェーハに加工した後、前述
の実施例1と同じ酸化誘起積層欠陥密度の検査を実施し
た。その結果、I〜12ガス雰囲気で熱処理したブロッ
クから切出したウェーハの酸化誘起積層欠陥密度は平均
10個/Cm2であった。これに対し、ト(2ガスで熱
処理しなかった方のブロックから切出したウェーハの酸
化誘起積層欠陥密度は平均80個/Cm2であり、)−
f 2雰囲気下における熱処理による酸化誘起積層欠陥
の発生の抑制効果が確認された。
and 1iL 1] type, two adjacent blocks of silicon single crystals of the (100) orientation pulled by the Czochralski method to a length of about 100 cm were taken out. These blocks had a diameter of 125 mm and a length of 5 cm. One of these two blocks was heated to 1200 ml under an atmosphere of 100% H2 gas.
Heat treatment was performed at ℃ for 48 hours. After processing this block and another block into regular mirror wafers, the same oxidation-induced stacking fault density inspection as in Example 1 described above was performed. As a result, the oxidation-induced stacking fault density of wafers cut from blocks heat-treated in an I-12 gas atmosphere was 10/Cm2 on average. On the other hand, the oxidation-induced stacking fault density of wafers cut from the block that was not heat-treated with the two gases was 80/Cm2 on average.
The effect of suppressing the occurrence of oxidation-induced stacking faults by heat treatment in an f2 atmosphere was confirmed.

m二 同−のCZ−シリコン単結晶インゴットの同一領域から
切り出したnタイプ、2oΩam程度で面方位(100
)のミラーウェーハを、表3に示すように、Hz 10
0%ガスの雰囲気下において1000℃あるいは110
0℃にて305”1間熱処理を行ない、さらに一部のザ
ンプルについてミラー表面を鏡面研磨して厚さ5μ分除
去した。これらのウェーハについて前述の実施例1と同
じ酸化誘起積層欠陥密度の検査を実施した。その結果、
表3に示すように、1」2ガス雰囲気で熱処理したまま
のウェーハとH2ガス雰囲気で熱処理したの55μ除去
したつT−ハとでは、酸化誘起積層欠陥密度はほぼ同じ
であり、1000℃でのN2アニールでは平均50個/
Cm2であり、1ioo℃では平均30個/Cm2であ
った。
n-type cut from the same area of a CZ-silicon single crystal ingot with a surface orientation of about 20Ωam (100
) mirror wafers at Hz 10 as shown in Table 3.
1000℃ or 110℃ in 0% gas atmosphere
Heat treatment was performed at 0°C for 305"1, and the mirror surface of some of the samples was mirror-polished to remove a thickness of 5μ. These wafers were inspected for oxidation-induced stacking fault density in the same manner as in Example 1 above. As a result,
As shown in Table 3, the oxidation-induced stacking fault density is almost the same between the wafer heat-treated in the 1"2 gas atmosphere and the T-wafer heat-treated in the H2 gas atmosphere with 55μ removed. N2 annealing averages 50 pieces/
Cm2, with an average of 30 pieces/Cm2 at 1ioo°C.

一方、Hzがス雰囲気で熱処理しなかったつr−ハの酸
化誘起4a層欠陥密度は平均300個/Cm2であった
On the other hand, the oxidation-induced 4a layer defect density of the 4a layer, which was not heat-treated in a gas atmosphere at Hz, was 300 defects/cm2 on average.

この実験により、H2ガス雰囲気下における熱処理によ
る酸化誘起積層欠陥の低減効果は、さらに5μ程度ミラ
ー表面を研磨により除去しても、失われないことが明ら
かになった。
This experiment revealed that the effect of reducing oxidation-induced stacking faults by heat treatment in an H2 gas atmosphere is not lost even if the mirror surface is further removed by polishing by about 5 μm.

尖堝Ji 同一の07−シリコン単結晶インゴットの同一領域から
切り出したnタイプ、20Ωcm程度で面方位(100
)のミラーウェーハを、表4に示すような比率で、H2
ガスと△rガスとを混合した雰囲気下において、100
0℃にて30分間熱処理した。これらのウェーハについ
て前)小の実施例1と同じ酸化誘起積層欠陥密度の検査
を実施した。
Tip Ji N-type cut from the same area of the same 07-silicon single crystal ingot, with a surface orientation (100
) mirror wafers were heated to H2 at the ratios shown in Table 4.
In an atmosphere containing a mixture of gas and △r gas, 100
Heat treatment was performed at 0°C for 30 minutes. These wafers were subjected to the same oxidation-induced stacking fault density inspection as in Example 1 (previously).

その結果、第3図に示すように、混合ガス中のN2の割
合が減少するにつれ、酸化誘起積層欠陥が発生しやすく
なる傾向があることが示され、N2ガスの割合が10%
以下の場合には、この熱処理による酸化誘起積層欠陥の
抑制効果はみられない。
The results showed that as the proportion of N2 in the mixed gas decreased, oxidation-induced stacking faults tended to occur more easily, as shown in Figure 3.
In the following cases, the effect of suppressing oxidation-induced stacking faults by this heat treatment is not observed.

この実験結果から明らかなように、N2とN2または不
活性ガスとの比率は、1:’1上にするのが適当である
As is clear from this experimental result, it is appropriate that the ratio of N2 and N2 or inert gas be 1:'1 or higher.

1匪二11 この発明によれば、結晶欠陥密度の低減効果が極めて顕
著であり、しかも短時間の処理であっても有効な結果が
得られる。特に酸化誘起積層欠陥の密度の点で歩留まり
の悪かったnタイプにあっては、高抵抗量であっても、
本発明によれば、平均酸化誘起積層欠陥密度が約115
に減少した。
According to the present invention, the effect of reducing crystal defect density is extremely significant, and effective results can be obtained even with a short treatment time. In particular, in the n-type, which had a poor yield due to the density of oxidation-induced stacking faults, even with a high resistance,
According to the present invention, the average oxidation-induced stacking fault density is about 115
decreased to

なお、無欠陥層(Denuded  Zone )処理
と1」2ガスの熱処理とは全く別の処理であり、例えば
、N2ガスの熱処理と無欠陥層処理を組み合わせること
も可能である。一般的にいって、この無欠陥層処理は特
殊な用途に限られており、通常、ウェーハには施さない
Note that the defect-free zone (denuded zone) treatment and the heat treatment using 1"2 gas are completely different treatments, and for example, it is also possible to combine the heat treatment with N2 gas and the defect-free layer treatment. Generally speaking, this defect-free layer treatment is limited to specialized applications and is not normally applied to wafers.

【図面の簡単な説明】[Brief explanation of drawings]

第1〜3図は、本発明の効果を示すためのグラフである
。 7−−−〜、 代理人 弁理士 田辺 徹(11,:”:”、)1ノF
 s、rcノ 表  1 表2 ライトエツチング conc、 HF             :  6
0m Qconc、HNO3:  30mQ 5M  CrO3:  30mQ Cu(NO3)2  ・3f−1z O2!J00nC
,CI−h  Coo)→           : 
  60mQ+−120              
 :  60mQ表  3 表  4
1 to 3 are graphs showing the effects of the present invention. 7----~, Agent Patent Attorney Toru Tanabe (11,:”:”,)1noF
s, rc Table 1 Table 2 Light etching conc, HF: 6
0m Qconc, HNO3: 30mQ 5M CrO3: 30mQ Cu(NO3)2 ・3f-1z O2! J00nC
, CI-h Coo) → :
60mQ+-120
: 60mQ table 3 table 4

Claims (4)

【特許請求の範囲】[Claims] (1)半導体のシリコン単結晶において、 H_2ガスの雰囲気下において800℃から1350℃
までの温度範囲で1秒間ないし48時間にわたって熱処
理したことを特徴とするシリコン単結晶。
(1) Semiconductor silicon single crystal at 800°C to 1350°C in an H_2 gas atmosphere
A silicon single crystal characterized by being heat-treated at a temperature ranging from 1 second to 48 hours.
(2)H_2ガスがH_2ガス100%である特許請求
の範囲第1項に記載のシリコン単結晶。
(2) The silicon single crystal according to claim 1, wherein the H_2 gas is 100% H_2 gas.
(3)H_2ガスがN_2ガス、不活性ガスまたはこれ
らの混合ガスで希釈されたものである特許請求の範囲第
1項に記載のシリコン単結晶。
(3) The silicon single crystal according to claim 1, wherein the H_2 gas is diluted with N_2 gas, an inert gas, or a mixed gas thereof.
(4)半導体用CZ−シリコン単結晶である特許請求の
範囲第1項に記載されたシリコン単結晶。
(4) The silicon single crystal according to claim 1, which is a CZ-silicon single crystal for semiconductor use.
JP26135185A 1985-11-22 1985-11-22 Silicon single crystal Granted JPS62123098A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP26135185A JPS62123098A (en) 1985-11-22 1985-11-22 Silicon single crystal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26135185A JPS62123098A (en) 1985-11-22 1985-11-22 Silicon single crystal

Related Child Applications (2)

Application Number Title Priority Date Filing Date
JP6232516A Division JP2652344B2 (en) 1994-09-02 1994-09-02 Silicon wafer
JP6234476A Division JP2652346B2 (en) 1994-09-05 1994-09-05 Manufacturing method of silicon wafer

Publications (2)

Publication Number Publication Date
JPS62123098A true JPS62123098A (en) 1987-06-04
JPH0561240B2 JPH0561240B2 (en) 1993-09-03

Family

ID=17360634

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26135185A Granted JPS62123098A (en) 1985-11-22 1985-11-22 Silicon single crystal

Country Status (1)

Country Link
JP (1) JPS62123098A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01183825A (en) * 1988-01-19 1989-07-21 Sanyo Electric Co Ltd Formation of single crystal silicon film
JPH03233936A (en) * 1990-02-08 1991-10-17 Mitsubishi Materials Corp Manufacture of silicon wafer
JPH04285099A (en) * 1991-03-15 1992-10-09 Shin Etsu Handotai Co Ltd Heat treatment of si single crystal
JPH06183900A (en) * 1990-12-14 1994-07-05 Hughes Aircraft Co Pouring from gas phase into solid
US6121117A (en) * 1992-01-30 2000-09-19 Canon Kabushiki Kaisha Process for producing semiconductor substrate by heat treating
US6313014B1 (en) 1998-06-18 2001-11-06 Canon Kabushiki Kaisha Semiconductor substrate and manufacturing method of semiconductor substrate
JP2003332344A (en) * 2002-03-05 2003-11-21 Sumitomo Mitsubishi Silicon Corp Silicon single-crystal layer and manufacturing method thereof
US6809015B2 (en) 1998-12-28 2004-10-26 Shin-Etsu Handotai Co., Ltd. Method for heat treatment of silicon wafers and silicon wafer

Citations (4)

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JPH01183825A (en) * 1988-01-19 1989-07-21 Sanyo Electric Co Ltd Formation of single crystal silicon film
JPH03233936A (en) * 1990-02-08 1991-10-17 Mitsubishi Materials Corp Manufacture of silicon wafer
JPH06183900A (en) * 1990-12-14 1994-07-05 Hughes Aircraft Co Pouring from gas phase into solid
JPH04285099A (en) * 1991-03-15 1992-10-09 Shin Etsu Handotai Co Ltd Heat treatment of si single crystal
US6121117A (en) * 1992-01-30 2000-09-19 Canon Kabushiki Kaisha Process for producing semiconductor substrate by heat treating
US6313014B1 (en) 1998-06-18 2001-11-06 Canon Kabushiki Kaisha Semiconductor substrate and manufacturing method of semiconductor substrate
US6809015B2 (en) 1998-12-28 2004-10-26 Shin-Etsu Handotai Co., Ltd. Method for heat treatment of silicon wafers and silicon wafer
US7011717B2 (en) 1998-12-28 2006-03-14 Shin-Etsu Handotai Co., Ltd. Method for heat treatment of silicon wafers and silicon wafer
JP2003332344A (en) * 2002-03-05 2003-11-21 Sumitomo Mitsubishi Silicon Corp Silicon single-crystal layer and manufacturing method thereof

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