JPS6227724B2 - - Google Patents

Info

Publication number
JPS6227724B2
JPS6227724B2 JP56088396A JP8839681A JPS6227724B2 JP S6227724 B2 JPS6227724 B2 JP S6227724B2 JP 56088396 A JP56088396 A JP 56088396A JP 8839681 A JP8839681 A JP 8839681A JP S6227724 B2 JPS6227724 B2 JP S6227724B2
Authority
JP
Japan
Prior art keywords
core tube
furnace
heat treatment
furnace core
semiconductor substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56088396A
Other languages
Japanese (ja)
Other versions
JPS57202727A (en
Inventor
Keiichi Kagawa
Kyohiro Kawasaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP8839681A priority Critical patent/JPS57202727A/en
Publication of JPS57202727A publication Critical patent/JPS57202727A/en
Publication of JPS6227724B2 publication Critical patent/JPS6227724B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67098Apparatus for thermal treatment
    • H01L21/67115Apparatus for thermal treatment mainly by radiation

Landscapes

  • Engineering & Computer Science (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)

Description

【発明の詳細な説明】 本発明は、半導体装置特に大規模集積回路(以
下LSIと略す)を作製する場合の熱処理装置に関
するものであつて、ウエハに異物が付着せず、
ウエハの挿入・取り出し時における炉外からの
大気の逆流(以下バツク・デイフユージヨンと称
す)を防ぐ事が出来るようにすることを目的とし
たものである。 LSIの製作は、通常、酸化・拡散等の熱処理工
程、選択的に不要な酸化膜等を除去するホトリソ
グラフイー工程とエツチング工程、そして電極や
絶縁膜を堆積するデポジシヨン工程等から成り立
つている。これらの工程のうち、熱処理工程につ
いて以下に詳しく述べる。 熱処理装置は簡単に言えば通常、第1図に示す
ように一端を細くした炉芯管1と、これを熱し温
度を制御する電源制御部2と、炉芯管1中に必要
なガスを導入するガスライン部3及び炉外からの
汚染防止のためのキヤツプ4等から成り立つてい
る。 このような熱処理炉芯管1中にウエハ(半導体
基体)を挿入して、処理を行なうわけであるが、
通常第2図に示すような構5を持つたボート6を
使用する。なお、これらは、いずれも非常に高温
例えば400〜1200℃という温度で使用せられ、か
つ不純物重金属イオン等からの汚染を防ぐため
に、石英や炭化ケイ素といつた材料が用いられる
事が多い。さて、このボート6の溝にウエハ7を
積載した後、炉芯管1の端部に置き、ボート6の
端に引き出し棒8を掛けて炉芯管中央部までこの
ボートを挿入する。そしてキヤツプ4をして、必
要なガス例えば酸化工程ならば酸素や水蒸気、ア
ニール工程なら窒素等の不活性ガス、拡散工程な
らばPH3やB2H6等の不純物源ガスをガスライン3
より流し、必要な時間だけ処理を行なう。終了す
ればキヤツプ4をはずし引き出し棒8をボート6
に掛けて、取り出す。これが熱処理工程の概要で
ある。ウエハは現在LSIの主流であるシリコンに
とどまらず他の材料であつても同じことである。
さて、この熱処理工程の問題点として次の2つの
事があげられる。 ○…
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a heat treatment apparatus for manufacturing semiconductor devices, particularly large-scale integrated circuits (hereinafter abbreviated as LSI), which prevents foreign matter from adhering to wafers.
The purpose of this is to prevent the backflow of air from outside the furnace (hereinafter referred to as back diffusion) when inserting and removing wafers. LSI manufacturing usually consists of heat treatment processes such as oxidation and diffusion, photolithography and etching processes to selectively remove unnecessary oxide films, and deposition processes to deposit electrodes and insulating films. Among these steps, the heat treatment step will be described in detail below. To put it simply, a heat treatment device usually consists of a furnace core tube 1 with one end tapered, a power supply control section 2 that heats the core tube and controls the temperature, and necessary gases introduced into the furnace core tube 1, as shown in Figure 1. The furnace consists of a gas line section 3, a cap 4, etc. for preventing contamination from outside the furnace. A wafer (semiconductor substrate) is inserted into such a heat treatment furnace core tube 1 to perform the treatment.
Usually, a boat 6 having a structure 5 as shown in FIG. 2 is used. All of these materials are used at very high temperatures, for example, 400 to 1200° C., and materials such as quartz and silicon carbide are often used to prevent contamination from impurity heavy metal ions. After the wafers 7 are loaded in the groove of the boat 6, they are placed on the end of the furnace core tube 1, the pull-out rod 8 is hooked to the end of the boat 6, and the boat is inserted to the center of the furnace core tube. Then, cap 4 is installed, and necessary gases such as oxygen and water vapor for the oxidation process, inert gases such as nitrogen for the annealing process, and impurity source gases such as PH 3 and B 2 H 6 for the diffusion process are transferred to the gas line 3.
Allow the process to flow more slowly and process only for the required amount of time. When finished, remove cap 4 and pull out rod 8 from boat 6.
Hang it on and take it out. This is an overview of the heat treatment process. The same applies to wafers not only made of silicon, which is currently the mainstream for LSIs, but also other materials.
Now, there are the following two problems in this heat treatment process. ○…

Claims (1)

【特許請求の範囲】 1 第1の炉芯管に、ガスを導入しつつ、半導体
基体を設置した後、第2の炉芯管に前記第1の炉
芯管を挿入して前記半導体基体に熱処理を施すこ
とを特徴とする熱処理方法。 2 第2のガスラインと第2の炉芯管よりなる電
気炉設備中の第2の炉芯管より細い開口部を有し
該開口部と反対側の他端を細く絞つた第1の炉芯
管と、上記第1の炉芯管の絞られた他端より接続
された第1のガスラインとを備えたことを特徴と
する熱処理装置。
[Scope of Claims] 1. After installing a semiconductor substrate into a first furnace core tube while introducing gas, the first furnace core tube is inserted into a second furnace core tube and the semiconductor substrate is attached to the semiconductor substrate. A heat treatment method characterized by applying heat treatment. 2. A first furnace in an electric furnace equipment consisting of a second gas line and a second furnace core tube, which has an opening narrower than the second furnace core tube and whose other end on the opposite side of the opening is narrowed. A heat treatment apparatus comprising: a core tube; and a first gas line connected to the other constricted end of the first furnace core tube.
JP8839681A 1981-06-09 1981-06-09 Method and device for heat treatment Granted JPS57202727A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8839681A JPS57202727A (en) 1981-06-09 1981-06-09 Method and device for heat treatment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8839681A JPS57202727A (en) 1981-06-09 1981-06-09 Method and device for heat treatment

Publications (2)

Publication Number Publication Date
JPS57202727A JPS57202727A (en) 1982-12-11
JPS6227724B2 true JPS6227724B2 (en) 1987-06-16

Family

ID=13941627

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8839681A Granted JPS57202727A (en) 1981-06-09 1981-06-09 Method and device for heat treatment

Country Status (1)

Country Link
JP (1) JPS57202727A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0787185B2 (en) * 1985-01-11 1995-09-20 株式会社デンコ− Semiconductor heat treatment method

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5742008Y2 (en) * 1976-10-08 1982-09-16

Also Published As

Publication number Publication date
JPS57202727A (en) 1982-12-11

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