KR100378184B1 - Silicon wafer having controlled distribution of defects, process for the preparation of the same and czochralski puller for manufacturing monocrystalline silicon ingot - Google Patents

Abstract

Disclosed is a silicon wafer having a denude zone secured near the surface of a wafer and at the same time having a defect distribution controlled to have a sufficient gathering effect in the bulk region and a manufacturing process thereof. In the silicon wafer of the present invention, the oxygen precipitates, which are intrinsic gathering sites, have a constant vertical distribution, that is, the concentration profile of the oxygen precipitates from the front side to the rear side of the wafer has a first peak and a second peak at predetermined depths from the front side and the rear side of the wafer, respectively. Indicates. The denude zone is formed before reaching the first and second peaks, respectively, from the front and back surfaces of the wafer. The concentration profile of the oxygen precipitate in the bulk region of the wafer between the first peak and the second peak has a concave shape. In order to obtain such an oxygen precipitate distribution, a rapid heat treatment is performed under a mixed gas of nitrogen + argon or hydrogen gas in the donor killing process during wafering.

Description

Silicon wafer having controlled distribution of defects, process for the preparation of the same and czochralski puller for manufacturing monocrystalline silicon ingot}

FIELD OF THE INVENTION The present invention relates to silicon wafers with controlled defect distribution, their manufacturing process and Czochralski puller for the production of single crystal silicon ingots for the formation of these wafers, and more particularly oxygen serving as gathering sites in the wafer. The present invention relates to a heat treatment process for controlling the distribution of nucleation centers of precipitates (Oxygen Precipitate) and a wafer preparation process for performing the same.

Single crystal silicon, which is a starting material for manufacturing a semiconductor device, is generally formed into a cylindrical ingot by a crystal growth method called Czochralski (CZ) method. Ingot-shaped single crystal silicon is manufactured into a wafer through wafering processes such as slicing, etching, cleaning, and polishing. The Czochralski method performs crystal growth while contacting a single crystal seed crystal in a silicon melt and slowly pulling it. Since the silicon melt is accommodated in a quartz crucible, various impurities, mainly oxygen, are included together. At the temperature of the silicon melt, the crystal lattice until oxygen reaches a concentration determined by the solubility of oxygen in the silicon corresponding to the temperature of the melt and the actual segregation coefficient of oxygen in the solidified silicon. Penetrate into The concentration of oxygen infiltrated into the silicon ingot during the crystal growth process is much higher than the oxygen solubility in the solid silicon corresponding to this temperature at the typical temperature in the fabrication of subsequent integrated circuits. On the other hand, as the crystal grows and cools, the solubility of oxygen in the crystal decreases rapidly, resulting in supersaturation of oxygen in the cooled ingot, which leads to a void-type crystal defect called D-defect. Form in the ingot.

These de-defects induce a pit-shaped Crystal Originated Precipitate (COP) with {111} planes on the surface of the wafer through wafer processing such as ingot slicing, polishing and cleaning. Due to the cleaning and oxidation processes that are repeatedly performed in the manufacturing process, the size increases and the number increases rapidly. The source region 12 and the drain region 14 formed near the surface of the silicon substrate 10 in FIG. 1 in which the COP of the wafer surface shows the sectional structure of an active region of a semiconductor device, for example, a typical MOS transistor. When present in the channel region therebetween, the dielectric breakdown of the gate insulating film 16, which maintains electrical insulation between the gate electrode 18 and the silicon substrate 10, and the refresh characteristics of the memory device are degraded. In addition, if the COP on the wafer surface is present in the field oxide film that separates the active regions of the semiconductor device, impurity ions implanted during the ion implantation process penetrate into the bulk region under the field oxide film and cause device separation defects due to channeling.

On the other hand, de-defect oxygen precipitate formed in the bulk region (10a of FIG. 1) of the wafer by subsequent heat treatment also acts as a liquid source, but traps unwanted metal impurities in the subsequent fabrication of the semiconductor device. It also serves as an intrinsic gettering site. Therefore, if the oxygen concentration in the ingot is sufficiently high, the amount of oxygen precipitates, which are intrinsic gathering sites, increases, and the gathering ability is increased. However, if the oxygen concentration is not sufficient, the oxygen precipitates are not formed, and thus the gathering ability is lost. Therefore, there is a need to be adjusted to distribute an appropriate amount of oxygen precipitates in the bulk region of the wafer.

On the other hand, in the ingot grown and wafered wafers according to the conventional general method, the oxygen precipitates are distributed from the front surface to the rear surface of the wafer as a whole. In particular, a denude zone in which oxygen-related defects, such as voids, COPs, dislocations, stacking defects, and oxygen precipitates, do not exist from the entire surface of the wafer where the active region of the semiconductor device is formed to a predetermined depth (10b in FIG. 1). (Denuded Zone; 10b) layer should be secured, but oxygen precipitates are distributed to the vicinity of the surface of the wafer, which acts as a liquid source.

Accordingly, in order to form intrinic gathering in the bulk region of the wafer while ensuring sufficient denude zone near the surface of the wafer, conventionally, a wafer having a high oxygen concentration, for example, an initial oxygen of 13 ppma or more, has been cold-high temperature. By performing heat treatment at low temperature for a long time, a technique of forming oxygen precipitates in the bulk region of the wafer and decomposing oxygen precipitates near the surface of the wafer to secure a clean denude zone has been used. Figure 2 shows the concentration profile of the oxygen precipitate from the front surface to the rear surface for the semiconductor wafer heat-treated by this conventional technique.

According to Fig. 2, although sufficient denude zones can be secured in the vicinity of the wafer surface with the formation of intrinsic gathering in the bulk region, since the heat treatment process is further performed at a high temperature for a long time, slip or warp ( There is a problem of deterioration of wafer characteristics such as warpage) and cost increase. In this case, metal contaminants trapped in the oxygen precipitates in the bulk region, in particular iron (Fe), are released to the denude zone on the surface of the wafer by a subsequent process to act as a liquid source. There is this.

FIG. 3 is a diagram showing the concentration profile of the oxygen precipitate formed by another conventional method disclosed in FIG. 1A of US Pat. No. 5,401,669. That is, Figure 3 shows the concentration profile according to the wafer depth of the oxygen precipitate formed by performing a rapid heat treatment (RTA) process in a nitrogen atmosphere and subsequent heat treatment. However, the method has a problem in that almost no denude zone can be secured from the surface of the wafer as shown in FIG. 3, and there is a problem in that sufficient gathering effect cannot be obtained because there is almost no oxygen precipitate in the bulk region.

SUMMARY OF THE INVENTION An object of the present invention is to provide a silicon wafer having a defect distribution controlled to sufficiently secure a denude zone near the surface of the wafer and at the same time have a sufficient gathering effect in the bulk region of the wafer.

Another object of the present invention is to provide a silicon wafer manufacturing process capable of controlling the distribution of defects so that the denude zone is sufficiently secured in the vicinity of the surface of the wafer and at the same time a sufficient gathering effect is provided in the bulk region of the wafer.

It is another object of the present invention to provide a Czochralski puller for producing a single crystal silicon ingot capable of rapid cooling in order to manufacture a silicon wafer according to the present invention.

1 is a cross-sectional view showing the structure of a conventional general MOS transistor formed near the surface of a silicon wafer.

2 is a view showing a concentration profile of oxygen precipitates in a conventional silicon wafer.

3 is a view showing a concentration profile of oxygen precipitates with respect to another conventional silicon wafer.

4 is a view schematically showing a concentration profile of an oxygen precipitate for a silicon wafer according to an embodiment of the present invention.

5 is a time chart of a rapid thermal annealing (RTA) process performed according to an embodiment of the present invention.

6 is a view showing a concentration profile of point defects after performing the RTA process of FIG. 5 in a nitrogen gas atmosphere.

7 is a view showing a concentration profile of point defects after performing the RTA process of FIG. 5 under an argon gas atmosphere.

8 is a view showing a concentration profile of point defects after performing the RTA process of FIG. 5 in a hydrogen gas atmosphere.

FIG. 9 is a diagram illustrating a vacancy concentration profile after performing the RTA process of FIG. 5 while changing a mixing ratio under a nitrogen gas + argon gas atmosphere.

10 is a view showing the concentration profile of the oxygen precipitates by the subsequent heat treatment after performing the RTA process according to the present invention.

FIG. 11 is a view for explaining a decomposition process of Crystal Originated Precipitates (COP) near the surface of a silicon wafer as the RTA process of FIG. 5 is performed in an argon gas atmosphere.

12 is a photograph showing distribution of oxygen precipitates formed by subsequent heat treatment after performing the RTA process of FIG. 5 in a nitrogen gas atmosphere.

FIG. 13 is a photograph showing distribution of oxygen precipitates formed by subsequent heat treatment after performing the RTA process of FIG. 5 in an argon gas atmosphere.

FIG. 14 is a photograph showing distribution of oxygen precipitates formed by subsequent heat treatment after performing the RTA process of FIG. 5 in a hydrogen gas atmosphere.

FIG. 15 is a photograph showing distribution of oxygen precipitates formed by subsequent heat treatment after performing the RTA process of FIG. 5 under nitrogen gas + argon gas atmosphere.

FIG. 16 is a photograph showing distribution of oxygen precipitates formed by subsequent heat treatment after performing the RTA process of FIG. 5 under nitrogen gas + hydrogen gas atmosphere.

FIG. 17 is a photograph showing the depth of a denuded zone formed by subsequent heat treatment after performing the RTA process of FIG. 5 in a nitrogen gas atmosphere.

FIG. 18 is a photograph showing the depth of the denude zone formed by subsequent heat treatment after performing the RTA process of FIG. 5 under an argon gas atmosphere.

19 is a photograph showing the depth of the denude zone formed by subsequent heat treatment after performing the RTA process of FIG. 5 in a hydrogen gas atmosphere.

FIG. 20 is a photograph showing the depth of a denude zone formed by a post-heat treatment after performing the RTA process of FIG. 5 in a nitrogen gas + argon gas atmosphere.

21 is a photograph showing the depth of the denude zone formed by subsequent heat treatment after performing the RTA process of FIG. 5 in a nitrogen gas + hydrogen gas atmosphere.

FIG. 22A shows the shape of the COP in an as-grown state, and FIG. 22B is a photograph showing the changed shape after performing the RTA process of FIG. 5 under a nitrogen gas atmosphere.

FIG. 23A shows the shape of the COP in an as-grown state, and FIG. 23B is a photograph showing the changed shape after performing the RTA process of FIG. 5 under nitrogen gas + argon gas atmosphere.

FIG. 24A shows the shape of the COP in an as-grown state, and FIG. 24B is a photograph showing the changed shape after performing the RTA process of FIG. 5 under nitrogen gas + hydrogen gas atmosphere.

25 is a process flowchart showing a process process according to an embodiment of the present invention.

It is a conceptual diagram which shows the relationship of relative point defect distribution and V / G in a silicon ingot.

Fig. 27 is a schematic view showing a conventional Czochralski puller.

28 is a schematic view showing a conventional Czochralski puller invented by the inventor.

29 is a schematic diagram illustrating a Czochralski puller modified according to an embodiment of the present invention.

30 is a view illustrating main parts of the Czochralski puller improved in FIG. 29.

FIG. 31 is a graph illustrating a change in concentration of oxygen precipitates at a peak after performing the RTA process of FIG. 5 while varying flow rates of nitrogen gas and argon gas according to one embodiment of the present invention.

32 is a graph illustrating a change in concentration of oxygen precipitates at a peak after performing the RTA process of FIG. 5 while changing a mixing ratio of nitrogen gas and argon gas according to an embodiment of the present invention.

FIG. 33 is a graph illustrating a change in concentration of oxygen precipitates at a peak after performing the RTA process of FIG. 5 while changing a ramp-up rate according to an embodiment of the present invention.

34 is a graph illustrating a change in concentration of oxygen precipitates at a peak after performing the RTA process of FIG. 5 while varying annealing time according to an embodiment of the present invention.

FIG. 35 is a graph illustrating a change in concentration of oxygen precipitates at a peak after performing the RTA process of FIG. 5 while varying annealing temperature according to an embodiment of the present invention.

36 is a graph illustrating a change in concentration of oxygen precipitates at a peak after performing the RTA process of FIG. 5 while changing a ramp-down rate according to an embodiment of the present invention.

※ Explanation of code for main part of drawing

10; Silicon substrate 10a; Bulk area

10b; Dinude zone 12; Source area

14; Drain region 16; Gate insulation film

18; Gate electrode 20; Boyd

22; Silicon oxide films 100 and 200; Czochralski Fuller

102, 202; Heating pack 104, 204; heater

106, 206; Crucible 108, 208; Susceptor

110, 210; Axis of rotation 112, 212; First direction

114, 214; Train groups 116, 216; Heat-absorbing material

120, 220; crystal pulling shaft 120a, 220a; Crystal holder

122, 222; Second direction 124, 224; seed crystal

126, 226; Melt 128, 228; Ingot

130, 230; Chamber seals 131, 231; Ingot-melt boundary

132, 232; Cooling jackets 234, 300; Thermal housing

310; Internal heat blocking housing 320; Thermal insulation housing bottom

330; External heat shield housing wall 340; Thermal insulation housing cover

350; Support member 360; Heat shield

The silicon wafer according to the first aspect of the present invention for achieving the above object of the present invention has a constant vertical distribution of the oxygen precipitate which is an indrin gathering site. That is, the concentration profile of Oxygen Precipitates from the front side to the rear side of the silicon wafer in which the active region of the semiconductor device is formed shows the first peak and the second peak at predetermined depths from the front side and the rear side of the wafer, respectively. The denude zone is formed before reaching the first and second peaks, respectively, from the front and back surfaces of the wafer. The concentration profile of the oxygen precipitate in the bulk region of the wafer between the first peak and the second peak has a concave shape.

Preferably, the concentration profile of the oxygen precipitate is symmetric about the center of the silicon wafer, and the depth of the denude zone is in the range of 10 μm to 40 μm from the surface of the wafer so that the active region of the semiconductor device can be sufficiently formed. Is secured within. There are no crystal defects related to oxygen in the dinude zone, and there may be a void-shaped de-defect having a certain size and concentration in addition to the oxygen precipitate in the bulk region.

Further, the concentration of oxygen precipitates at the first peak and the second peak is at least 1 × 10 ⁹ cm ⁻³ or more, and the concentration of oxygen precipitates at the bulk region between the first peak and the second peak is at least 1 ×. Maintaining at least 10 ⁸ cm ⁻³ is desirable in terms of gathering metal contaminants.

On the other hand, the silicon wafer according to the second aspect of the present invention for achieving the above object is the nucleation center of the oxygen precipitate, for example, so that the concentration profile of the oxygen precipitate of the first aspect can be brought about by subsequent heat treatment. The concentration profile of bacony shows first and second peaks at predetermined depths from the front and rear surfaces of the silicon wafer, similar to the concentration profile of the oxygen precipitates. The vacancy concentration profile before reaching the first and second peaks from the front and rear surfaces, respectively, remains below a certain threshold, and the concentration profile of vacancy in the bulk region between the first and second peaks is controlled. Take the shape of a cave.

On the other hand, according to the present invention for achieving the object of the present invention, preparing a silicon wafer; And performing rapid heat treatment in the mixed gas atmosphere of the gas having the vacancy injection effect and the gas having the interstitial silicon injection effect on the surface of the wafer to serve as a place for growing oxygen precipitates during the subsequent heat treatment step. Generating a nucleation center, wherein the concentration profile of the nucleation center from the front side to the rear side of the wafer exhibits a first peak and a second peak at a predetermined depth from the front side and the rear side, respectively; A silicon wafer having a rapid annealing step that remains below a threshold before reaching a peak and a second peak and causes a concentration profile of the nucleation center to concave in the bulk region between the first and second peaks. The manufacturing process of is provided.

After performing the rapid heat treatment step, the concentration profile of the oxygen precipitates from the front side to the rear side of the wafer is determined by the subsequent heat treatment step in the fabrication step of the semiconductor device, respectively, at the first peak and the first side at a predetermined depth from the front side and the rear side. 2 peaks, and a dinude zone is formed before reaching the first and second peaks from the front and rear surfaces, respectively, and the concentration profile of the oxygen precipitate in the bulk region between the first and second peaks is concave. to be concave.

The mixed gas uses nitrogen gas + argon gas or nitrogen gas + hydrogen gas, and the mixing ratio and flow rate of the mixed gas, a ramp-up rate in the rapid heat treatment step, an annealing temperature, and a heat treatment time The annealing time and the ramp-down rate may be adjusted to control the peak value of the first and second peaks of the oxygen precipitate, the concentration value of the bulk region, or the depth of the denude zone. .

On the other hand, the silicon wafer to which the rapid heat treatment step of the present invention is applied is sufficiently high to prevent interstitial agglomeration, but is sufficiently sufficient to restrict bacony agglomeration into the vacancy-rich region along the axial direction of the ingot. It can be provided from the ingot pulled from the silicon melt in the hot zone furnace at the pull rate profile of the low ingot,

The other silicon wafer to which the rapid heat treatment step of the present invention is applied is pulled from the silicon melt in the hot zone furnace at the pulling speed profile of the ingot which is high enough to prevent interstitial agglomeration but low enough to prevent vacancy agglomeration. It can also be provided from a silicon ingot.

Another silicon wafer to which the rapid heat treatment step of the present invention is applied is obtained from a silicon melt in a hot zone furnace at a pulling rate profile of a sufficiently high ingot so that baconish agglomerates are formed entirely along the radial direction of the ingot without the formation of interstitial agglomerates. It can also be provided from the raised ingot.

On the other hand, according to the present invention for achieving the above object, a sealing body; A crucible in the seal holding a silicon melt; A seed holder in the seal adjacent to the crucible; A heater in the seal surrounding the crucible; A vertical inner heat shield housing wall, which is spaced apart from the inner heat shield housing, is connected to the vertical outer heat shield housing wall, the inner heat shield housing wall and the outer heat shield housing wall, and is inclined upward in an outward direction to cover the heat shield housing and the inner heat. A ring-shaped heat shield housing which connects between the blocking housing wall and the external heat shield housing wall and includes a heat shield housing bottom inclined downward in an outward direction; And a support member arranged to support the thermal barrier housing in the crucible, the Czochralski puller for growing a single crystal silicon ingot.

Means for pulling the seed holder out of the crucible and thereby pulling a single crystal silicon ingot from the silicon melt, wherein the single crystal silicon ingot has an ingot axis and a cylindrical edge, and the silicon melt and the ingot ingot- Separated by a melt boundary, so that the cooling rate of the ingot is at least 1.4 ° k / min or more from the temperature of the ingot axis at the ingot-melt boundary to a constant temperature corresponding to the growth stage of the ingot. The length of the internal heat shield housing wall and the external heat shield housing wall of the heat shield housing, the inclination angle of the heat shield housing cover and the heat shield housing floor, the distance from the ingot to the internal heat shield housing wall, the crucible to the external heat shield housing wall The distance and arrangement of the thermal barrier plates can be selected.

According to the present invention, a double peak oxygen precipitate having a peak value at a constant depth from a surface by performing a rapid heat treatment in a gas atmosphere in which a gas having an interstitial injection effect and a gas having a vacancy injection effect are properly mixed on a surface of a wafer. Since the nucleation center can be formed, a stable concentration profile of the oxygen precipitate can be secured by subsequent heat treatment.

In addition, according to the present invention, since the rapid heat treatment is performed under a gas having an interstitial injection effect on the surface of the wafer, even if the wafer includes a de-defect in the form of a void, the depth of the denude zone is reduced. The decomposition of the effect occurs to secure the active area of the semiconductor device.

In addition, according to the Czochralski puller of the present invention, since the ingot can be rapidly cooled, the size of the voids that can be formed during ingot growth can be reduced. Although present as a void, voids can be broken down within the area of the denude zone.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. Silicon wafer products, which are more concentrated in the spirit of the invention, and the "heat treatment step for wafers" for the result of rapid heat treatment and subsequent heat treatment during the manufacturing process of the silicon wafer and the preparation step of the wafer to which the present invention is applied And the "preparation of the wafer" for the device in order.

Heat Treatment Step for Wafer

4 is a view schematically illustrating a concentration profile of an oxygen precipitate for a silicon wafer to be formed according to an embodiment of the present invention. Compared with the concentration profile of the oxygen precipitates in the silicon wafer formed by the conventional techniques shown in Figs. 2 and 3, according to the present invention, the denude zone reaching a certain depth from the front and rear surfaces of the wafer is sufficiently secured, and each A double peak having a maximum peak value is formed at the boundary between the dinude zone and the bulk region. In addition, the concentration of oxygen precipitates in the bulk region between the double peaks is such that the gathering effect of the metal contaminants can be sufficiently exhibited.

5 is a time chart of a rapid thermal annealing (RTA) process performed according to an embodiment of the present invention. RTA equipment to which the present invention is applied can be used commercially, and looks at the rapid heat treatment process in the RTA equipment, first, the silicon wafer to be applied to the present invention, for example, is maintained at about 700 ℃ Load into RTA equipment and wait (I). Then, the temperature in the RTA equipment is ramped up at a rate of 50 ° C./sec to 1250 ° C., for example (II). Subsequently, annealing is carried out at a temperature of 1250 ° C. for a predetermined time, for example, 10 seconds (III). Subsequently, the temperature is ramped down to the temperature of the standby state at a rate of 33 ° C / sec (IV). Subsequently, the wafer is unloaded (V). By performing a rapid heat treatment as shown in FIG. 5, an oxygen precipitate nucleation center having a controlled distribution can be obtained. On the other hand, as illustrated in FIG. 11, there is a decomposition effect of voids or COPs present on the surface of the wafer. Able to know.

Although the temperature conditions shown in FIG. 5 exemplarily illustrate an embodiment of the present invention, as described below, in the present invention, the type of the atmospheric gas of the rapid heat treatment, the flow rate of the atmospheric gas, the mixing ratio of the atmospheric gas, and the steps up to the rapid heat treatment step The rate of temperature rise, the annealing temperature and annealing time in the rapid heat treatment step, and the rate of temperature drop from the rapid heat treatment step (ie, cooling rate) are important factors. In the present invention, the temperature of the rapid heat treatment is carried out at least 1150 ° C or more, and the time at the rapid heat treatment temperature proceeds for at least 5 seconds or more. For example, when performing a heat treatment at 1150 ° C may be maintained for at least 30 seconds, when performing a heat treatment at 1250 ° C it may be maintained for about 10 seconds or 5 seconds. On the other hand, the cooling rate is quenched to at least 30 ° C / sec or more.

Gas conditions for performing the rapid heat treatment of the present invention are basically a gas having an interstitial silicon injection effect on the surface of the wafer and a gas having a vacancy injection effect on the surface of the wafer exposed under a gas atmosphere during the rapid heat treatment process. Use mixed gas mixed in proportions. In this embodiment, nitrogen gas is typically used as a gas having a bacon injection effect, and argon gas and hydrogen gas are typically used as a gas having an interstitial silicon injection effect.

FIG. 6 is a view illustrating concentration profiles of point defects of baconic silicon and interstitial silicon after performing the RTA process of FIG. 5 in a nitrogen gas atmosphere, and FIG. 7 after performing the RTA process of FIG. 5 in an argon gas atmosphere. It is a figure which shows the concentration profile of a point defect, FIG. 8 is a figure which shows the density profile of a point defect after performing the RTA process of FIG. 5 in hydrogen gas atmosphere.

6 to 8, ① is a concentration profile of bacon defects after performing the RTA process of FIG. 5 in an inert gas atmosphere, and ② is an interstitial defect after performing the RTA process of FIG. 5 under respective gas conditions. Concentration profile, (3) shows the concentration profile of bacon defects after performing the RTA process of FIG. 5 under each corresponding gas condition.

It can be seen that the concentration of bacon defects in the bacon after the RTA process in an inert gas atmosphere is low at the front and rear surfaces of the wafer and is convex near the bulk region of the wafer. In general, when the temperature is rapidly increased in step (a) of FIG. 5 under an inert gas atmosphere, an equilibrium concentration corresponding to the temperature of bacony present as a caking in the wafer is increased. At this time, since the mobility of bacon is low in the bulk region of the wafer, the concentration is kept lower than the equilibrium concentration. However, since the bacon is active in the surface area of the wafer, it is almost equal to the equilibrium concentration. Conversely, as interstitial silicon rises rapidly, the equilibrium concentration corresponding to the temperature decreases due to the increase of baconciency and the Frenkel recombination. At this time, the interstitial that exists in the bulk region of the wafer is maintained higher than the equilibrium concentration because of its low mobility as in bacon, but on the surface of the wafer is also close to the equilibrium concentration as in bacon.

Subsequently, if it is maintained for a predetermined time until step (b) of FIG. 5, diffusion occurs to maintain parallel concentration of both bacon and interstitial. Subsequently, when quenched to step (c), the interstitial point defects having a large diffusion coefficient coincides with a new equilibrium concentration corresponding to the lowered temperature, but in the case of vacancy having a small diffusion coefficient, it is supersaturated in the wafer. At this time, the degree of super saturation is large in the bulk region of the wafer, while the mobility of bacon is large in the vicinity of the surface of the wafer, thereby approaching a new equilibrium concentration corresponding to the lowered temperature.

Therefore, as shown in FIGS. 6 to 8, the vacancy concentration profile immediately after performing the rapid heat treatment of FIG. 5 in an inert gas atmosphere has a convex shape.

On the other hand, as shown in Figure 6, when performing the RTA process of Figure 5 under a nitrogen gas atmosphere, the nitrogen gas deeply penetrated to the bulk region of the wafer and silicon silicon is recombined by a small volume of silicon nitride (Si ₃ N ₄ ), the concentration of bacon is lowered. On the contrary, the concentration of bacon is increased in the vicinity of the surface of the wafer, and the concentration of bacon is increased. Therefore, it shows a shape opposite to the bachelor's concentration profile ① in an inert gas atmosphere.

On the other hand, as shown in Figure 7 and 8, performing the RTA process of Figure 5 in an argon gas or hydrogen gas atmosphere to reduce the concentration of baconcis overall wafer due to the interstitial silicon implantation effect, in particular the wafer In the vicinity of the surface of the interstitial silicon implantation effect is caused by the recombination of baconic silicon and interstitial silicon suddenly maintains the vacancy concentration at a certain threshold of equilibrium concentration at the temperature.

On the other hand, since the embodiment of the present invention is to perform the RTA process of FIG. 5 in a mixed gas atmosphere of nitrogen gas + argon gas or nitrogen gas + hydrogen gas, the vacancy concentration of FIGS. 6 and 7 and 6 and 8 By combining the profiles with each other, it is possible to know the vacancy concentration profiles under these mixed gas atmospheres. The vacancy concentration profile under this mixed gas shows first and second peaks at predetermined depths from the front and rear surfaces of the silicon wafer, respectively, as shown in FIG. 9, and the first and second peaks from the front and rear surfaces, respectively. It can be seen that before reaching the peak, it is kept below a certain threshold, that is, the equilibrium concentration at the corresponding temperature. In the bulk region between the first peak and the second peak, the concentration profile of the bacon is concave.

Having a vacancy concentration profile as shown in FIG. 9, the RTA process of FIG. 5 is performed in a mixed gas atmosphere of a gas having an vacancy silicon implantation effect and a gas having an interstitial silicon implantation effect. Because. Contrast the concentration profile of baconic silicon due to the effect of vacancy silicon injection under nitrogen gas and the concentration profile of interstitial silicon due to interstitial silicon injection effect under argon gas or hydrogen gas on the log scale. The inclination of the vacancy silicon concentration profile toward the bulk region from is smaller than the inclination of the interstitial silicon concentration profile but becomes larger than a predetermined depth from the surface of the wafer. Therefore, the area where the denuded zone is formed in the vicinity of the surface within a certain depth from the front and rear of the wafer, where the interstitial silicon is recombined with baconic silicon, and the baconic silicon has a specific threshold, That is, the equilibrium concentration value corresponding to the corresponding temperature is maintained below, and after that, the bacon silicon concentration rapidly increases above the equilibrium concentration value while leaving the dinude zone, and then the difference between the bacon silicon concentration value and the interstitial concentration value is changed. The peak (first and second peaks) is formed at the maximum position, that is, the slope of the vacancy silicon concentration profile is greater than the slope of the interstitial silicon concentration profile, and then the vacancy silicon again toward the bulk region after the peak. The concentration profile of the silicon is reduced between the first peak and the second peak It will have a concave shape.

On the other hand, bacon defects in the wafer are formed as oxygen precipitates by heat treatment repeatedly performed in subsequent semiconductor device fabrication processes. That is, bacon point defects become nucleation centers of oxygen precipitates formed by subsequent heat treatment. Therefore, when the baconic concentration is high, the concentration of oxygen precipitates formed accordingly is also increased. Therefore, the shape of the concentration profile of the oxygen precipitate can be easily inferred through the vacancy concentration profile in the wafer.

On the other hand, look at the relationship between the concentration of bacon and oxygen precipitates,

In Si (silicon substrate) + x Oi + y Vsi ⇔ SiO ₂ (oxygen precipitate) + Si _I (interstitial silicon) + σ, if the concentration of silicon (Vsi) and initial oxygen concentration (Oi) are high, the reaction Proceeding to the right, it can be seen that the concentration of oxygen precipitates is increased. In the above relation, x, y, σ are constants.

Meanwhile, in the embodiment of the present invention, after the RTA process of FIG. 5 is completed, a subsequent heat treatment was performed to measure the formation state of the oxygen precipitate. Subsequent heat treatments generally set conditions within a similar range in which oxygen precipitates were formed, taking into account heat treatment processes that were repeatedly performed in the fabrication of semiconductor devices. In this embodiment, to unify the comparison criteria, after performing the RTA process of FIG. 5, all wafers were heat-treated under nitrogen atmosphere at 800 ° C. for 4 hours and 1600 ° C. for 16 hours.

In considering the gas conditions of the RTA process of FIG. 5, the influences of the flow rate and the mixing ratio of the mixed gas of the present invention were examined, and FIG. 9 is performed by performing the RTA process of FIG. 5 while changing the mixing ratio under an atmosphere of nitrogen gas + argon gas. Fig. 31 is a diagram schematically showing the baconish concentration profile, and FIG. 31 is a graph showing a change in concentration of oxygen precipitates at a peak according to the flow rate of the argon / nitrogen mixed gas, and FIG. 32 is a graph showing the mixing ratio of the argon / nitrogen mixed gas. It is a graph showing the change in concentration of oxygen precipitates at the peak.

In FIG. 9, (a) nitrogen gas: argon gas = 70: 30, (b) nitrogen gas: argon gas = 50: 50, and (c) nitrogen gas: argon gas = 30: 70, respectively. It's about gas. As the ratio of nitrogen gas increases, the peak of the vacancy concentration profile is directed toward the surface of the wafer, and the concentration value at the peak also increases. On the other hand, as the ratio of nitrogen gas increases, the size of the dinude zone in which oxygen precipitates are not formed by subsequent heat treatment also decreases rapidly.

The measurement data of FIG. 31 is an RTA process condition of FIG. 5, wherein the flow rate of argon / nitrogen gas is 1 at a temperature increase rate of 50 ° C./sec, annealing temperature 1250 ° C., annealing time 10 seconds, and a temperature drop rate of 33 ° C./sec. After performing the RTA process of FIG. 5 while increasing to / 1, 2/2, 3/3, 4/4, 5/5 liters / minute (l / min), nitrogen at 800 ° C. for 4 hours and 1600 ° C. for 16 hours After the heat treatment in the atmosphere was measured the concentration of oxygen precipitates at the peak, it can be seen that the concentration of oxygen precipitates increases with increasing the flow rate of the mixed gas.

In addition, the measurement data of FIG. 32 shows that the mixing ratio of argon / nitrogen gas is 3/1, 2.5 / 1.5, 2/2, 1.5 / 2.5, 1/3 liter / min (l / min) under the same RTA process conditions as in FIG. After performing the RTA process of FIG. 5 while performing the heat treatment under nitrogen atmosphere at 800 ° C. for 4 hours and 16 hours at 1600 ° C., the concentration of oxygen precipitates at the peak was measured, and the flow rate of the same mixed gas (4 It can be seen that the concentration of oxygen precipitates increases with the increase of the ratio of nitrogen gas at l / min).

In the present invention, the process conditions of the RTA process, that is, the ratio and flow rate of the mixed gas, the temperature rise rate, the annealing temperature and time, the temperature drop rate, etc. can be variously adjusted, in which case the position of the peak in the concentration profile bacon, bacon at the peak It is determined in consideration of the magnitude of the time concentration value, the vacancy concentration value in the bulk region, the size of the dinude zone, and the like.

FIG. 33 is a graph illustrating a change in concentration of oxygen precipitates at a peak after performing the RTA process of FIG. 5 while changing a ramp-up rate according to an embodiment of the present invention. In order to make the standard of comparison the same, in each case, the mixing ratio of nitrogen gas and argon gas is 50:50, the annealing temperature of the rapid heat treatment is 1250 ° C, the annealing time is 10 seconds, and the temperature drop rate is 33 ° C. / Second, and the subsequent heat treatment was performed under nitrogen atmosphere for 4 hours at 800 ℃, 16 hours at 1600 ℃ for all wafers, as described above, the results are shown in Table 1.

Temperature rise rate (℃ / sec) Oxygen precipitate concentration at peak (ea / cm ³ ) 10 2.0 x 10 ¹⁰ 30 2.5 x 10 ¹⁰ 50 2.1 x 10 ¹⁰ 70 2.0 x 10 ¹⁰ 90 2.0 x 10 ¹⁰

33 and Table 1, it can be seen that the concentration of oxygen precipitates in the peak is not significantly affected by the temperature rise rate.

34 is a graph illustrating a change in concentration of oxygen precipitates at a peak after performing the RTA process of FIG. 5 while varying annealing time according to an embodiment of the present invention. For each case, in each case, the mixing ratio of nitrogen gas and argon gas is 50:50, the temperature increase rate is 50 ° C / sec, the annealing temperature of the rapid heat treatment is 1250 ° C, and the temperature drop rate is 33 ° C / sec. As described above, the heat treatment was performed for 4 hours at 800 ° C. and 16 hours at 1600 ° C. for all wafers, and the results are shown in Table 2 below.

Annealing time (seconds) Oxygen precipitate concentration at peak (ea / cm ³ ) One 1.0 x 10 ⁸ 5 5.0 x 10 ⁹ 10 2.0 x 10 ¹⁰ 30 2.5 x 10 ¹⁰ 60 3.0 x 10 ¹⁰

34 and Table 2, it can be seen that the concentration of oxygen precipitates in the peak is greatly affected by the annealing time, the annealing time of the present invention is to be at least 10 ⁹ / cm 3 or more It can be seen that it should proceed for at least 5 seconds.

FIG. 35 is a graph illustrating a change in concentration of oxygen precipitates at a peak after performing the RTA process of FIG. 5 while varying annealing temperature according to an embodiment of the present invention. In order to make the standard of comparison the same, in each case, the mixing ratio of nitrogen gas and argon gas is 50:50, the temperature increase rate is 50 ° C / sec, the annealing time is 10 seconds, and the temperature drop rate is 33 ° C / Second, the subsequent heat treatment was performed under nitrogen atmosphere for 4 hours at 800 ℃, 16 hours at 1600 ℃ for all wafers, as described above, the results are shown in Table 3.

Annealing Temperature (℃) Oxygen precipitate concentration at peak (ea / cm ³ ) 1250 2.0 x 10 ¹⁰ 1200 5.0 x 10 ⁸ 1150 1.0 x 10 ⁸ 1100 7.0 x 10 ⁷ 1000 7.0 x 10 ⁷

35 and Table 3, it can be seen that the concentration of oxygen precipitates at the peak is greatly affected by the annealing temperature, the annealing temperature of the present invention is to be at least 10 ⁹ / cm 3 or more concentration of oxygen precipitates at the peak It can be seen that at least 1250 ℃ should proceed. However, the annealing temperature and the annealing time are very closely related to the concentration of oxygen precipitates. In order to obtain the same concentration of oxygen precipitates in connection with FIG. 34, the annealing time may be relatively small if the annealing temperature is high. It can be seen that when the annealing temperature is low, the annealing time can be relatively large.

36 is a graph illustrating a change in concentration of oxygen precipitates at a peak after performing the RTA process of FIG. 5 while changing a ramp-down rate according to an embodiment of the present invention. In order to make the standard of comparison the same, in each case, the mixing ratio of nitrogen gas and argon gas is 50:50, the temperature increase rate is 50 ° C / sec, the annealing temperature is 1250 ° C, and the annealing time is 10 seconds. As described above, the subsequent heat treatment was performed under nitrogen atmosphere for 4 hours at 800 ° C. and 16 hours at 1600 ° C. for all wafers, and the results are shown in Table 4.

Temperature drop rate (℃ / sec) Oxygen precipitate concentration at peak (ea / cm ³ ) 10 8.0 x 10 ⁹ 30 2.0 x 10 ¹⁰ 50 2.2 x 10 ¹⁰ 70 3.0 x 10 ¹⁰ 90 3.5 x 10 ¹⁰

36 and Table 4, it can be seen that the concentration of oxygen precipitates in the peak is not significantly affected by the temperature drop rate, but as the temperature drop rate increases, the concentration of oxygen precipitates in the peak increases slightly.

10 is a view showing the concentration profile of the oxygen precipitates by the subsequent heat treatment after performing the RTA process according to an embodiment of the present invention. In FIG. 10, ① denotes a nitrogen gas atmosphere, ② denotes a nitrogen + argon gas atmosphere, ③ denotes a nitrogen gas + hydrogen gas atmosphere, ④ denotes an argon gas atmosphere, and ⑤ denotes a subsequent heat treatment after the RTA process of FIG. 5 is performed. The concentration profile of the oxygen precipitate formed by

In order to make the standard of comparison the same, in each case, rapid heat treatment was carried out for 10 seconds at a temperature of 1250 ° C., and subsequent heat treatments were carried out for 4 hours at 800 ° C. and 16 hours at 1600 ° C. for all wafers, as described above. It was carried out under an atmosphere, the results are shown in Table 5 .

division Oxygen precipitate concentration at peak [cm ^-3 ] Oxygen precipitate concentration in bulk [cm ^-3 ] Denude Zone Depth [㎛] COP resolution argon 8 X 10 ⁹ 8 X 10 ⁹ 50 middle Hydrogen 6 X 10 ⁹ 6 X 10 ⁹ 60 height nitrogen 3 X 10 ¹⁰ 1 X 10 ⁵ (Detect Limit) 0 none Nitrogen / Argon 2 X 10 ¹⁰ 5 X 10 ⁹ 10 middle Nitrogen / hydrogen 1 X 10 ¹⁰ 5 X 10 ⁹ 15 height

FIG. 11 is a view for explaining a decomposition process of Crystal Originated Precipitates (COP) near the surface of a silicon wafer as the RTA process of FIG. 5 is performed in an argon gas atmosphere. In general, a void type COP formed during ingot growth by the Czochralski method forms a cut octahedral void, and a silicon oxide film 22 is formed on the inner wall side of the void 20. During the RTA process of FIG. 5, such as argon gas or hydrogen gas, a phenomenon in which COP is decomposed near the surface occurs under an atmosphere of a gas having an interstitial silicon implantation effect on the wafer surface. More specifically, the decomposition mechanism is described. The initial oxygen concentration (Oi) contained in the ingot during ingot growth is supersaturated beyond the solubility at the cooling temperature with cooling. Therefore, even in the wafer, the initial oxygen concentration is supersaturated above a certain concentration of the solubility line S, but at the wafer surface, the initial oxygen concentration is below the solubility line S due to out-diffusion to the wafer surface. . Therefore, in the bulk region of the wafer, supersaturated initial oxygen is supplied into the void 20 to form the silicon oxide film 22, while the depth near the surface of the wafer (i.e., below the intersection point "T" of the solubility line and the initial oxygen concentration line). ), The oxygen concentration is released from the silicon oxide film 20 in the void 20 and the silicon is supplied to the void due to the effect of interstitial silicon implantation. And eventually die out.

This decomposition of the COP is to broaden the range of the wafer to be subjected to the rapid heat treatment process according to the present invention, as will be described later. As shown in Table 1, the decomposition effect of COP can be seen that hydrogen gas is more effective than argon gas.

12 to 16 are photographs showing the distribution of oxygen precipitates formed by subsequent heat treatment after performing the RTA process of FIG. 5 for each case of FIG. 10, FIG. 12 is a nitrogen gas atmosphere, and FIG. 13 is an argon gas atmosphere. 14 shows a result under a hydrogen gas atmosphere, FIG. 15 shows a nitrogen gas + argon gas atmosphere, and FIG. 16 shows a result under a nitrogen gas + hydrogen gas atmosphere. The left side of each figure is the front side of the wafer, and the right side represents the back side.

17 to 21 are photographs showing depths of the dinude zone in which oxygen precipitates formed near the front surface of the wafer do not exist by the subsequent heat treatment after performing the RTA process of FIG. 5 in each case of FIG. 10. FIG. 18 shows the results under a nitrogen gas atmosphere, FIG. 18 under an argon gas atmosphere, FIG. 19 under a hydrogen gas atmosphere, FIG. 20 under a nitrogen gas + argon gas atmosphere, and FIG. 21 under a nitrogen gas + hydrogen gas atmosphere. As shown in Table 1, it can be seen that the dinude zone is hardly secured under a nitrogen gas atmosphere.

22A to 24B are photographs showing the shape of the COP in an as-grown state and the changed shape after performing the RTA process of FIG. 5, respectively. 22A and 22B illustrate an RTA process in a nitrogen gas atmosphere, and FIGS. 23A and 23B illustrate an RTA process in a nitrogen gas + argon gas atmosphere, and FIGS. 24A and 24B illustrate a nitrogen gas + hydrogen gas atmosphere. The case where the RTA process is performed is shown. As shown in Table 1, it can be seen that decomposition of COP does not occur under a nitrogen atmosphere, and decomposition of COP occurs well under argon gas and hydrogen gas. In particular, the result under hydrogen gas atmosphere shows that COP is completely decomposed. Therefore, if the size of the COP is reduced in the as-grown state, it can be seen that the COP is completely decomposed during the rapid heat treatment of FIG. 5.

Wafer Preparation Step

The present invention relates to controlling the distribution of oxygen precipitates formed by the subsequent heat treatment by performing the rapid heat treatment of FIG. 5 with respect to the silicon wafer, and the steps and application objects of the rapid heat treatment of the present invention can be performed. The preparation of the resulting wafer will be described below.

25 is a flowchart illustrating a process according to an embodiment of the present invention, which illustrates a general wafering process after crystal growth (S10). An outline of a general semiconductor wafering method is described in detail in Chapter 1, pages 1 to 35 of the textbook "Silicon Processing for the VLSI Era, Volume 1, Process Technology", written in 1986 by Wolf and Tauber, FIG. 25. Referring to the wafer wafering process of the semiconductor wafer, the crystal growth process (S10) of forming an ingot in the Czochralski puller is performed after the cutting process (S12) of slicing in the form of a wafer. An etching step S14 is performed to round the side surface of the slice or to etch the surface. Subsequently, after performing the first cleaning process (S16) on the surface, a donor killing process (S18) is performed, and a polishing process (S20) and a second cleaning process (S22) for polishing the entire surface of the wafer on which the semiconductor element is to be formed. This is done and then packaged.

The RTA process of FIG. 5 of the present invention is performed in a donor killing step (S18). Of course, the heat treatment step of the present invention can be performed separately, but it is preferable to perform in the donor killing step in view of cost reduction. In general, donor killing is in the form of ions in the fabrication process of a semiconductor device followed by oxygen contained in a silicon ingot, and thus may act as a donor for impurities implanted in the wafer. It can be referred to as a process of making an oxygen precipitate by performing a heat treatment, typically is carried out for 30 seconds or more at 700 ℃ in RTA equipment.

As a device in which the crystal growth step (S10) is performed, FIG. 27 is a view schematically showing a conventional general Czochralski puller. Referring to FIG. 27, Czochralski Fuller 100 includes a furnace, a crystal pulling mechanism, an environmental controller and a computerized control system. The Czochralski furnace is generally called a hot zone furnace. The hot zone furnace includes a heater 104, a crucible 106 made of quartz, a susceptor 108 made of graphite, and a rotating shaft 110 that rotates in the first direction 112 as shown.

The cooling jacket or cooling port 132 is cooled by external cooling means such as water cooling. Train group 114 provides additional heat distribution, and heating pack 102 is filled with heat absorbing material 116 to provide additional heat distribution.

The crystal pulling mechanism includes a crystal pulling shaft 120 that can rotate in a second direction 122 opposite to the first direction 112 as shown. The crystal raising shaft 120 includes a crystal holder 120a at an end thereof. The crystal holder 120a holds the seed crystal 124 and is pulled from the melt 126 in the crucible 106 to form the ingot 128.

The environmental control system includes a chamber seal 130, a cooling jacket 132 and other flow controllers and vacuum exhaust systems not shown. Computerized control systems can be used to control the heaters, pullers and other electrical and mechanical elements.

To grow a single crystal silicon ingot, the seed crystal 124 is in contact with the silicon melt 126 and is gradually pulled in the axial direction (top). Cooling and solidification of the silicon melt 126 to single crystal silicon occurs at the boundary 131 between the ingot 128 and the melt 126. As shown in FIG. 27, the boundary 131 is convex with respect to the melt 126.

On the other hand, by applying the rapid heat treatment process according to the present invention can be divided into three kinds of silicon wafers that can obtain the concentration profile of the controlled oxygen precipitate as shown in FIG. In other words, perfect defect wafers and vacancy agglomerations in which interstitial agglomerations and vacancy agglomerations are not formed over the entire radial direction of the wafer are formed only in the vacancy-rich region within a certain radius from the center of the wafer. The semi-perfect wafer without interstitial agglomerates and bacony agglomerates on the outside of the wafer, and a wafer with only baconcidum agglomerates without an interstitial agglomerate over the entire wafer are considered to be subject to the rapid heat treatment process of the present invention. Can be. However, the wafer that can be applied to the present invention is not necessarily limited thereto, and any wafer to which the principles of the present invention can be applied may be included. That is, as described above, the present invention obtains the concentration profile of the oxygen precipitate as shown in FIG. 4 by performing a subsequent heat treatment after performing the RTA process of FIG. 5 on a predetermined silicon wafer, and on the other hand, in relation to COP. It is concerned with the implementation of a silicon wafer that exists in the bulk region of the wafer but does not have COP in the denude zone.

In order to prevent defects in silicon wafers, various studies have been made to fabricate high-purity ingots during crystal growth. In particular, techniques for controlling the pulling rate of the seed crystal and the temperature gradient in the hot zone structure are well known. Boron Cove's book, "The Mechanism of Swirl Defects Formation in Silicon" [Journal of Crystal Growth, Vol. 59, 1982, pp. 625-643] describes the ingot pulling rate (V) and the temperature at the ingot-melt contact surface. The technology of the control of the gradient (G) is well disclosed and the Second International Symposium on Advanced Science and Technology for Silicon Materials, which was opened between November 25 and 29, 1996, by the inventors to which it has been applied. According to the paper "Effect of Crystal Defects on Device Characteristics," published in Symposium on Advanced Science and Technology of Silicon Material, a bacon-rich region is formed above the V / G threshold and an interstitial-rich region below the threshold. It can be seen that formed.

More specifically, FIG. 26 is a conceptual diagram showing the relationship between the relative point defect distribution and the V / G in the silicon ingot. When the ingot is grown, the vacancy-rich region is formed when the V / G exceeds the critical point (V / G) *. It can be seen that bachelor agglomerates are formed at or above the critical bachelor's concentration Cv *, and interstitial agglomerates are formed at the critical interstitial concentration C _I * or less. In Fig. 26, (V / G) _B * denotes a B-band which is a ring related to interstitial silicon, and (V'G) _P * denotes a _P -band which is an OSF ring, respectively.

The wafer to which the present invention is applied is a defective perpet wafer in which V / G exists between the B-band and the P-band during ingot growth, a semi-perfect wafer including the P-band, and a critical bacon concentration. Above the corresponding (V / G) *, the vacancy agglomerate will be a wafer or the like formed over the entire wafer.

On the other hand, for the perfect wafer and the semi-perfect wafer, which are the wafers to which the present invention is applied, US Patent Application No. 08 / 989,591 filed by the inventor and No. 09 / 320,210, the application of CIP (Continuation-In-Part) And 09 / 320,102, which are incorporated herein by reference and are incorporated herein by reference, and their detailed description is omitted.

FIG. 28 is a schematic view showing the Czochralski puller disclosed in the electric CIP application invented by the present inventor, which is an improvement of the train unit 214 and the like compared to FIG. 28, the Czochralski puller 200 includes a furnace, crystal pulling mechanism, environmental controller and computerized control system, wherein the hot zone furnace includes a heater 204, a crucible 206, a susceptor. 208 and a rotating shaft 210 that rotates in the first direction 212 as shown. Cooling jacket 232 and train unit 214 provide additional heat distribution, and heating pack 202 is filled with heat absorbing material 216 to provide additional heat distribution.

The crystal pulling mechanism includes a crystal pulling shaft 220 that can rotate in a second direction 222 opposite to the first direction 212 as shown. The crystal raising shaft 220 includes a crystal holder 220a at an end thereof. The crystal holder 220a holds the seed crystal 224 and is pulled from the melt 226 in the crucible 206 to form the ingot 228.

The environmental control system includes a chamber seal 230, a cooling jacket 232 and other flow controllers and vacuum exhaust systems not shown. Computerized control systems can be used to control the heaters, pullers and other electrical and mechanical elements.

To grow a single crystal silicon ingot, the seed crystal 224 is in contact with the silicon melt 226 and is gradually pulled axially (upper). Cooling and solidification of the silicon melt 226 to single crystal silicon occurs at the boundary 231 between the ingot 228 and the melt 226. Compared with FIG. 27, the thermal cut-off housing 234 is further installed to more precisely control the V / G.

FIG. 29 is a schematic view showing a Czochralski puller improved according to an embodiment of the present invention, and FIG. 30 shows an improved main portion thereof, and a description of the same components as in FIG. 28 will be omitted. 30, the shape of the heat shield housing 300 is changed, and the heat shield plate 360 is further installed. The thermal barrier housing 300 has a trapezoidal shape lying therein, and is perpendicular to the internal heat shield housing wall 310 and the external heat shield housing wall 330, and between the internal heat shield housing wall 310 and the external heat shield housing wall 330. A heat shield housing cover 340 inclined upward in an outward direction and a connection between the internal heat shield housing wall 310 and an external heat shield housing wall 340 and inclined downward in an outer direction and inclined downward in an outward direction. It has a ring shape including).

The ring-shaped thermal barrier housing 330 may be a heat-absorbing material that can absorb heat, the thermal barrier housing 330 may be composed of carbon ferrite.

Between the heat shield housing cover 340 and the cooling jacket 232 of the heat shield housing 330 is provided with a heat shield plate 360 surrounding the periphery of the raised ingot, the heat shield housing 330 Is fixed to the upper side of the heating pack 216 by the support member 350.

29 is an improved structure to speed up the cooling rate of the ingot that is basically grown. In general, the size of the voids contained in the crystal-grown ingot is proportional to the square root of the initial bacon concentration formed at the contact surface of the silicon melt with the ingot, but inversely proportional to the square root of the cooling rate of the ingot. On the other hand, if the size of the voids present in the ingot is formed to a predetermined size or less as described in Figure 11, although the voids are formed in the ingot during crystal growth, the voids are present in the denude zone by the rapid heat treatment process of the present invention I never do that.

Accordingly, the cooling rate of the ingot should be increased in order to reduce the size of the voids formed in the ingot according to the object of the present invention. On the other hand, as the cooling rate of the ingot increases, the temperature gradient Gc increases along the central axis of the ingot to be pulled up, and when the V / G is made constant to have a predetermined defect distribution, the pulling speed of the ingot also increases.

In the present invention, the thermal barrier housing so that the cooling rate of the ingot is at least 1.4 ° k / min or more from the temperature of the ingot shaft at the ingot-melt boundary to a constant temperature corresponding to the growth stage of the ingot ( The length "a" and "c" of the inner heat shield housing wall 310 and the outer heat shield housing wall 340 of 300, the inclination angle of the heat shield housing cover 340 ( ) And the inclination angle of the thermal insulation housing bottom 320 ), The distance "d" from the ingot 228 to the internal heat shield housing wall 310, the distance "f" from the crucible 206 to the external heat shield housing wall 330, and the internal heat shield housing wall 310. ) And the distance "e" to the external heat shield housing wall 330 and the arrangement of the heat shield plate 360 are selected.

In the puller of FIG. 29, since the cooling speed of the grown ingot is large, the pulling speed can be very large, for example, from about 0.50 mm / min to about 1.00 mm / min, so that the productivity of the ingot is improved. Process margins during ingot growth for perpet wafers or semi-perfect wafers can also be secured.

The embodiments described above illustrate the spirit of the present invention, and various modifications within the scope of the spirit of the present invention, in particular, the temperature, time, cooling rate, and gas mixing ratio of the rapid heat treatment process may be variously set. In addition, various puller structures are also possible in the preparation stage of the wafer.

As described above, according to the present invention, a silicon wafer in which oxygen deposits are distributed can be formed so that the denude zone is sufficiently secured in the vicinity of the surface of the wafer and at the same time, a sufficient gathering effect is provided in the bulk region of the wafer.

In addition, it is possible to freely control the distribution of defects so that the denude zone is sufficiently secured in the vicinity of the surface of the wafer and at the same time have sufficient gathering effect in the bulk region of the wafer. It is possible to reduce the size of the voids in the ingot.

Claims (46)

delete delete delete delete delete delete delete The concentration profile of the vacancy from the front side to the rear side of the silicon wafer on which the active region of the semiconductor device is formed represents a first peak and a second peak at predetermined depths from the front side and the rear side, respectively, and the first peak from the front side and the rear side, respectively. And a concentration profile of bacon in the bulk region between the first peak and the second peak is concave before the second peak is reached. Having a silicon wafer. 10. The silicon wafer of claim 8, wherein the concentration profile of the vacancy is symmetric about an axis of the silicon wafer. 9. The silicon wafer of claim 8, further comprising Crystal Originated Precipitates (COPs) only in the bulk region between the first and second peaks. Preparing a silicon wafer; And The wafer is subjected to a rapid heat treatment in a mixed gas atmosphere of a gas having a vacancy injection effect and a gas having an interstitial silicon injection effect on the surface of the wafer, so that the vacancy concentration profile from the front side to the rear side of the wafer is And a first peak and a second peak, respectively, at a predetermined depth from the rear surface, and remain below a threshold before reaching the first and second peaks, respectively, from the front and rear surfaces, between the first peak and the second peak. And a rapid heat treatment step to concave the vacancy concentration profile in the bulk region of the silicon wafer. delete delete The process of claim 11, wherein the mixed gas is nitrogen gas + argon gas. The process of claim 11, wherein the mixed gas is nitrogen gas + hydrogen gas. The process of claim 11, wherein the mixing ratio of the mixed gas is adjusted to control peak values of the first peak and the second peak of the bacon and concentration values of the bulk region. 12. The process of claim 11, wherein the depth of the portion maintained below the threshold is controlled by adjusting the mixing ratio of the mixed gas. The process of manufacturing a silicon wafer according to claim 16 or 17, wherein the temperature and time of the rapid heat treatment step are further adjusted in addition to controlling the mixing ratio of the mixed gas. The process of claim 11, wherein the rapid heat treatment step comprises rapid cooling of at least 30 ° C./sec. 20. The process of claim 19, wherein the rapid heat treatment step is performed at a temperature of at least 1150 ° C. 21. The process of claim 20, wherein the rapid heat treatment step is performed for at least 5 seconds or more. The process of claim 20, wherein the rapid heat treatment is performed at a temperature of 1150 ° C. or more for 30 seconds or more. The process of claim 20, wherein the rapid heat treatment is performed for at least 10 seconds at a temperature of 1250 ° C. or more. delete 12. The process of claim 11 wherein the concentration profile of the bacon is symmetrical about the center of the silicon wafer. delete delete delete delete The process of claim 11, wherein the rapid heat treatment step is performed in a donor killing step of the wafering process of the silicon wafer. 12. The process of claim 11, further comprising polishing a front surface of the wafer on which the active region of the semiconductor device is to be formed after the rapid heat treatment step. The method of claim 11, wherein preparing the silicon wafer comprises: High enough to prevent interstitial agglomeration, but low enough to raise the ingot from the silicon melt in the hot zone furnace at a pull rate profile of the ingot that is low enough to confine the baconite agglomerate along the axial direction of the ingot into the baconic-rich region. step; And And cutting the ingot in a radial direction. The method of claim 11, wherein preparing the silicon wafer comprises: A semi-vacancy-rich region at its center, including vacancy agglomeration, and a defect-free region between the vacancy-rich region and the edge of the wafer, including interstitial point defects but free of vacancy and interstitial agglomerates; Pulling the ingot from the silicon melt in the hot zone furnace in the pulling rate profile of the ingot producing the perfect wafer; And And cutting the ingot in a radial direction. The method of claim 11, wherein preparing the silicon wafer comprises: Raising the ingot from the silicon melt in the hot zone furnace at a pull rate profile of the ingot that is high enough to prevent interstitial agglomeration but low enough to prevent agglomeration at bacon; And And cutting the ingot in a radial direction. The method of claim 11, wherein preparing the silicon wafer comprises: Pulling the ingot from the silicon melt in the hot zone furnace in the pull rate profile of the ingot producing a perfect wafer including point defects but free of interstitial and bacony agglomerates; And And cutting the ingot in a radial direction. The method of claim 11, wherein preparing the silicon wafer comprises: Pulling the ingot from the silicon melt in the hot zone furnace at a pull rate profile of the ingot that is high enough so that the baconish agglomerate is formed entirely along the radial direction of the ingot without the formation of interstitial agglomerates; And And cutting the ingot in a radial direction. 37. The process of claim 32, 33 or 36, wherein the size of the bacon agglomerates formed in the silicon wafer after the ingot is raised is formed to be 0.2 µm or less. 37. The process of claim 32, 33 or 36, wherein the size of the bacon agglomerates formed in the silicon wafer after the ingot is pulled up is preferably 0.12 µm or less. . 37. The method of claim 32, 33 or 36, wherein in the pulling up of the ingot, the cooling rate of the central axis of the ingot within the temperature range of the growth stage of the ingot is at least 1.4 ° K / min or more. Silicon wafer manufacturing process. 37. The process of claim 32, 33 or 36, wherein in the pulling up of the ingot, the pulling speed of the ingot is in the range of 0.5 to 1.0 mm / min. Seal; A crucible in the seal holding a silicon melt; A seed holder in the seal adjacent to the crucible; A heater in the seal surrounding the crucible; A vertical inner heat shield housing wall, which is spaced apart from the inner heat shield housing, is connected to the vertical outer heat shield housing wall, the inner heat shield housing wall and the outer heat shield housing wall, and is inclined upward in an outward direction to cover the heat shield housing and the inner heat. A ring-shaped heat shield housing which connects between the blocking housing wall and the external heat shield housing wall and includes a heat shield housing bottom inclined downward in an outward direction; And Czochralski puller for growing a single crystal silicon ingot, characterized in that it comprises a support member arranged to support the thermal barrier housing in the crucible. 42. The Czochralski puller for growing a single crystal silicon ingot according to claim 41, wherein a heat absorbing material capable of absorbing heat is embedded in the ring-shaped thermal barrier housing. 42. Czochralski for growing a single crystal silicon ingot according to claim 41, further comprising a cylindrical cooling jacket extending downwardly from an upper side of the sealing body so that the seed holder can be pulled into the inside thereof. Puller. 45. The chochral for growing single crystal silicon ingot according to claim 43, further comprising a heat shielding plate surrounding the periphery of the drawn ingot between the heat shield housing cover of the heat shield housing and the cooling jacket. Ski puller. 45. The apparatus of claim 44, further comprising means for pulling the seed holder out of the crucible and thereby pulling a single crystal silicon ingot from the silicon melt, the single crystal silicon ingot having an ingot axis and a cylindrical edge, wherein the silicon melt And the ingot are separated by an ingot-melt boundary, wherein the cooling rate of the ingot is at least 1.4 ° k / from the temperature of the ingot axis at the ingot-melt boundary to the temperature corresponding to the growth stage of the ingot. the length of the internal heat shield housing wall and the external heat shield housing wall of the heat shield housing to be min or more, the inclination angle of the heat shield housing cover and the heat shield housing bottom, the distance from the ingot to the internal heat shield housing wall, the external train from the crucible Characterized in that the distance to the housing wall and the arrangement of the heat shield Czochralski puller for growing single crystal silicon ingot. The Czochralski puller for growing a single crystal silicon ingot of claim 41, wherein the thermal barrier housing is made of carbon ferrite.