FI115601B - Förfarande för tillverkning av en elektronikmodul och en elektronikmodul - Google Patents

Förfarande för tillverkning av en elektronikmodul och en elektronikmodul Download PDF

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Publication number
FI115601B
FI115601B FI20030493A FI20030493A FI115601B FI 115601 B FI115601 B FI 115601B FI 20030493 A FI20030493 A FI 20030493A FI 20030493 A FI20030493 A FI 20030493A FI 115601 B FI115601 B FI 115601B
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FI
Finland
Prior art keywords
layer
component
insulating material
conductive
conductor
Prior art date
Application number
FI20030493A
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English (en)
Finnish (fi)
Other versions
FI20030493A0 (sv
FI20030493A (sv
Inventor
Risto Tuominen
Petteri Palm
Original Assignee
Imbera Electronics Oy
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=8565909&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=FI115601(B) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Imbera Electronics Oy filed Critical Imbera Electronics Oy
Priority to FI20030493A priority Critical patent/FI115601B/sv
Publication of FI20030493A0 publication Critical patent/FI20030493A0/sv
Priority to AT04724626T priority patent/ATE531242T1/de
Priority to CNB2004800093496A priority patent/CN100556233C/zh
Priority to PCT/FI2004/000195 priority patent/WO2004089048A1/en
Priority to CN2009101332126A priority patent/CN101546759B/zh
Priority to JP2006505627A priority patent/JP4205749B2/ja
Priority to BRPI0408964A priority patent/BRPI0408964B1/pt
Priority to CA2520992A priority patent/CA2520992C/en
Priority to KR1020057018362A priority patent/KR100687976B1/ko
Priority to EP04724626A priority patent/EP1609339B1/en
Priority to US10/550,023 priority patent/US7663215B2/en
Priority to MXPA05010527A priority patent/MXPA05010527A/es
Publication of FI20030493A publication Critical patent/FI20030493A/sv
Publication of FI115601B publication Critical patent/FI115601B/sv
Application granted granted Critical
Priority to HK06109596.3A priority patent/HK1089328A1/xx
Priority to US12/619,350 priority patent/US8034658B2/en
Priority to US12/699,628 priority patent/US8222723B2/en
Priority to US13/118,650 priority patent/US8704359B2/en
Priority to US14/230,029 priority patent/US20140208588A1/en
Priority to US14/623,569 priority patent/US9363898B2/en

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/19—Manufacturing methods of high density interconnect preforms
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    • H01—ELECTRIC ELEMENTS
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    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0652—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next and on each other, i.e. mixed assemblies
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    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
    • H05K1/188—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit manufactured by mounting on or attaching to a structure having a conductive layer, e.g. a metal foil, such that the terminals of the component are connected to or adjacent to the conductive layer before embedding, and by using the conductive layer, which is patterned after embedding, at least partially for connecting the component
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    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Wire Bonding (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)
  • Credit Cards Or The Like (AREA)
  • Multi-Conductor Connections (AREA)

Claims (23)

1. Förfarande för tillverkning av en elektronikmodul, kännetecknat avatt: - ett ledarskikt (4) väljs, - en komponent (6) omfattande en kontaktbildningsyta med 5 kontaktomräden (7) väljs, - komponenten (6) limmas frän kontaktbildningsytans sida ρέ en första yta av ledarskiktet (4), - pä den första ytan av ledarskiktet (4) utbildas ett isoleringsmaterial-skikt (1), vilket omger den pä ledarskiktet (4) limmade komponenten 10 (6), - genomföringar (17) utformas för att elektriskt ansluta komponentens (6) kontaktomräden (7) tili ledarskiktet (4), och - av ledarskiktet (4) tili verkas ledarmönster (14). »
2. Förfarande i enlighet med patentkrav 1, kännetecknat avattdä 15 komponenten (6) limmas: : · - breds ett limskikt (5) pä ytan av ledarskiktet (4), och « .· - komponentens (6) kontaktbildningsyta pressas in i limskiktet (5). i
| 3. Förfarande i enlighet med patentkrav 1, kännetecknat avattdä komponenten (6) limmas: 115601 - breds limskikt (5) pä komponentens (6) kontaktbildningsyta och ledar-skiktets (4) första yta, och - limskikten (5) pressas mot varandra.
4. Förfarandei enlighetmedpatentkrav2eller3, kännetecknat avatt 5 ätminstone en komponent (6) limmas pä ledarskiktet (4) och ett limskikt (5) breds lokalt pä ledarskiktets (4) yta pä sä sätt, att ledarskiktets (4) yta är väsentligen limfri utanför komponentemas (6) anslutningsomräden.
5. Förfarande i enlighet med patentkrav 1, kännetecknat avattdä komponenten (6) limmas: 10. breds ett limskikt pä komponentens kontaktbildningsyta, och - limskiktet pä ytan av komponenten pressas mot ledarskiktet (4).
·. 6. Förfarande i enlighet med nägot av patentkraven 1-5, kännetecknat av » att • . - ätminstone ett inpassningsmärke (3) utbildas pä ledarskiktet (4) for ‘: 15 inpassning av en komponent (6), och - komponenten (6) limmas pä ledarskiktet (4) inpassad i förhällande ; · tili det ätminstone ena inpassningsmärket (3).
7. Förfarande i enlighet med patentkrav 6, kännetecknat av att det • i ätminstone ena inpassningsmärket utgörs av ett genomgäende häl (3), vilket 20 penetrerar ledarskiktet (4). 115601
8. Förfarandeienlighetmednägotavpatentkraven 1-7, kännetecknat av att ledarmönster (14) tillverkas av ledarskiktet (4) genom att avlägsna en del av ledarskiktets material, varvid det äterstäende materialet bildar ledarmönstren.
9. Förfarande i enlighet med nägot av patentkraven 1-8, kännetecknat av 5 att för utformning av genomföringar i ledarskiktet (4) och limskiktet (5) bildas öppningar (17) vid komponentens (6) kontaktomräden (7).
10. Förfarande i enlighet med nägot av patentkraven 1-9, kännetecknat av att tili ledarskiktet är ett stödskikt (12) anslutet, vilket avlägsnas efter tillverkningen av isoleringsmaterialskiktet (1), men före tillverkningen av ledarmönstren (14). 10
11. Förfarande i enlighet med nägot av patentkraven 1-10, kännetecknat av att det isoleringsmaterialskikt (1) som omger komponenten (6) tillverkas genom att vid ledarskiktet (4) fästa ett isoleringsmaterialskikt (1), väri häl eller fördjupningar utformats för en komponent eller ett flertal komponenter.
12. Förfarande i enlighet med patentkrav 11, kännetecknat avattpä ytan av 15 det första isoleringsmaterialskiktet (1), som skall fastas vid ledarskiktet (4), fasts ett • andra isoleringsmaterialskikt (11), vilket är enhetligt och som täcker komponenten (6).
13. Förfarande i enlighet med nägot av patentkraven 1-12, kännetecknat av ;. att pä isoleringsmaterialskiktets (1) motstäende yta utbildas ett andra ledarmönster- ; 20 skikt(19). •;.. j
14. Förfarande i enlighet med nägot av patentkraven 1-13, kännetecknat av att pä ledarskiktet (4) limmas en separat, tili en kretskortstruktur icke-ansluten , ,, J komponent (6). 115601
15. Förfarande ienlighetmednägotavpatentkraven 1-14, kännetecknat av att i en elektronikmodul insänks pä motsvarande sätt flera än en komponent (6).
16. Förfarande i enlighet med patentkrav 15, kännetecknat av att de i elektronikmodulen insänkta komponenterna (6) ansluts elektriskt med varandra for 5 att bilda en funktionell helhet.
17. Förfarande i enlighet med nägot av patentkraven 1-16, kännetecknat av att en första modul och ätminstone en andra modul tillverkas, och de tillverkade modulema fästs ovanpä varandra pä sä sätt, att modulema inpassas i förhällande tili varandra. 10
18. Förfarande i enlighet med patentkrav 17, kännetecknat av att genom de pä varandra fasta modulema bildas häl för genomföringar, och i de pä detta sätt erhällna hälen tillverkas ledare (31) för att koppia elektronikkretsama pä varje modul tili varandra för att bilda en funktionell helhet.
19. En elektronikmodul, som omfattar: 15. ett isoleringsmaterialskikt (1) med en första och andra yta, • · * • · · • · ‘- ätminstone ett/en i isoleringsmaterialskiktet (1) beläget/belägen häl eller fördjupning, som öppnar sig mot den första ytan, - ätminstone en komponent (6) omfattande kontaktomräden (7), vilken komponent (6) är anordnad pä sä sätt, att kontaktomrädena (7) ligger ‘ · · * ‘ 20 pä ett avständ frän nivan av isoleringsmaterialskiktets (1) första yta, » · : - ett ledarmönsterskikt (14), vilket sträcker sig över ätminstone ett häl ': ‘ ’ · eller en fördjupning i isoleringsmaterialskiktet (1) och tili komponentens (6) kontaktomräden (7), 115601 - ett härdat limskikt (5) mellan komponenten (6) och ledarmönsters-kiktet (14), och - ledarmaterialformationer (17), som penetrerar limskiktet (5), för att bilda en elektrisk kontakt mellan ledarmönsterskiktet (14) och 5 komponentens kontaktomräden (7), kännetecknad av att - ätminstone en komponent (6) befinner sig inne i ätminstone ett häl eller en fördjupning och omfattar kontaktomräden (7) pä den yta av komponenten som ligger mot isoleringsmaterialskiktets (1) första yta, 10. ledarmönsterskiktet (14) löper pä den första ytan av isolerings- materialskiktet (1), och - det härdade limskiktet (5) är beläget i hälet eller fördjupningen i ·. isoleringsmaterialskiktet (1).
» » : * 20. Elektronikmodul i enlighet med patentkrav 19, kännetecknad av att ,' 15 komponentens (6) tjocklek är mindre än isoleringsmaterialskiktets (1) tjocklek i , ·* riktningen mellan isoleringsmaterialskiktets första och andra yta. •
21. Elektronikmodul i enlighet med patentkrav 19 eller 20, kännetecknad av * · ; att nämnda ledarmönsterskikt (14) är väsentligen plant pä sä sätt, att den yta av ledar mönsterskiktet som ligger mot isoleringsmaterialskiktet (1) och mot det i isolerings-’ · 20 materialskiktet belägna hälet eller fördjupningen för komponenten (6), i sin helhet t väsentligen ligger pä nivan av isoleringsmaterialskiktets första yta. * · 11S60-1
22. Elektronimodul i enlighet med nägot av patentkraven 19-21, känne-tecknad avatt den omfattar ett andra ledarmönsterskikt (19), som löper pä isoleringsmaterialskiktets (1) andra yta.
23. Elektronikmodul i enlighet med nägot av patentkraven 19-22, k ä n n e - 5 tecknadavatt den omfattar ett flertal komponenter (6), vilka medelst ledar-mönster (14) är elektriskt anslutna tili varandra pä sä sätt, att komponentema (6) bildar en funktionell helhet. » > · » * »
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FI20030493A FI115601B (sv) 2003-04-01 2003-04-01 Förfarande för tillverkning av en elektronikmodul och en elektronikmodul
MXPA05010527A MXPA05010527A (es) 2003-04-01 2004-03-31 Metodo para la elaboracion de un modulo electronico y un modulo electronico.
EP04724626A EP1609339B1 (en) 2003-04-01 2004-03-31 Method for manufacturing an electronic module and an electronic module
US10/550,023 US7663215B2 (en) 2003-04-01 2004-03-31 Electronic module with a conductive-pattern layer and a method of manufacturing same
PCT/FI2004/000195 WO2004089048A1 (en) 2003-04-01 2004-03-31 Method for manufacturing an electronic module and an electronic module
CN2009101332126A CN101546759B (zh) 2003-04-01 2004-03-31 制造电子模块的方法以及电子模块
JP2006505627A JP4205749B2 (ja) 2003-04-01 2004-03-31 電子モジュールの製造方法及び電子モジュール
BRPI0408964A BRPI0408964B1 (pt) 2003-04-01 2004-03-31 método para fabricar um módulo eletrônico e módulo eletrônico
CA2520992A CA2520992C (en) 2003-04-01 2004-03-31 Method for manufacturing an electronic module and an electronic module
KR1020057018362A KR100687976B1 (ko) 2003-04-01 2004-03-31 전자 모듈 및 그의 제조 방법
AT04724626T ATE531242T1 (de) 2003-04-01 2004-03-31 Verfahren zur herstellung eines elektronsichen moduls und elektronisches modul
CNB2004800093496A CN100556233C (zh) 2003-04-01 2004-03-31 制造电子模块的方法以及电子模块
HK06109596.3A HK1089328A1 (en) 2003-04-01 2006-08-29 Method for manufacturing an electronic module and an electronic module
US12/619,350 US8034658B2 (en) 2003-04-01 2009-11-16 Electronic module with a conductive-pattern layer and a method of manufacturing same
US12/699,628 US8222723B2 (en) 2003-04-01 2010-02-03 Electric module having a conductive pattern layer
US13/118,650 US8704359B2 (en) 2003-04-01 2011-05-31 Method for manufacturing an electronic module and an electronic module
US14/230,029 US20140208588A1 (en) 2003-04-01 2014-03-31 Method for manufacturing an electronic module and an electronic module
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KR100687976B1 (ko) 2007-02-27
WO2004089048A1 (en) 2004-10-14
US8034658B2 (en) 2011-10-11
HK1089328A1 (en) 2006-11-24
CA2520992C (en) 2013-01-22
US7663215B2 (en) 2010-02-16
ATE531242T1 (de) 2011-11-15
CA2520992A1 (en) 2004-10-14
BRPI0408964B1 (pt) 2017-05-09
CN1771767A (zh) 2006-05-10
JP4205749B2 (ja) 2009-01-07
JP2006523375A (ja) 2006-10-12
CN101546759A (zh) 2009-09-30
FI20030493A0 (sv) 2003-04-01
EP1609339B1 (en) 2011-10-26
US20060278967A1 (en) 2006-12-14
CN101546759B (zh) 2011-07-06
KR20060005348A (ko) 2006-01-17
US20100062568A1 (en) 2010-03-11
MXPA05010527A (es) 2006-03-10
EP1609339A1 (en) 2005-12-28
BRPI0408964A (pt) 2006-04-04
CN100556233C (zh) 2009-10-28
FI20030493A (sv) 2004-10-02

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