FI115285B - Förfarande för insänkning av en komponent i ett basmaterial och för bildning av en kontakt - Google Patents
Förfarande för insänkning av en komponent i ett basmaterial och för bildning av en kontakt Download PDFInfo
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- FI115285B FI115285B FI20020190A FI20020190A FI115285B FI 115285 B FI115285 B FI 115285B FI 20020190 A FI20020190 A FI 20020190A FI 20020190 A FI20020190 A FI 20020190A FI 115285 B FI115285 B FI 115285B
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
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- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L24/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
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- H01L24/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
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- H01L2224/24135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/24137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
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- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
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Claims (19)
1. Förfarande för insänkning av en komponent (8) i ett basmaterial och för bildning av elektriska kontakter med komponenten (8), vid vilket förfarande - en basplatta (1) väljs som basmaterial, 5. ett häl (6) utformas i basplattan (1), - komponenten (8) anordnas i hälet (6), varvid en första yta hos komponenten uppvisar kontaktomräden eller kontaktutspräng för att bilda elektriska kontakter, - komponenten (8) fasts pä plats i hälet (6), som utformats i basplattan (1), 10. ett isoleringsskikt (10) tillverkas pä ätminstone en yta av basmaterialet pä sä sätt, att isoleringsskiktet (10) täcker komponenten (8), - i isoleringsskiktet (10) utformas kontaktöppningar (12) för komponenten (8), och , ·. - i kontaktöppningarna (12) och pä isoleringskiktet (10) tillverkas ledare (13) . ·. 15 för att bilda elektriska kontakter med komponenten (8), kännetecknat av att ;' : - pä basplattan (1) tillverkas ledarmönster (4), # - en position för hälet (6) väljs och komponenten (8) inpassas i förhällande tili , de pä basplattan (1) tillverkade ledarmönstren (4), > · ’: 20 och efter tillverkningen av hälet (6) - lamineras tejp (7) eller en tejpaktig film pä basplattans (1) andra yta (1 b), 1 » » · » · / . - komponenten (8) anordnas i hälet (6) utformat i basplattan (1) frän bas- , ’ _, plattans (1) första yta (la) pä sä sätt, att mikrokretsens (8) första yta kommer * t 1 1 5 2 8 F att ligga mot tejpen (7) eller den tejpaktiga filmen och väsentligen i samma plan som basplattans (1) andra yta (Ib), - komponenten (8) fästs pä plats i hälet (6) utformat i kretskortet genom att fylla hälet (6) med fyllnadsmaterial (9), och 5. efter att komponenten (8) fästs avlägsnas den tejp (7) eller tejpaktiga film som laminerats pä basplattans (1) andra yta (Ib),
2. Förfarande i enlighet med patentkrav 1, kännetecknat avattpä sidoväggama av hälet (6) utformat för komponenten (8) odlas ledarmaterial för att 10 utbilda ett stömingsskydd runt komponenten (8).
3. Förfarande i enlighet med patentkrav 1 eller 2, kännetecknat av att den komponent (8) som skall anordnas i hälet (6) utgörs av en mikrokrets. 15
4. Förfarande i enlighet med patentkrav 3, kännetecknat av att efter ·.· avlägsnande av den tejp (7) eller tejpaktiga film som laminerats pä basplattans (1) : andra yta (Ib) » f - lamineras en RCC-film (10, 11) pä basplattans (1) andra yta (1 b), och » - i RCC-filmen (10, 11) tillverkas ledarmönster (13) samt kontaktöppningar ...: * 20 (12) för komponenten (8).
5. Förfarande i enlighet med patentkrav 3, kännetecknat av att i .:. basmaterialet utformas häl (3) för genomföringar, och efter avlägsnande av den tejp ; ‘ . (7) eller tejpaktiga film som laminerats pä basplattans (1) andra yta (Ib) • · I 1 1 5 2 8 F - lamineras RCC-filmer (10, 11) pä basplattans (1) första och andra yta (la, Ib), ledarmönster (13) samt kontaktöppningar (12) för komponenten (8) och genomföringama tillverkas i RCC-filmen (10, 11), som är laminerad pä den 5 andra ytan (1 b) av basplattan (1), och - ledarmönster (13) samt kontaktöppningar (12) för genomföringama tili-verkas i RCC-filmen (10, 11), som är laminerad pä basplattans (1) första yta (la). 10
6. Förfarande i enlighet med patentkrav 3, kännetecknat avatt efiter avlägsnande av den tejp (7) eller tejpaktiga film som laminerats pä basplattans (1) andra yta (Ib) - tillverkas en pre-preg-epoxifilm (10) pä basplattans (1) andra yta (1 b), *, - kontaktöppningar (12) för komponenten (8) tillverkas i epoxifilmen (10), 15 och - ledarmönster (13) tillverkas pä epoxifilmen (10).
7. Förfarande i enlighet med patentkrav 3, kännetecknat avatti basmaterialet utformas häl (3) för genomföringar, och efter avlägsnande av den tejp ’ -! 20 (7) eller tejpaktiga film som laminerats pä basplattans (1) andra yta (Ib) : - lamineras pre-preg-epoxifilmer (10) pä basplattans (1) första och andra yta ·:· : (la, Ib), ..!:" - kontaktöppningar (12) för komponenten (8) och genomföringama tillverkas .. · i epoxifilmen (10) pä basplattans (1) andra yta (Ib), och 1 1 5 2 8 F kontaktöppningar för genomföringama (12) tillverkas i epoxifilmen (10) pä basplattans (1) första yta (la).
8. Förfarande i enlighet med nagot av patentkraven 3-7, kännetecknat av 5 att i mikrokretsen (8) bildas en elektrisk kontakt i riktningen frän basplattans (1) andra yta (Ib) efter att mikrokretsen (8) är anordnad i hälet (6) utformat i basplattan (1).
9. Förfarande i enlighet med nagot av patentkraven 3-8, kännetecknat av 10 att i mikrokretsen (8) bildas en elektrisk kontakt genom att pä mikrokretsens (8) kontaktomräden eller kontaktutspräng odla ett ledande material.
10. Förfarande i enlighet med nagot av patentkraven 3-9, kännetecknat av att den elektriska kontakten med mikrokretsen (8) bildas utan lod medelst en . 15 kretskortstillverkningsteknik. » t
» » , 11. Förfarande i enlighet med nagot av patentkraven 1-10, kännetecknat av att i basmaterialet insänks pä motsvarande sätt flera än en komponent (8). 20
12. Förfarande i enlighet med patentkrav 11, kännetecknat av att i • * · 'll; basplattan (1) utformas ett eget häl (6) för varje komponent (8) som skall insänkas i ’ · ‘ basmaterialet, och varje komponent (8) som skall insänkas i basmaterialet anordnas i • I ' · '; ett eget häl (6). » ♦ · f # » * « • i » * · : ” ; 25
13. Förfarande i enlighet med nägot av patentkraven 1-12, kännetecknat av att i basmaterialet insänks ätminstone tvä mikrokretsar (8), och av att ett 1 1 5 2 8 F ledarskikt ¢13) odlas, som är direkt anslutet tili kontaktomrädena eller kontakt-utsprängen i ätminstone tvä mikrokretsar (8) för att elektriskt sammankoppla mikrokretsema (8) tili en funktionell helhet. 5
14. Förfarandeienlighetmednägotavpatentkraven 1-13, kännetecknat av att en multiskiktsstruktur med ätminstone fyra pä varandra liggande ledarskikt (4,13) tillverkas.
15. Förfarande i enlighet med nägot av patentkraven 1-14, kännetecknat 10 av att ett första basmaterial och ätminstone ett andra basmaterial tillverkas, och bas- materialen staplas och fasts ovanpä varandra pä sä sätt, att basmaterialen inpassas i förhällande tili varandra.
16. Förfarande i enlighet med nägot av patentkraven 1-14, kännetecknat av 15 att - ett första och andra basmaterial samt ett mellanskikt (21) tillverkas, ' - det andra basmaterialet anordnas ovanpä det första, och det andra basmaterialet inpassas i förhällande tili det första basmaterialet, » » - mellanskiktet (21) bringas mellan det första och andra basmaterialet, och 20. det första och andra basmaterialet lamineras tili varandra med hjälp av mellanskiktet (21).
17. Förfarande i enlighet med patentkrav 16, kännetecknat av att · , - ätminstone ett tredje basmaterial samt ett mellanskikt (21) för vart tredje 25 basmaterial tillverkas, 115285 vart tredje basmaterial anordnas i sin tur ovanför det första och andra basmaterialet, och vart tredje basmaterial inpassas i förhällande till ett undre basmaterial, - ett mellanskikt (21) bringas under vart tredje basmaterial, och 5. det första, andra och vart tredje basmaterial lamineras till varandra med hjälp av mellanskikten (21).
18. Förfarande i enlighet med nägot av patentkraven 15-17, kännetecknat av att genom de pä varandra fästa basmaterialen borras häl (23) för genomföringar, 10 och i de borrade hälen (23) utbildas ledare för att koppia elektronikkretsama pä vaije basmaterial tili varandra för att bilda en funktionell helhet.
19. Förfarande i enlighet med nägot av patentkraven 1-18, kännetecknat av att temperaturen av basplattan (4), komponenten (8) och ledarskiktet (13) i direkt 15 anslutning tili komponenten (8) under processen uppgär till under 200 °C, och :': företrädesvis tili mellan 20 och 85 °C. » 1 »
Priority Applications (14)
Application Number | Priority Date | Filing Date | Title |
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FI20020190A FI115285B (sv) | 2002-01-31 | 2002-01-31 | Förfarande för insänkning av en komponent i ett basmaterial och för bildning av en kontakt |
EP03700815A EP1474959B1 (en) | 2002-01-31 | 2003-01-28 | Method for embedding a component in a base and forming a contact |
AT03700815T ATE295064T1 (de) | 2002-01-31 | 2003-01-28 | Verfahren zum einbetten einer komponente in eine basis und zur bildung eines kontakts |
CNB038031353A CN100566511C (zh) | 2002-01-31 | 2003-01-28 | 用于将元件置入于基座中并且形成接触的方法 |
RU2004126137/09A RU2297736C2 (ru) | 2002-01-31 | 2003-01-28 | Способ встраивания компонента в основание и формирования электрического контакта с компонентом |
DE60300619T DE60300619T2 (de) | 2002-01-31 | 2003-01-28 | Verfahren zum einbetten einer komponente in eine basis und zur bildung eines kontakts |
KR1020047011833A KR101013325B1 (ko) | 2002-01-31 | 2003-01-28 | 베이스에 부품을 삽입하고 콘택을 형성하는 방법 |
KR1020107023652A KR20100126546A (ko) | 2002-01-31 | 2003-01-28 | 베이스에 부품을 삽입하고 콘택을 형성하는 방법 |
PCT/FI2003/000064 WO2003065778A1 (en) | 2002-01-31 | 2003-01-28 | Method for embedding a component in a base and forming a contact |
US10/502,340 US6991966B2 (en) | 2002-01-31 | 2003-01-28 | Method for embedding a component in a base and forming a contact |
JP2003565216A JP2005517287A (ja) | 2002-01-31 | 2003-01-28 | 構成要素をベースに埋め込み接触を形成する方法 |
BRPI0307364A BRPI0307364B1 (pt) | 2002-01-31 | 2003-01-28 | método para embutir um componente em uma base e produzir um contato, e módulo eletrônico fabricado usando o referido método |
IL163238A IL163238A (en) | 2002-01-31 | 2004-07-27 | Method for embedding a component in a base and forming a contact |
HK05108993.5A HK1077151A1 (en) | 2002-01-31 | 2005-10-12 | Method for embedding a component in a base and forming a contact |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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FI20020190A FI115285B (sv) | 2002-01-31 | 2002-01-31 | Förfarande för insänkning av en komponent i ett basmaterial och för bildning av en kontakt |
FI20020190 | 2002-01-31 |
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FI20020190A0 FI20020190A0 (sv) | 2002-01-31 |
FI20020190A FI20020190A (sv) | 2003-08-01 |
FI115285B true FI115285B (sv) | 2005-03-31 |
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FI20020190A FI115285B (sv) | 2002-01-31 | 2002-01-31 | Förfarande för insänkning av en komponent i ett basmaterial och för bildning av en kontakt |
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US (1) | US6991966B2 (sv) |
EP (1) | EP1474959B1 (sv) |
JP (1) | JP2005517287A (sv) |
KR (2) | KR20100126546A (sv) |
CN (1) | CN100566511C (sv) |
AT (1) | ATE295064T1 (sv) |
BR (1) | BRPI0307364B1 (sv) |
DE (1) | DE60300619T2 (sv) |
FI (1) | FI115285B (sv) |
HK (1) | HK1077151A1 (sv) |
IL (1) | IL163238A (sv) |
RU (1) | RU2297736C2 (sv) |
WO (1) | WO2003065778A1 (sv) |
Families Citing this family (89)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2002027786A1 (fr) * | 2000-09-25 | 2002-04-04 | Ibiden Co., Ltd. | Element semi-conducteur, procede de fabrication d'un element semi-conducteur, carte a circuit imprime multicouche, et procede de fabrication d'une carte a circuit imprime multicouche |
FI115601B (sv) | 2003-04-01 | 2005-05-31 | Imbera Electronics Oy | Förfarande för tillverkning av en elektronikmodul och en elektronikmodul |
US8704359B2 (en) | 2003-04-01 | 2014-04-22 | Ge Embedded Electronics Oy | Method for manufacturing an electronic module and an electronic module |
US8222723B2 (en) | 2003-04-01 | 2012-07-17 | Imbera Electronics Oy | Electric module having a conductive pattern layer |
US7547975B2 (en) * | 2003-07-30 | 2009-06-16 | Tdk Corporation | Module with embedded semiconductor IC and method of fabricating the module |
FI20031201A (sv) * | 2003-08-26 | 2005-02-27 | Imbera Electronics Oy | Förfarande för tillverkning av en elektronikmodul och en elektronikmodul |
FI20031341A (sv) | 2003-09-18 | 2005-03-19 | Imbera Electronics Oy | Förfarande för tillverkning av en elektronikmodul |
FI20040592A (sv) | 2004-04-27 | 2005-10-28 | Imbera Electronics Oy | Ledande av värme från en insatt komponent |
FI117814B (sv) | 2004-06-15 | 2007-02-28 | Imbera Electronics Oy | Förfarande för tillverkning av en elektronikmodul |
US8487194B2 (en) | 2004-08-05 | 2013-07-16 | Imbera Electronics Oy | Circuit board including an embedded component |
FI117812B (sv) * | 2004-08-05 | 2007-02-28 | Imbera Electronics Oy | Tillverkning av ett skikt innehållande en komponent |
JP4148201B2 (ja) * | 2004-08-11 | 2008-09-10 | ソニー株式会社 | 電子回路装置 |
US7615856B2 (en) * | 2004-09-01 | 2009-11-10 | Sanyo Electric Co., Ltd. | Integrated antenna type circuit apparatus |
TWI241007B (en) * | 2004-09-09 | 2005-10-01 | Phoenix Prec Technology Corp | Semiconductor device embedded structure and method for fabricating the same |
TW200618705A (en) | 2004-09-16 | 2006-06-01 | Tdk Corp | Multilayer substrate and manufacturing method thereof |
FI117369B (sv) | 2004-11-26 | 2006-09-15 | Imbera Electronics Oy | Förfarande för tillverkning av en elektronikmodul |
US7410907B2 (en) * | 2005-03-31 | 2008-08-12 | Lucent Technologies Inc. | Fabricating integrated devices using embedded masks |
KR100651562B1 (ko) * | 2005-06-14 | 2006-11-29 | 삼성전기주식회사 | 전자부품 내장형 회로기판의 제조방법 |
FI122128B (sv) * | 2005-06-16 | 2011-08-31 | Imbera Electronics Oy | Förfarande för tillverkning av kretskortskonstruktion |
WO2006134220A1 (en) | 2005-06-16 | 2006-12-21 | Imbera Electronics Oy | Method for manufacturing a circuit board structure, and a circuit board structure |
FI119714B (sv) | 2005-06-16 | 2009-02-13 | Imbera Electronics Oy | Kretskortskonstruktion och förfarande för tillverkning av kretskortskonstruktion |
JP2007012761A (ja) * | 2005-06-29 | 2007-01-18 | Tdk Corp | 半導体ic内蔵基板及びその製造方法 |
US8829661B2 (en) | 2006-03-10 | 2014-09-09 | Freescale Semiconductor, Inc. | Warp compensated package and method |
JP3942190B1 (ja) * | 2006-04-25 | 2007-07-11 | 国立大学法人九州工業大学 | 両面電極構造の半導体装置及びその製造方法 |
KR100796523B1 (ko) * | 2006-08-17 | 2008-01-21 | 삼성전기주식회사 | 전자부품 내장형 다층 인쇄배선기판 및 그 제조방법 |
US8021981B2 (en) | 2006-08-30 | 2011-09-20 | Micron Technology, Inc. | Redistribution layers for microfeature workpieces, and associated systems and methods |
KR100769527B1 (ko) * | 2006-09-19 | 2007-10-23 | 삼성전기주식회사 | 임베디드 인쇄회로기판 및 그 제조방법 |
US20080123318A1 (en) * | 2006-11-08 | 2008-05-29 | Atmel Corporation | Multi-component electronic package with planarized embedded-components substrate |
KR100788213B1 (ko) * | 2006-11-21 | 2007-12-26 | 삼성전기주식회사 | 전자소자 내장형 인쇄회로기판의 제조방법 |
US20080313894A1 (en) * | 2007-06-21 | 2008-12-25 | General Electric Company | Method for making an interconnect structure and low-temperature interconnect component recovery process |
US20080318413A1 (en) * | 2007-06-21 | 2008-12-25 | General Electric Company | Method for making an interconnect structure and interconnect component recovery process |
US20080318055A1 (en) * | 2007-06-21 | 2008-12-25 | General Electric Company | Recoverable electronic component |
US20080318054A1 (en) * | 2007-06-21 | 2008-12-25 | General Electric Company | Low-temperature recoverable electronic component |
US9610758B2 (en) * | 2007-06-21 | 2017-04-04 | General Electric Company | Method of making demountable interconnect structure |
US9953910B2 (en) | 2007-06-21 | 2018-04-24 | General Electric Company | Demountable interconnect structure |
WO2009001621A1 (ja) * | 2007-06-26 | 2008-12-31 | Murata Manufacturing Co., Ltd. | 部品内蔵基板の製造方法 |
TWI360207B (en) * | 2007-10-22 | 2012-03-11 | Advanced Semiconductor Eng | Chip package structure and method of manufacturing |
EP2259666A4 (en) | 2008-03-27 | 2011-09-07 | Ibiden Co Ltd | PRINTED CIRCUIT BOARD COMPRISING INTEGRATED ELECTRONIC COMPONENTS, AND METHOD FOR MANUFACTURING THE SAME |
US8259454B2 (en) * | 2008-04-14 | 2012-09-04 | General Electric Company | Interconnect structure including hybrid frame panel |
US8264085B2 (en) | 2008-05-05 | 2012-09-11 | Infineon Technologies Ag | Semiconductor device package interconnections |
WO2009145727A1 (en) * | 2008-05-28 | 2009-12-03 | Agency For Science, Technology And Research | A semiconductor structure and a method of manufacturing a semiconductor structure |
AT10247U8 (de) | 2008-05-30 | 2008-12-15 | Austria Tech & System Tech | Verfahren zur integration wenigstens eines elektronischen bauteils in eine leiterplatte sowie leiterplatte |
KR100996914B1 (ko) * | 2008-06-19 | 2010-11-26 | 삼성전기주식회사 | 칩 내장 인쇄회로기판 및 그 제조방법 |
TWI573201B (zh) | 2008-07-18 | 2017-03-01 | 聯測總部私人有限公司 | 封裝結構性元件 |
CN102204418B (zh) | 2008-10-30 | 2016-05-18 | At&S奥地利科技及系统技术股份公司 | 用于将电子部件集成到印制电路板中的方法 |
US8124449B2 (en) | 2008-12-02 | 2012-02-28 | Infineon Technologies Ag | Device including a semiconductor chip and metal foils |
US7993941B2 (en) * | 2008-12-05 | 2011-08-09 | Stats Chippac, Ltd. | Semiconductor package and method of forming Z-direction conductive posts embedded in structurally protective encapsulant |
FI20095110A0 (sv) | 2009-02-06 | 2009-02-06 | Imbera Electronics Oy | Elektronisk modul med EMI-skydd |
US8258010B2 (en) * | 2009-03-17 | 2012-09-04 | Stats Chippac, Ltd. | Making a semiconductor device having conductive through organic vias |
US8497429B2 (en) * | 2009-03-18 | 2013-07-30 | Interplex Industries, Inc. | Planar contact with solder |
JP5330065B2 (ja) * | 2009-04-13 | 2013-10-30 | 新光電気工業株式会社 | 電子装置及びその製造方法 |
TWI456715B (zh) * | 2009-06-19 | 2014-10-11 | Advanced Semiconductor Eng | 晶片封裝結構及其製造方法 |
US8569894B2 (en) | 2010-01-13 | 2013-10-29 | Advanced Semiconductor Engineering, Inc. | Semiconductor package with single sided substrate design and manufacturing methods thereof |
US8320134B2 (en) * | 2010-02-05 | 2012-11-27 | Advanced Semiconductor Engineering, Inc. | Embedded component substrate and manufacturing methods thereof |
TWI411075B (zh) | 2010-03-22 | 2013-10-01 | Advanced Semiconductor Eng | 半導體封裝件及其製造方法 |
EP2410565A1 (en) | 2010-07-21 | 2012-01-25 | Nxp B.V. | Component to connection to an antenna |
US8735735B2 (en) | 2010-07-23 | 2014-05-27 | Ge Embedded Electronics Oy | Electronic module with embedded jumper conductor |
US8941222B2 (en) | 2010-11-11 | 2015-01-27 | Advanced Semiconductor Engineering Inc. | Wafer level semiconductor package and manufacturing methods thereof |
US8680683B1 (en) * | 2010-11-30 | 2014-03-25 | Triquint Semiconductor, Inc. | Wafer level package with embedded passive components and method of manufacturing |
US9406658B2 (en) * | 2010-12-17 | 2016-08-02 | Advanced Semiconductor Engineering, Inc. | Embedded component device and manufacturing methods thereof |
AT13055U1 (de) | 2011-01-26 | 2013-05-15 | Austria Tech & System Tech | Verfahren zur integration eines elektronischen bauteils in eine leiterplatte oder ein leiterplatten-zwischenprodukt sowie leiterplatte oder leiterplatten-zwischenprodukt |
US8487426B2 (en) | 2011-03-15 | 2013-07-16 | Advanced Semiconductor Engineering, Inc. | Semiconductor package with embedded die and manufacturing methods thereof |
US8603858B2 (en) | 2011-07-12 | 2013-12-10 | Infineon Technologies Ag | Method for manufacturing a semiconductor package |
AT13432U1 (de) | 2011-08-31 | 2013-12-15 | Austria Tech & System Tech | Verfahren zur integration eines bauteils in eine leiterplatte oder ein leiterplatten-zwischenprodukt sowie leiterplatte oder leiterplatten-zwischenprodukt |
AT13436U1 (de) | 2011-08-31 | 2013-12-15 | Austria Tech & System Tech | Verfahren zur integration eines bauteils in eine leiterplatte oder ein leiterplatten-zwischenprodukt sowie leiterplatte oder leiterplatten-zwischenprodukt |
KR20140070584A (ko) * | 2011-09-09 | 2014-06-10 | 니혼도꾸슈도교 가부시키가이샤 | 반도체 모듈, 회로기판 |
US8723313B2 (en) | 2012-01-14 | 2014-05-13 | Wan-Ling Yu | Semiconductor package structure and method for manufacturing the same |
EP2615638A3 (en) | 2012-01-16 | 2013-09-25 | Yu, Wan-Ling | Semiconductor Package Structure and Method for Manufacturing The Same |
US9496211B2 (en) | 2012-11-21 | 2016-11-15 | Intel Corporation | Logic die and other components embedded in build-up layers |
US8916422B2 (en) * | 2013-03-15 | 2014-12-23 | United Test And Assembly Center Ltd. | Semiconductor packages and methods of packaging semiconductor devices |
AT514074B1 (de) | 2013-04-02 | 2014-10-15 | Austria Tech & System Tech | Verfahren zum Herstellen eines Leiterplattenelements |
CN105210462B (zh) * | 2013-05-14 | 2018-05-25 | 名幸电子有限公司 | 元器件内置基板的制造方法及元器件内置基板 |
US9171795B2 (en) * | 2013-12-16 | 2015-10-27 | Stats Chippac Ltd. | Integrated circuit packaging system with embedded component and method of manufacture thereof |
CN105280563A (zh) * | 2014-06-10 | 2016-01-27 | 台湾应用模组股份有限公司 | 具缩减厚度的晶片卡封装装置 |
KR20160004157A (ko) | 2014-07-02 | 2016-01-12 | 삼성전기주식회사 | 칩 내장형 기판 및 이의 제조 방법 |
RU2581155C1 (ru) * | 2014-12-10 | 2016-04-20 | федеральное государственное автономное образовательное учреждение высшего образования "Национальный исследовательский университет"Московский институт электронной техники" | Способ изготовления электронного узла |
RU2571880C1 (ru) * | 2015-01-30 | 2015-12-27 | Федеральное государственное автономное образовательное учреждение высшего профессионального образования "Национальный исследовательский университет "МИЭТ" | Способ монтажа микроэлектронных компонентов |
RU2604209C1 (ru) * | 2015-06-05 | 2016-12-10 | Федеральное государственное бюджетное образовательное учреждение высшего образования "Юго-Западный государственный университет" (ЮЗГУ) | Способ 2d-монтажа (внутреннего монтажа) интегральных микросхем |
US9743526B1 (en) * | 2016-02-10 | 2017-08-22 | International Business Machines Corporation | Wiring board with stacked embedded capacitors and method of making |
RU168167U1 (ru) * | 2016-08-18 | 2017-01-23 | Общество с ограниченной ответственностью "ТЭК электроникс" | Печатная плата с массивным компонентом |
RU2645151C1 (ru) * | 2016-10-31 | 2018-02-16 | Акционерное общество "Авиаавтоматика" имени В.В. Тарасова" | Способ изготовления микроэлектронного узла |
RU2651543C1 (ru) * | 2016-12-07 | 2018-04-20 | Акционерное общество "Авиаавтоматика" имени В.В. Тарасова" | Способ изготовления микроэлектронного узла |
EP3557608A1 (en) * | 2018-04-19 | 2019-10-23 | AT & S Austria Technologie & Systemtechnik Aktiengesellschaft | Packaged integrated circuit with interposing functionality and method for manufacturing such a packaged integrated circuit |
CN110571229A (zh) * | 2018-06-05 | 2019-12-13 | 深南电路股份有限公司 | 一种埋入式光感模组及其制造方法 |
US10615053B2 (en) * | 2018-06-07 | 2020-04-07 | Texas Instruments Incorporated | Pre-cut plating lines on lead frames and laminate substrates for saw singulation |
RU2703831C1 (ru) * | 2019-03-01 | 2019-10-22 | Российская Федерация, от имени которой выступает ФОНД ПЕРСПЕКТИВНЫХ ИССЛЕДОВАНИЙ | Способ электрического и механического соединения плат и интерпозеров в 3D электронных сборках |
CN112770495B (zh) * | 2019-10-21 | 2022-05-27 | 宏启胜精密电子(秦皇岛)有限公司 | 全向内埋模组及制作方法、封装结构及制作方法 |
WO2022000191A1 (zh) * | 2020-06-29 | 2022-01-06 | 庆鼎精密电子(淮安)有限公司 | 内埋式电路板及其制作方法 |
RU2752013C1 (ru) * | 2020-10-26 | 2021-07-21 | Федеральное государственное автономное образовательное учреждение высшего образования "Санкт-Петербургский государственный электротехнический университет "ЛЭТИ" им. В.И. Ульянова (Ленина) | Способ изготовления микросборки бескорпусных электронных компонентов на гибких органических подложках |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3192307A (en) | 1964-05-29 | 1965-06-29 | Burndy Corp | Connector for component and printed circuit board |
US4246595A (en) | 1977-03-08 | 1981-01-20 | Matsushita Electric Industrial Co., Ltd. | Electronics circuit device and method of making the same |
US5306670A (en) | 1993-02-09 | 1994-04-26 | Texas Instruments Incorporated | Multi-chip integrated circuit module and method for fabrication thereof |
US6038133A (en) | 1997-11-25 | 2000-03-14 | Matsushita Electric Industrial Co., Ltd. | Circuit component built-in module and method for producing the same |
SE513341C2 (sv) * | 1998-10-06 | 2000-08-28 | Ericsson Telefon Ab L M | Arrangemang med tryckta kretskort samt metod för tillverkning därav |
US6271469B1 (en) | 1999-11-12 | 2001-08-07 | Intel Corporation | Direct build-up layer on an encapsulated die package |
US6154366A (en) | 1999-11-23 | 2000-11-28 | Intel Corporation | Structures and processes for fabricating moisture resistant chip-on-flex packages |
US6538210B2 (en) | 1999-12-20 | 2003-03-25 | Matsushita Electric Industrial Co., Ltd. | Circuit component built-in module, radio device having the same, and method for producing the same |
US6475877B1 (en) | 1999-12-22 | 2002-11-05 | General Electric Company | Method for aligning die to interconnect metal on flex substrate |
JP3809053B2 (ja) * | 2000-01-20 | 2006-08-16 | 新光電気工業株式会社 | 電子部品パッケージ |
JP4685251B2 (ja) * | 2000-02-09 | 2011-05-18 | 日本特殊陶業株式会社 | 配線基板の製造方法 |
JP2001251056A (ja) * | 2000-03-03 | 2001-09-14 | Sony Corp | プリント配線基板の製造方法 |
US6292366B1 (en) | 2000-06-26 | 2001-09-18 | Intel Corporation | Printed circuit board with embedded integrated circuit |
US6489185B1 (en) | 2000-09-13 | 2002-12-03 | Intel Corporation | Protective film for the fabrication of direct build-up layers on an encapsulated die package |
TW511405B (en) | 2000-12-27 | 2002-11-21 | Matsushita Electric Ind Co Ltd | Device built-in module and manufacturing method thereof |
TW511415B (en) | 2001-01-19 | 2002-11-21 | Matsushita Electric Ind Co Ltd | Component built-in module and its manufacturing method |
US6512182B2 (en) | 2001-03-12 | 2003-01-28 | Ngk Spark Plug Co., Ltd. | Wiring circuit board and method for producing same |
TW200302685A (en) | 2002-01-23 | 2003-08-01 | Matsushita Electric Ind Co Ltd | Circuit component built-in module and method of manufacturing the same |
-
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EP1474959A1 (en) | 2004-11-10 |
DE60300619D1 (de) | 2005-06-09 |
KR101013325B1 (ko) | 2011-02-09 |
DE60300619T2 (de) | 2006-01-19 |
FI20020190A0 (sv) | 2002-01-31 |
US6991966B2 (en) | 2006-01-31 |
WO2003065778A1 (en) | 2003-08-07 |
US20050124148A1 (en) | 2005-06-09 |
BRPI0307364B1 (pt) | 2017-02-21 |
RU2004126137A (ru) | 2005-06-10 |
JP2005517287A (ja) | 2005-06-09 |
HK1077151A1 (en) | 2006-02-03 |
FI20020190A (sv) | 2003-08-01 |
KR20040073606A (ko) | 2004-08-19 |
KR20100126546A (ko) | 2010-12-01 |
BR0307364A (pt) | 2004-12-14 |
IL163238A (en) | 2009-06-15 |
ATE295064T1 (de) | 2005-05-15 |
EP1474959B1 (en) | 2005-05-04 |
RU2297736C2 (ru) | 2007-04-20 |
CN100566511C (zh) | 2009-12-02 |
CN1625927A (zh) | 2005-06-08 |
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