Classifications

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  • H01L2224/24221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
  • H01L2224/24225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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  • H01—ELECTRIC ELEMENTS
  • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
  • H01S2301/00—Functional characteristics
  • H01S2301/17—Semiconductor lasers comprising special layers
  • H01S2301/176—Specific passivation layers on surfaces other than the emission facet
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
  • H01S5/00—Semiconductor lasers
  • H01S5/02—Structural details or components not essential to laser action
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
  • H01S5/00—Semiconductor lasers
  • H01S5/02—Structural details or components not essential to laser action
  • H01S5/028—Coatings ; Treatment of the laser facets, e.g. etching, passivation layers or reflecting layers
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
  • H01S5/00—Semiconductor lasers
  • H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
  • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
  • H10H20/01—Manufacture or treatment
  • H10H20/034—Manufacture or treatment of coatings
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
  • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
  • H10H20/01—Manufacture or treatment
  • H10H20/036—Manufacture or treatment of packages
  • H10H20/0362—Manufacture or treatment of packages of encapsulations

Definitions

• Opto-electronic semiconductor devices such as light-emitting diodes (LEDs), edge-emitting lasers, vertical-emitting lasers (VCSELs), laser arrays, photodiodes, solar cells, phototransistors, etc. are increasingly being used as LEDs, LEDs, edge-emitting lasers, vertical-emitting lasers (VCSELs), laser arrays, photodiodes, solar cells, phototransistors, etc. are increasingly being used as
• AlGaAs can be used for emitting or detecting
• Semiconductor based systems have advantages over competing approaches such as incandescent or halogen light sources advantages in terms of compactness and long life.
• Atmosphere conditions are operated, tend to increased failure rates. Thus it could be proven by investigations that oxygen and / or moisture up
• Atomic force microscopy as described in the publication TM Smeeton et al., "Atomic force microscopy of cleaved facets in III-V Nitride Laser Diodes grown on free-standing GaN substrates", Appl. Phys. Lett., Vol. 88, 041910 (2006), have demonstrated on degraded laser facets of Group III nitrides the formation of oxide layers whose thickness is different from that of the underlying composition
• Metal particles are caused by the conductive adhesive.
• Coating methods such as sputtering, sputtering or
• CVD chemical vapor deposition
• the deposited layers often have microcavities due to built-in residual gases, impurities or built-in vacancies. Owing to these porous structures of passivation or mirror layers, for example, oxygen and moisture can reach the critical semiconductor surface and to the top
• AlGaAs, InGaAlP and AlInGaN are usually used.
• this coating is carried out by sputtering, sputtering or chemical vapor deposition of the coating materials, such as in the publications T. Mukai et al. , "Current Status and future prospects of GaN-based LEDs and LDs", Phys. Stat. Sol (a), Vol. 201 (12), p. 2712-2716 (2004) and S. Ito et. al. , "AlGaln violet laser diodes grown on GaN substrates with low aspect ratio", Phys. Stat. Sol. (a), Vol. 200 (1), p. 131-134 (2003).
• AlInGaN laser diodes are packaged in hermetically sealed TO-based housings such as the housing types T038, T056 and T090 under protective gas.
• a disadvantage of this method is on the one hand, the high, associated with additional costs assembly costs and
• optical components is connected.
• At least one object of certain embodiments of the present invention is therefore to provide an optoelectronic device, in the above-mentioned disadvantages
• a further object of certain embodiments is to specify a method for producing an optoelectronic component.
• Optoelectronic component in particular at least one inorganic optoelectronically active semiconductor device with an active region, which is suitable to emit or receive light during operation.
• Semiconductor device has at least one surface area on which by means of atomic layer deposition Sealing material is applied, which is the
• electromagnetic radiation in an ultraviolet to infrared spectral range that is, for example, but not limited to, in a visible spectral range.
• the inorganic optoelectronically active semiconductor component can emit light in operation and, in addition, a light-emitting diode (LED), an edge-emitting semiconductor laser, a vertically-emitting semiconductor laser
• VCSEL VCSEL
• a laser array or a plurality or combination thereof or be one of said components VCSEL
• Optoelectronic active semiconductor device in operation received light and to a photodiode, a solar cell, a
• the semiconductor device may be one or more functional semiconductor layer sequences of a binary, ternary or quaternary III-V compound semiconductor system selected from the
• the semiconductor layer sequence can be at least one light-emitting or light
• detecting active region such as a pn junction, a double heterostructure, a single quantum well structure
• SQW structure SQW structure
• MQW structure multiple quantum well structure
• electrical contact layers such as metal layers.
• the surface area to which the sealing material is applied in particular, for example, a
• Semiconductor device or an exposed pn junction of an LED, a laser diode or a photodiode include, which are particularly sensitive to environmental influences and
• the surface area is hermetically sealed and thereby sealed and
• Moisture and / or oxygen can not penetrate the encapsulation arrangement.
• Form semiconductor device that protects the semiconductor device from moisture and / or oxygen so that moisture and / or oxygen from the ambient atmosphere does not penetrate the surface area in the semiconductor device and the semiconductor device in its
• the sealing material may also provide protection by an effective barrier against others
• hermetically sealed sealing material applied by atomic layer deposition can be compared to other methods such as CVD, sputtering, or Vapor deposited layers at comparable thickness and materials have increased mechanical strength and thus, for example, increased protection against
• ALD atomic layer deposition
• the atomic layer deposition method enables
• Starting compound may be on the at least one
• Adsorb surface area In particular, it may be advantageous if the molecules of the first
• the starting compound may be a second of the at least two
• Starting compound can react with the first starting compound adsorbed on the surface region, whereby a submonolayer or at most a monolayer of the
• Sealant can be formed. Thereafter, in turn, the first output connection is supplied, which is on the submonolayer or monolayer formed and
• the reaction chamber can be flushed with a cleaning gas, in particular an inert gas such as argon, so that before each inlet of a starting compound advantageously no previous starting compound in the
• An essential feature of the atomic layer deposition is thus the self-limiting nature of the partial reaction, which means that the starting compound of a partial reaction does not react with itself or ligands of itself, which is the
• Output connections can be a cycle between some
• each cycle can be generated about 0.1 to about 3 ⁇ ngström thick layer of the sealing material.
• the sealing material can by means of
• Atomic layer deposition having a thickness of greater than or equal to 1 nanometer, preferably greater than or equal to 5 nanometers and particularly preferably greater than or equal to 10 nanometers and less than or equal to 500 nm are applied.
• the sealing material may have a thickness of less than or equal to 200 nanometers, preferably less than or equal to 100 nanometers, and particularly preferably less than or equal to 50 nanometers. That may mean that
• Sealant material forms a layer of greater than or equal to 1 monolayer, preferably greater than or equal to 10 monolayers and less than or equal to 5,000 monolayers. Due to the high density and layer quality with which the sealing material is applied, such a thickness may be sufficient to provide effective protection against moisture and / or moisture
• the sealing material applied as described above and covering the at least one surface area has the advantage that the layer thickness of the sealing layer produced in this way depends only on the number of reaction cycles, which ensures precise and simple control of the sealing layer
• Reaction chamber be fed, so that the
• the sealing material can be produced without defects on the at least one surface area in comparison with layers produced by other methods, such as sputtering, vapor deposition or CVD. This means, for example, that there are no so-called pin holes or microchannels in the sealing material through which
• Moisture and / or oxygen and / or other atomic or molecular materials can migrate through the sealing material to at least one surface area.
• the sealing material is preferably electrically insulating and optically transparent and may be, for example, an oxide, nitride or oxynitride, for example with one or more selected from aluminum, silicon, titanium, zirconium, tantalum and hafnium. In particular, that can
• Sealant material one or more of the following
• Materials include: A1 2 0 3 , Si0 2 , Si 3 N 4 , Ti0 2 , Zr0 2 , Ta 2 0 5 , Hf0 2 , Y 2 0 3rd As starting compounds own
• organometallic compounds or hydrides of said materials for example, organometallic compounds or hydrides of said materials and, for example, ammonia, nitrous oxide or water as the starting compound for oxygen
• the at least one surface region covered by the sealing material comprises one or more top, bottom and / or side surfaces of the semiconductor device.
• the semiconductor component can have at least one electrical contact layer which is suitable for electrically connecting the semiconductor component.
• the electrical contact layer may comprise or be, for example, one or more metal layers.
• the at least one surface area can all be exposed
• Sealant thereby cover all exposed surfaces of the semiconductor device to the contact layer or to a portion of the contact layer entirely. This can be a seal and encapsulation of the
• exposed surfaces of the semiconductor device can be achieved, wherein the electrical contact layer after the Applying the sealing material still electrically
• Contact with the environment in the form may have, for example, that atomic or molecular substances from the
• a surface or a surface area covered by a non-hermetically sealed layer such as an oxygen and / or water-permeable plastic layer, may also be disclosed herein as being exposed.
• a surface or a surface area is not exposed in the sense used here when the optoelectronic component has a carrier and the surface or the surface area serves for mounting the semiconductor component on a carrier and is thus designed as a mounting surface.
• the semiconductor device with a
• the carrier may include or may be a heat sink, a circuit board, a leadframe, a package body, or a combination thereof.
• the semiconductor device may be mechanically mounted by means of the mounting surface on the carrier, for example by means of soldering, anodic bonding or gluing.
• the semiconductor device via the mounting surface may also be electrically connected to the carrier, wherein the mounting surface then additionally as electrical
• Contact layer may be formed. In a semiconductor device mounted on a carrier
• the sealing material all exposed surfaces of the semiconductor device, in particular all surfaces except the mounting surface, so that the sealing material all
• the semiconductor component is enclosed on all sides except for the mounting surface of the sealing material, so that an effective encapsulation of the
• the semiconductor component can additionally be connected to the carrier via an electrical contact element.
• the semiconductor device on one of the semiconductor component can additionally be connected to the carrier via an electrical contact element.
• Contact element may be, for example, a bonding wire or a metal layer.
• the electrical contact element can further with particular advantage together with the
• sealing material may cover at least a portion of a surface of the carrier.
• the sealing material may be contiguous from the
• the sealing material can also cover the mounting area between the semiconductor device and the carrier.
• the carrier can have an electrical connection region with which the optoelectronic component
• control circuit For example, to a control circuit or a
• the housing material may, for example, a plastic and in particular a
• the sealing material seals the at least one surface area of the
• Hermetically sealed semiconductor device it is advantageously possible that the housing material itself is not hermetically sealed and solely for other aspects such as optical properties and / or mechanical
• the carrier may be at least partially formed with the housing material.
• the optoelectronic component can have a plurality of inorganic optoelectronically active ones
• the sealing material may in each case be disposed on at least one surface region of each of the plurality of semiconductor components and / or the electronic component
• the plurality of semiconductor components and / or the further electronic components on the carrier can be covered with a coherent, closed layer of the sealing material and thus encapsulated.
• the sealing material can be covered with a coherent, closed layer of the sealing material and thus encapsulated.
• the semiconductor component can furthermore have at least one micro-opening in the at least one surface area.
• a micro-opening may be formed, for example, by a so-called pin-hole, a microchannel, a pore or an offset, such as a screw dislocation, in the crystal structure adjacent to the surface area.
• Such micro-openings or narrow holes may be due to various causes in the production of the
• Semiconductor device arise and are therefore technically often unavoidable, such as by non-perfect lattice matching between epitaxially deposited layers and a
• microchannels for example, be crossed by microchannels.
• micro-openings in the semiconductor device contribute
• Micro-openings can seal these and thus atomic or molecular migration within the micro-openings
• Recesses is possible, especially in channels or pores, which have a ratio of opening size to depth of up to 1: 100 and in which even at the lowest point of the channel or pore, a layer with a thickness comparable to that at the surface in the opening
• the surface area with the at least one micro-opening may be part of a surface of a substrate or an epitaxially grown layer.
• the semiconductor layer sequence can be a
• the surface area with the at least one micro-opening can be part of a surface of the
• Passivation layers often have a high porosity and often also microchannels, which is the case, for example, with the coating method used to apply the
• Passivation layer itself may be, for example, if the average free path of the particles to be coated in the coating process is too low to produce a perfect packing density.
• residual gases such as For example, oxygen in the coating chamber may lead to the deposition of porous structures in the passivation layer. Holes or micro-openings in a passivation layer on side surfaces and / or on a light outcoupling surface or a laser facet of the semiconductor component may harbor a high risk of failure due to the risk of migration of metal, since the associated field overshoot can lead to destruction of the semiconductor component during operation.
• by such cavities formed by the micro-openings moisture, oxygen and other harmful gases to the surface of the
• Get semiconductor device and, for example, to a degradation of the device voltage or the optical
• the sealing material on the passivation layer can avoid such risks.
• a growth protection layer can be used, for example, for
• the production of narrow laser bars with optimal depth can be achieved in that the
• epitaxial growth is carried out only to a defined layer and after applying a structured growth protective layer with a suitable for the web
• Opening is further grown within the opening. If the growth protection layer has micro-openings, these can lead to uncontrolled crystal growth, in the case of what are known as parasitic crystals, which can result in poor formability, leakage currents and component failure. Due to the sealing material on the Growth protection layer can be avoided such a risk.
• the surface area may continue to be at least partially shaded. That may mean that
• Surface area is geometrically shaped such that it is at least partially not directly accessible for directional application methods commonly used in the art, such as vapor deposition or sputtering. Therefore, in such methods geometrically shadowed areas either not coated or much thinner.
• the surface area may for example be part of a
• Extension level of the surface has, about one
• Mushroom structure or a wedge structure standing on top Furthermore, a shaded area also by
• Cavities or columns may be formed. Through the top
• the sealing material can be applied homogeneously and with uniform thickness on such shaded surface areas, as with this method, regardless of the geometry of the surface area of the structures to be coated or to be coated
• Sealant is possible, especially in narrow columns and cavities. These advantages may arise in the application of the sealing material in the chip process, in the wafer assembly of fully processed semiconductor devices, in isolated semiconductor devices and mounted semiconductor devices.
• a semiconductor wafer can be provided, on which a semiconductor layer sequence is epitaxially deposited with the active region.
• Semiconductor layer sequence can also be provided with electrical contact layers. Furthermore, the electrical contact layers can also be provided with electrical contact layers. Furthermore, the electrical contact layers are also be provided with electrical contact layers. Furthermore, the electrical contact layers are also be provided with electrical contact layers. Furthermore, the electrical contact layers are also be provided with electrical contact layers. Furthermore, the electrical contact layers are also be provided with electrical contact layers. Furthermore, the electrical contact layers are also be provided with electrical contact layers.
• Semiconductor layer sequence are patterned by etching in individual areas, which after separating and detaching from the semiconductor layer composite thus formed the
• Semiconductor devices is also referred to as wafer composite.
• the semiconductor layer composite is first separated into individual semiconductor components, on which then the sealing material by means of
• Atomic layer deposition is applied.
• the semiconductor layer composite may be, for example, a previously described wafer composite. After the growth of the semiconductor layer sequence and / or after an etching step, surface regions in the wafer composite can be formed
• Sealing material can be protected and sealed. Before separating the wafer composite, it is thus possible to produce already sensitive surfaces and surface areas of optoelectronically active semiconductor components, such as
• LEDs, laser diodes or photodiodes are protected by the application of the sealing material. After application of the sealing material can be so already sealed on the critical surfaces
• Semiconductor devices are obtained by the separation, for example by sawing, by breaking or by etching.
• the wafer composite can be applied to a carrier composite prior to singulation, for example
• Heat sinks for the later semiconductor devices or other, previously mentioned carrier comprises. After that, in the
• Form semiconductor devices can be measured and tested targeted. Thereafter, the entire system can be separated, thereby already mounted on carriers
• Semiconductor devices can be obtained with applied sealing material.
• a so-called batch process as part of the production of a
• Optoelectronic component it is possible to produce a variety of optoelectronic components particularly cost, since the handling of the individual
• the semiconductor layer composite may also be, for example, a so-called bar composite of
• Laser diodes act. In this case, one in the wafer composite
• dry-etched laser facets it may also be possible to coat the laser facets already in the wafer composite with the sealing material as described above.
• the carrier may comprise or be a heat sink, a housing component, a lead frame or a combination thereof. It may be particularly advantageous if the semiconductor component is also electrically connected to the carrier, for example by means of an electrical contact layer forming the mounting surface and / or by means of an electrical contact element, for example a metal layer or a bonding wire, as above
• all exposed surfaces of the semiconductor component may be covered with the sealing material together with at least part of the surface of the carrier and, if appropriate, the electrical contact element, in order to form an effective encapsulation and
• Sealing step all critical interfaces and surfaces of the semiconductor device, for example a facet, Side edges and / or exposed chip surfaces,
• Sealant must be re-exposed as by etching, since the electrical contact has already been made.
• the inorganic optoelectronic active semiconductor devices described here can by means of
• Atomic layer deposition applied sealing material to be made resistant to environmental influences and so
• Embodiments of the optoelectronic component and the method for producing the optoelectronic component may be possible to dispense due to the deposited by atomic layer deposition sealing material commonly used in the art, filled with protective gas housing and thus on the one hand a significant
• Protective gas capping allow a high degree of flexibility based on the particular application.
• optoelectronic components with extremely compact, flat design can be made possible, which may be suitable, for example, in mobile telephones as projection lasers or for
• Figures 1A to 1D is a schematic representation of a
• FIGS. 2A to 3 are schematic representations of
• FIGS. 4 to 5B are schematic representations of
• FIGS 6 to 8 are schematic representations of
• FIG. 9 to 13 are schematic representations of
• FIGS. 1A to 1D show, according to one exemplary embodiment, a method for producing an optoelectronic
• Device 100 with a semiconductor device 10 shown.
• a so-called semiconductor layer composite 90 is provided in the form of a so-called wafer composite.
• Semiconductor layer composite 90 has a semiconductor wafer 91 on which a semiconductor layer sequence 2 having an active region 3 is deposited. On the
• Semiconductor layer sequence 2 is an electrical
• Contact layer 4 made of a metal, a metal
• the electrical contact layer 4 is in
• LEDs light emitting diodes
• Semiconductor layer composite 90 for example, a
• VCSELs laser diodes
• laser diode arrays photodiodes or solar cells.
• the semiconductor layer sequence 10 has in the shown
• a III-V compound semiconductor material has at least one element of the third main group such as B, Al, Ga, In, and a fifth main group element such as
• Term III-V compound semiconductor material is the group of binary, ternary or quaternary compounds which
• an II-VI compound semiconductor material has at least one element of the second main group, such as Be, Mg, Ca, Sr, and a member of the sixth main group, such as
• an II-VI compound semiconductor material comprises a binary, ternary or A quaternary compound comprising at least one element from the second main group and at least one element from the sixth main group.
• a binary, ternary or quaternary compound may also contain, for example, one or more dopants and additional constituents
• the II-VI compound semiconductor materials include: ZnO, ZnMgO, CdS, ZnCdS, MgBeO.
• the semiconductor wafer 91 comprises, for example, sapphire or a semiconductor material, for example, one mentioned above
• the semiconductor wafer 91 may include or be GaAs, GaP, GaN or InP, or alternatively Sic, Si or Ge.
• Semiconductor wafer 91 may also be a carrier substrate instead of a growth substrate for the semiconductor layer sequence 2, to which the semiconductor layer sequence 2 grown on a previously provided growth substrate has been transferred.
• Such method steps are known for example in the context of the production of so-called thin-film semiconductor devices and are not further elaborated here.
• the semiconductor layer sequence 2 can, for example, a conventional pn junction, as active region 3
• the semiconductor layer sequence 2 may comprise, in addition to the active region 3, further functional layers and functional regions, for example p-doped or n-doped ones
• Charge carrier transport layers undoped or p- or n- doped confinement, cladding or waveguide layers, barrier layers, planarization layers, buffer layers, protective layers and / or electrodes and combinations thereof.
• Such structures relating to the active region 3 or the further functional layers and regions are known to the person skilled in the art, in particular with regard to structure, function and structure, and are therefore not explained in greater detail here.
• the semiconductor layer composite 90 has trenches 92 which subdivide the semiconductor layer sequence 2 into individual regions which form the semiconductor components 10 after singulation along the indicated separation lines.
• a structured executed mask 5 is applied, which serves the structuring of a subsequently applied sealing material 6.
• the mask 5 comprises, for example, a metal, a dielectric, a photoresist or a combination thereof.
• the semiconductor layer sequence 2 has surface regions 7 which form the upper side of the semiconductor layer sequence 2
• Side surfaces of the semiconductor layer sequence 2 include.
• a sealing material 6 applied.
• Silicon oxide or silicon nitride or another material mentioned in the general part is Silicon oxide or silicon nitride or another material mentioned in the general part.
• Sealing material 6 is applied with a thickness of less than or equal to 500 nm and preferably with a thickness of between 10 nm and 100 nm.
• Semiconductor device 10 is executed, it can by
• the semiconductor layer composite 90 in the trenches 92 is separated along the parting lines 93 by means of sawing, breaking, scribing and / or etching in semiconductor devices 10, one of which is shown in FIG.
• the mask 5 can be contacted.
• the mask 5 can also be removed before the separation.
• Optoelectronic component 100 according to FIG. 1D thus has a semiconductor component 10 with an active region 3, which is suitable for emitting light during operation.
• At least one surface area 7 is a
• Semiconductor layer composite 90 instead of a Waferverbunds also form a bar composite of laser diodes, in which
• FIGS. 2A to 2C show an exemplary embodiment of method steps for a method for producing an optoelectronic component 200, in which the singulation of the semiconductor layer composite 90 into semiconductor components 10 is performed after the method step shown in FIG. 1A.
• the mask 5 can also be applied only on the isolated semiconductor component 10.
• a sealing material 6 is deposited on all surface regions 7 of the semiconductor component 10 by means of atomic layer deposition.
• the mask is removed by means of the lift-off technique described above and the electrical contact layer is exposed in the contact opening 8 (FIG. 2C).
• the optoelectronic component 200 produced in this way has a semiconductor component 10 in which the with the
• the semiconductor device 10 is thus hermetically sealed on all sides and protected against scratching and harmful environmental influences and on in the
• Contact opening 8 exposed electrical contact layer electrically contactable.
• the sealing material 6 may have further contact openings for exposing further electrical contact layers, but this is not shown for the sake of clarity.
• FIG. 3 shows a method step for a
• Semiconductor devices 10 includes. Of the
• Semiconductor layer composite 90 and the carrier assembly 94 are connected to each other, for example by means of soldering, gluing or anodic bonding and mounted on each other.
• one or more already isolated semiconductor components 10 may also be mounted on a carrier or a carrier assembly.
• the semiconductor layer composite 90 with the carrier assembly 94 or one or more semiconductor devices 10 on a carrier or carrier composite can then be as in the previous
• Embodiments further processed.
• Figure 4 is an embodiment of a
• Semiconductor device 10 by means of a mounting surface 9 on a support 11, for example, a heat sink, a
• Lead frame and / or a printed circuit board is mounted. Covered with the sealing material 6 surface area 7 comprises all but the contact opening 8 exposed
• sealing material 6 can also be applied to all exposed surface regions 7, including the electrical
• FIGS. 5A and 5B show further exemplary embodiments of optoelectronic components 400, 500 in which at least one surface region 7 is used
• Sealing material 6 covered surface areas 7, which are shaded. That means the
• Surface areas 7 by means of directed application methods such as vapor deposition or sputtering are not or at least not evenly covered with the sealing material 6.
• the shaded regions of the surface regions 7 are formed according to the embodiments shown by geometric shapes in the form of a reverse wedge structure (Figure 5A) and in the form of mushroom-like structures (Figure 5B) of the semiconductor devices 10 and their semiconductor layer sequences 2.
• the geometric shapes shown are purely exemplary.
• semiconductor devices 10 can be used, the very is arranged close to each other on a support and / or have, for example, narrow channels and / or openings and / or tapered towards the mounting surface structures.
• Screw dislocations may be present.
• Semiconductor layer sequence 10 due to non-perfect lattice matching between the semiconductor layer sequence 2 and the substrate 1 and / or between different layers of the semiconductor layer sequence 2 form.
• the substrate 1 may also have micro-openings 12 due to the production.
• the optoelectronic components of the embodiments shown above and below can have such micro-openings.
• micro-openings 12 may be dopants and / or metal and / or moisture and / or oxygen
• the sealing of the micro-openings 12 can take place, for example, in that the Semiconductor layer sequence 2 is sealed immediately after the epitaxial growth by means of the sealing material 6 or in a later process step according to the previous embodiments.
• the semiconductor device 10 may have on one surface a passivation layer 13 applied, for example, by a conventional deposition method such as sputtering, vapor deposition or CVD.
• a passivation layer 13 may have micro-openings 12, such as micro-channels and / or so-called pin-holes, due to increased porosity and / or imperfection
• Atomic layer deposition can be sealed.
• Semiconductor device 10 '' ' which has a known to those skilled web waveguide structure.
• Steg waveguide structure is produced by epitaxial overgrowth insj ⁇ tierender shape by applying to a part of the semiconductor layer sequence 2, a growth protection layer 14 having an opening in the region in which the ridge waveguide structure is to be formed.
• Micro-openings 12 on the surface area 7 grow 12 parasitic crystals in the area of the micro-openings, which have poor formability, leakage currents and / or even may result in a component failure.
• FIG. 9 shows an optoelectronic component 600 with a semiconductor component 10 according to another
• the optoelectronic component 600 has a carrier 11 which serves as a heat sink for a device mounted thereon
• Semiconductor device 10 is formed and the electrical connection layers 15, 16 for electrically contacting the semiconductor device 10 has.
• the semiconductor device 10 is provided with a mounting surface 9 on the electrical
• Terminal layer 15 is mounted, wherein the mounting surface 9 is also an electrical contact layer (not shown) for
• the semiconductor device 10 On the opposite side of the mounting surface, the semiconductor device 10 by means of an electrically conductive layer formed as electrical
• an electrical insulation layer 18 is arranged in regions between the electrical contact element 21 and the semiconductor component 10 in order to connect the electrical contact element 21, for example, to the
• the semiconductor device 10 is mounted on surface regions 7 comprising all exposed surfaces of the semiconductor device 10 and the electrical contact member 21 with the deposited by atomic layer deposition Sealing material 6 covered and hermetically sealed
• layer-shaped electrical contact element 21 since the typically used electrical connections between a semiconductor chip and the electrical leads in the form of bonding wires in the omission of a known housing would contribute significantly to the height. Compared to an electric contact element 21 designed as a bonding wire, the risk of damage to the optoelectronic component 600 continues to occur, for example
• FIG. 10 shows an optoelectronic component 700 with a semiconductor component 10 according to another
• the optoelectronic component 700 has a transparent housing material 20, which is the
• the housing material 20 comprises a plastic which is not hermetic.
• Embodiment very complex because all interfaces with the environment must meet the highest requirements in terms of tightness, which can only be realized with relatively complex procedures and materials.
• the housing itself could in many cases be made much easier, in particular to other requirements such as
• FIG. 11 shows an optoelectronic component 800 according to a further exemplary embodiment, which is designed as a Heat sink, lead frame, board or use trained carrier 11 has a plurality of semiconductor devices 10.
• the semiconductor devices 10 are formed in the embodiment shown as LEDs, so that the
• optoelectronic component 800 is a light-emitting
• the semiconductor devices 10 are coextensively covered with the sealing material 6 together with the carrier 11 on each exposed surface, as indicated schematically in FIG.
• the atomic layer deposition allows the application of a cost-effective, large-area, optically transparent and hermetically sealed seal or
• Encapsulation may also be narrow
• the sealing material 6 may advantageously have an optically transparent material which does not influence the optical functionality of the semiconductor components 10.
• the semiconductor devices 10 may also be at least partially or all configured as laser diodes and / or photodiodes. Furthermore, it is also possible that the application of the sealing material by means of
• FIG. 12 shows an optoelectronic component 900 according to a further exemplary embodiment, which is mounted on a carrier 11, which serves as an electrical connection plate and
• Semiconductor devices 10 which are arranged on different surfaces of the carrier 11.
• Exemplary embodiment formed purely by way of example as a red and as a green laser diode. For the sake of clarity, electrical contact layers and connection layers are not shown.
• the semiconductor devices 10 and the carrier 11 are contiguous with the except for an electrical connection region 22 on all exposed surfaces
• Sealing material 6 covered, as indicated schematically in Figure 12. This is a common and simultaneous encapsulation of differently executed
• Semiconductor devices 10 also, for example, as LEDs or as a combination of a photodiode and a light
• Transmitter-receiver combination be executed.
• the semiconductor devices 10 may be implemented in a receiver-receiver combination as two photodiodes. Furthermore, more than the two shown
• Components are arranged on the carrier 11 on one or both sides and encapsulated together with the sealing material 6.
• Semiconductor devices 10 can be densely packed geometrically and encapsulated together without further space requirements.
• FIG. 13 shows an optoelectronic component 1000 according to a further exemplary embodiment, which is referred to as
• the optoelectronic component 1000 has a plurality of semiconductor components 10, which are formed as solar cells and which are arranged together on a carrier 11 and electrically together
• the semiconductor devices 10 are interconnected.
• the semiconductor devices 10 are hermetically sealed together with the sealing material 6 and thus protected from scratching and environmental influences such as hail, dust, moisture and oxygen.
• the sealing material 6 applied over the large area and coherently over the semiconductor components 10 designed as solar cells provides effective protection against environmental influences in the form of a transparent weatherproof encapsulation and, for example, also prevents electrical contact layers or connecting layers from corroding by moisture.

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• Engineering & Computer Science (AREA)
• Microelectronics & Electronic Packaging (AREA)
• Computer Hardware Design (AREA)
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• Led Device Packages (AREA)
• Led Devices (AREA)
• Photovoltaic Devices (AREA)
• Chemical Vapour Deposition (AREA)
• Formation Of Insulating Films (AREA)
• Light Receiving Elements (AREA)

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• 2009
  • 2009-12-18 DE DE102009058796A patent/DE102009058796A1/de not_active Withdrawn
• 2010
  • 2010-11-30 KR KR1020127018892A patent/KR20120114311A/ko not_active Ceased
  • 2010-11-30 WO PCT/EP2010/068548 patent/WO2011073027A1/de not_active Ceased
  • 2010-11-30 JP JP2012543585A patent/JP5710638B2/ja not_active Expired - Fee Related
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  • 2010-11-30 EP EP10781917A patent/EP2513984A1/de not_active Withdrawn
  • 2010-11-30 CN CN201080057782.2A patent/CN102668140B/zh not_active Expired - Fee Related
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