DE69930839D1 - Herstellungsmethode für eine elekttronische anordnung mit organischen schichten - Google Patents

Herstellungsmethode für eine elekttronische anordnung mit organischen schichten

Info

Publication number
DE69930839D1
DE69930839D1 DE69930839T DE69930839T DE69930839D1 DE 69930839 D1 DE69930839 D1 DE 69930839D1 DE 69930839 T DE69930839 T DE 69930839T DE 69930839 T DE69930839 T DE 69930839T DE 69930839 D1 DE69930839 D1 DE 69930839D1
Authority
DE
Germany
Prior art keywords
layer
inorganic material
openings
organic
resist
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69930839T
Other languages
English (en)
Other versions
DE69930839T2 (de
Inventor
M Meijer
S Manders
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP BV
Original Assignee
Koninklijke Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV filed Critical Koninklijke Philips Electronics NV
Application granted granted Critical
Publication of DE69930839D1 publication Critical patent/DE69930839D1/de
Publication of DE69930839T2 publication Critical patent/DE69930839T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/32—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76832—Multiple layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02118—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/022—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/312—Organic layers, e.g. photoresist
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/312—Organic layers, e.g. photoresist
    • H01L21/3121—Layers comprising organo-silicon compounds
    • H01L21/3122—Layers comprising organo-silicon compounds layers comprising polysiloxane compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
    • H01L21/7681—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures involving one or more buried masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31127—Etching organic layers
    • H01L21/31133—Etching organic layers by chemical means
    • H01L21/31138—Etching organic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H01L21/318—Inorganic layers composed of nitrides
    • H01L21/3185—Inorganic layers composed of nitrides of siliconnitrides

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)
  • Light Receiving Elements (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Manufacturing Cores, Coils, And Magnets (AREA)
  • Drying Of Semiconductors (AREA)
  • Electroluminescent Light Sources (AREA)
DE69930839T 1998-11-18 1999-11-02 Herstellungsmethode für eine elekttronische anordnung mit organischen schichten Expired - Lifetime DE69930839T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
EP98203879 1998-11-18
EP98203879 1998-11-18
PCT/EP1999/008341 WO2000031775A2 (en) 1998-11-18 1999-11-02 A method of manufacturing an electronic device comprising two layers of organic-containing material

Publications (2)

Publication Number Publication Date
DE69930839D1 true DE69930839D1 (de) 2006-05-24
DE69930839T2 DE69930839T2 (de) 2007-04-12

Family

ID=8234345

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69930839T Expired - Lifetime DE69930839T2 (de) 1998-11-18 1999-11-02 Herstellungsmethode für eine elekttronische anordnung mit organischen schichten

Country Status (7)

Country Link
US (1) US6309801B1 (de)
EP (1) EP1064674B1 (de)
JP (1) JP2002530881A (de)
KR (1) KR100634904B1 (de)
AT (1) ATE323327T1 (de)
DE (1) DE69930839T2 (de)
WO (1) WO2000031775A2 (de)

Families Citing this family (35)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW417249B (en) * 1997-05-14 2001-01-01 Applied Materials Inc Reliability barrier integration for cu application
US6818437B1 (en) * 1998-05-16 2004-11-16 Applera Corporation Instrument for monitoring polymerase chain reaction of DNA
KR20020010728A (ko) * 1999-06-28 2002-02-04 리차드 로브그렌 탄소-도프된 유기 규산염 유리를 에칭하기 위한 방법 및장치
US6562715B1 (en) 2000-08-09 2003-05-13 Applied Materials, Inc. Barrier layer structure for copper metallization and method of forming the structure
JP2003077920A (ja) * 2001-09-04 2003-03-14 Nec Corp 金属配線の形成方法
US6890851B2 (en) * 2003-05-29 2005-05-10 United Microelectronics Corp. Interconnection structure and fabrication method thereof
JP2006261058A (ja) * 2005-03-18 2006-09-28 Sony Corp 有機ｅｌ素子、表示装置、有機ｅｌ素子の製造方法
KR20110126594A (ko) 2009-02-10 2011-11-23 파나소닉 주식회사 발광 소자, 발광 소자를 구비한 발광 장치 및 발광 소자의 제조 방법
JP5513414B2 (ja) 2009-02-10 2014-06-04 パナソニック株式会社 発光素子、表示装置、および発光素子の製造方法
KR101623227B1 (ko) 2009-02-10 2016-05-20 가부시키가이샤 제이올레드 발광 소자의 제조 방법과 발광 소자 및 발광 장치의 제조 방법과 발광 장치
JP5437736B2 (ja) 2009-08-19 2014-03-12 パナソニック株式会社 有機ｅｌ素子
WO2011161727A1 (ja) 2010-06-24 2011-12-29 パナソニック株式会社 有機ｅｌ素子の製造方法、表示装置、発光装置および紫外光照射装置
CN102473847B (zh) 2010-06-24 2015-01-14 松下电器产业株式会社 有机el元件、显示装置以及发光装置
WO2012004823A1 (ja) * 2010-07-05 2012-01-12 パナソニック株式会社 有機ｅｌ表示パネルとその製造方法
JP5624141B2 (ja) 2010-07-30 2014-11-12 パナソニック株式会社 有機ｅｌ素子
WO2012017492A1 (ja) 2010-08-06 2012-02-09 パナソニック株式会社 発光素子とその製造方法、および発光装置
JP5612691B2 (ja) 2010-08-06 2014-10-22 パナソニック株式会社 有機ｅｌ素子およびその製造方法
WO2012017489A1 (ja) 2010-08-06 2012-02-09 パナソニック株式会社 有機ｅｌ素子、表示装置および発光装置
JP5620494B2 (ja) 2010-08-06 2014-11-05 パナソニック株式会社 発光素子、表示装置、および発光素子の製造方法
WO2012017496A1 (ja) 2010-08-06 2012-02-09 パナソニック株式会社 発光素子、発光素子を備えた発光装置および発光素子の製造方法
CN103053042B (zh) 2010-08-06 2016-02-24 株式会社日本有机雷特显示器 有机el元件及其制造方法
JP5677431B2 (ja) 2010-08-06 2015-02-25 パナソニック株式会社 有機ｅｌ素子、表示装置および発光装置
JP5677436B2 (ja) 2010-08-06 2015-02-25 パナソニック株式会社 有機ｅｌ素子
WO2012017501A1 (ja) 2010-08-06 2012-02-09 パナソニック株式会社 有機ｅｌ素子およびその製造方法
WO2012017486A1 (ja) 2010-08-06 2012-02-09 パナソニック株式会社 発光素子の製造方法
JP5677433B2 (ja) 2010-08-06 2015-02-25 パナソニック株式会社 有機ｅｌ素子、表示装置および発光装置
JP5574456B2 (ja) 2010-08-06 2014-08-20 パナソニック株式会社 発光素子とその製造方法、および発光装置
WO2012017491A1 (ja) 2010-08-06 2012-02-09 パナソニック株式会社 発光素子、発光素子を備えた発光装置および発光素子の製造方法
JP5677434B2 (ja) 2010-08-06 2015-02-25 パナソニック株式会社 有機ｅｌ素子
JP5677437B2 (ja) 2010-08-06 2015-02-25 パナソニック株式会社 有機ｅｌ素子
US8884281B2 (en) 2011-01-21 2014-11-11 Panasonic Corporation Organic EL element
US8829510B2 (en) 2011-02-23 2014-09-09 Panasonic Corporation Organic electroluminescence display panel and organic electroluminescence display device
WO2012114403A1 (ja) 2011-02-25 2012-08-30 パナソニック株式会社 有機ｅｌ表示パネルおよび有機ｅｌ表示装置
WO2012153445A1 (ja) 2011-05-11 2012-11-15 パナソニック株式会社 有機ｅｌ表示パネルおよび有機ｅｌ表示装置
JP6284369B2 (ja) * 2014-01-07 2018-02-28 ルネサスエレクトロニクス株式会社 半導体集積回路装置の製造方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US680085A (en) * 1901-01-17 1901-08-06 Luther B Thomas Computing spring-scale.
US5329152A (en) * 1986-11-26 1994-07-12 Quick Technologies Ltd. Ablative etch resistant coating for laser personalization of integrated circuits
US4836885A (en) * 1988-05-03 1989-06-06 International Business Machines Corporation Planarization process for wide trench isolation
US5625637A (en) * 1991-03-28 1997-04-29 Seiko Epson Corporation Surface emitting semiconductor laser and its manufacturing process
JPH08139194A (ja) 1994-04-28 1996-05-31 Texas Instr Inc <Ti> 半導体デバイス上に電気接続を作製する方法および該方法により作製された電気接続を有する半導体デバイス
FR2736654B1 (fr) * 1995-07-13 1997-08-22 Commissariat Energie Atomique Procede de fabrication d'elements de microstructures flottants rigides et dispositif equipe de tels elements
TW409194B (en) * 1995-11-28 2000-10-21 Sharp Kk Active matrix substrate and liquid crystal display apparatus and method for producing the same
JP3390329B2 (ja) * 1997-06-27 2003-03-24 日本電気株式会社 半導体装置およびその製造方法
FR2777697B1 (fr) * 1998-04-16 2000-06-09 St Microelectronics Sa Circuit integre avec couche d'arret et procede de fabrication associe

Also Published As

Publication number Publication date
KR100634904B1 (ko) 2006-10-17
WO2000031775A2 (en) 2000-06-02
DE69930839T2 (de) 2007-04-12
ATE323327T1 (de) 2006-04-15
KR20010034203A (ko) 2001-04-25
US6309801B1 (en) 2001-10-30
EP1064674A2 (de) 2001-01-03
EP1064674B1 (de) 2006-04-12
WO2000031775A3 (en) 2000-10-26
JP2002530881A (ja) 2002-09-17

Similar Documents

Publication Publication Date Title
DE69930839D1 (de) Herstellungsmethode für eine elekttronische anordnung mit organischen schichten
TW200509740A (en) Process for removing an organic layer during fabrication of an organic electronic device and the organic electronic device formed by the process
TW200501216A (en) Organic semiconductor device and method of manufacture of same
TW200618174A (en) Method of manufacturing semiconductor device
KR950034492A (ko) 직접 웨이퍼 본딩 구조물 및 그 제조방법
TW429419B (en) Method of manufacturing semiconductor devices
WO2007068714A3 (en) Method of making a contact in a semiconductor device
TW200501262A (en) Method of fabricating gate structures having a high-k gate dielectric layer
TW200515478A (en) Method for fabricating semiconductor device with fine patterns
WO1999040600A3 (en) Gate electrode structure for field emission devices and method of making
KR950010053A (ko) 메모리 셀의 비트 라인 비아 홀 제조방법
KR940022801A (ko) 반도체소자의 콘택 형성방법
KR950012542B1 (ko) 감광막의 이중 선택 노광에 의한 콘택홀 형성 방법
TW202420934A (zh) 半導體結構及其製造方法
KR940004750A (ko) 스핀 온 클래스(sog)막을 이용한 콘택 제조방법
TW200515851A (en) Patterned circuit layer of semiconductor package substrate and method for fabricating the same
KR100357174B1 (ko) 반도체소자의 캐패시터 제조방법
KR950034602A (ko) 반도체장치의 다층배선 형성방법
EP1577941A3 (de) Verfahren zur Erzeugung einer Struktur in einem Material und auf diese Weise hergestellte Halbleiterstruktur
JPH0567611A (ja) 半導体装置及びその製造方法
TW430924B (en) Method for forming contact hole in semiconductor device
KR950014970A (ko) 반도체 소자의 층간 절연막 평탄화 방법
KR960026240A (ko) 반도체 소자의 금속 배선 방법
KR970054506A (ko) 레이저를 이용한 완전 자기 정합형 박막 트랜지스터의 제조 방법
TW200518642A (en) Un-symmetric printed circuit board and method for fabricating the same

Legal Events

Date Code Title Description
8320 Willingness to grant licences declared (paragraph 23)
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Representative=s name: EISENFUEHR, SPEISER & PARTNER, 10178 BERLIN

8327 Change in the person/name/address of the patent owner

Owner name: NXP B.V., EINDHOVEN, NL