DE69422915T2 - Leseverstärker-organisation - Google Patents

Leseverstärker-organisation

Info

Publication number
DE69422915T2
DE69422915T2 DE69422915T DE69422915T DE69422915T2 DE 69422915 T2 DE69422915 T2 DE 69422915T2 DE 69422915 T DE69422915 T DE 69422915T DE 69422915 T DE69422915 T DE 69422915T DE 69422915 T2 DE69422915 T2 DE 69422915T2
Authority
DE
Germany
Prior art keywords
node
transistor
current
sense
transistors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69422915T
Other languages
German (de)
English (en)
Other versions
DE69422915D1 (de
Inventor
Emil Lambrache
George Smarandoiu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Atmel Corp
Original Assignee
Atmel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Atmel Corp filed Critical Atmel Corp
Publication of DE69422915D1 publication Critical patent/DE69422915D1/de
Application granted granted Critical
Publication of DE69422915T2 publication Critical patent/DE69422915T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G11C7/062—Differential amplifiers of non-latching type, e.g. comparators, long-tailed pairs
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • G11C5/063—Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/14—Dummy cell management; Sense reference voltage generators

Landscapes

  • Read Only Memory (AREA)
  • Static Random-Access Memory (AREA)
  • Dram (AREA)
DE69422915T 1994-03-02 1994-11-18 Leseverstärker-organisation Expired - Lifetime DE69422915T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/204,866 US5390147A (en) 1994-03-02 1994-03-02 Core organization and sense amplifier having lubricating current, active clamping and buffered sense node for speed enhancement for non-volatile memory
PCT/US1994/013359 WO1995024040A1 (en) 1994-03-02 1994-11-18 Memory core organization

Publications (2)

Publication Number Publication Date
DE69422915D1 DE69422915D1 (de) 2000-03-09
DE69422915T2 true DE69422915T2 (de) 2000-10-05

Family

ID=22759783

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69422915T Expired - Lifetime DE69422915T2 (de) 1994-03-02 1994-11-18 Leseverstärker-organisation

Country Status (8)

Country Link
US (1) US5390147A (ja)
EP (1) EP0698271B1 (ja)
JP (1) JP3358814B2 (ja)
KR (1) KR100283599B1 (ja)
CN (1) CN1049515C (ja)
DE (1) DE69422915T2 (ja)
TW (1) TW265486B (ja)
WO (1) WO1995024040A1 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102016104987A1 (de) * 2016-03-17 2017-09-21 Infineon Technologies Ag Speicheranordnung und Verfahren zum Lesen einer Speicherzelle eines Speichers

Families Citing this family (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5559455A (en) * 1994-12-23 1996-09-24 Lucent Technologies Inc. Sense amplifier with overvoltage protection
FR2734390B1 (fr) * 1995-05-19 1997-06-13 Sgs Thomson Microelectronics Circuit de detection de courant pour la lecture d'une memoire en circuit integre
US5666043A (en) * 1995-06-07 1997-09-09 Analog Devices, Inc. Voltage detector with trigger based on output load currency
US5798967A (en) * 1997-02-22 1998-08-25 Programmable Microelectronics Corporation Sensing scheme for non-volatile memories
DE69834313D1 (de) * 1998-02-13 2006-06-01 St Microelectronics Srl Verbesserter Leseverstärker für nichtflüchtigen Speicher mit erweitertem Versorgungsspannungsbereich
JP2000090682A (ja) * 1998-09-10 2000-03-31 Toshiba Corp 半導体記憶装置
US6377084B2 (en) 1999-02-22 2002-04-23 Micron Technology, Inc. Pseudo-differential amplifiers
JP2000244322A (ja) * 1999-02-23 2000-09-08 Mitsubishi Electric Corp 半導体集積回路装置
US6307405B2 (en) 1999-04-27 2001-10-23 Micron Technology, Inc. Current sense amplifier and current comparator with hysteresis
US6288575B1 (en) * 1999-08-24 2001-09-11 Micron Technology, Inc. Pseudo-differential current sense amplifier with hysteresis
US6380787B1 (en) * 1999-08-31 2002-04-30 Micron Technology, Inc. Integrated circuit and method for minimizing clock skews
US6219279B1 (en) * 1999-10-29 2001-04-17 Zilog, Inc. Non-volatile memory program driver and read reference circuits
US6906557B1 (en) * 2000-06-30 2005-06-14 Intel Corporation Fuse sense circuit
TW523977B (en) 2001-09-26 2003-03-11 Macronix Int Co Ltd Circuit and method for stability and speed enhancement for a sense amplifier
US6903987B2 (en) 2002-08-01 2005-06-07 T-Ram, Inc. Single data line sensing scheme for TCCT-based memory cells
US7324394B1 (en) 2002-08-01 2008-01-29 T-Ram Semiconductor, Inc. Single data line sensing scheme for TCCT-based memory cells
US6775186B1 (en) * 2003-07-03 2004-08-10 Tower Semiconductor Ltd. Low voltage sensing circuit for non-volatile memory device
US6831866B1 (en) 2003-08-26 2004-12-14 International Business Machines Corporation Method and apparatus for read bitline clamping for gain cell DRAM devices
JP4683833B2 (ja) 2003-10-31 2011-05-18 株式会社半導体エネルギー研究所 機能回路及びその設計方法
KR100513403B1 (ko) * 2003-11-24 2005-09-09 삼성전자주식회사 센스 앰프를 구비한 비휘발성 반도체 메모리 장치
GB2432024B (en) * 2004-07-30 2008-05-07 Spansion Llc Semiconductor device and method for generating sense signal
US7542322B2 (en) * 2004-09-30 2009-06-02 Intel Corporation Buffered continuous multi-drop clock ring
US8045390B2 (en) * 2008-03-21 2011-10-25 Macronix International Co., Ltd. Memory system with dynamic reference cell and method of operating the same
JP5117950B2 (ja) * 2008-07-18 2013-01-16 ラピスセミコンダクタ株式会社 データ読出回路及び半導体記憶装置
CN102013267B (zh) * 2009-09-07 2013-07-31 上海宏力半导体制造有限公司 存储器和灵敏放大器
US8509026B2 (en) 2012-01-10 2013-08-13 Ememory Technology Inc. Word line boost circuit
US9070425B2 (en) 2013-10-31 2015-06-30 Micron Technology, Inc. Data line control for sense amplifiers
CN106601278B (zh) * 2016-12-19 2019-11-19 佛山中科芯蔚科技有限公司 一种灵敏放大器
CN111696607B (zh) 2019-03-13 2022-05-17 力旺电子股份有限公司 可编程可抹除的非易失性存储器

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59218696A (ja) * 1983-05-26 1984-12-08 Toshiba Corp 半導体メモリ
JPS61172300A (ja) * 1985-01-26 1986-08-02 Toshiba Corp 半導体記憶装置
IT1213343B (it) * 1986-09-12 1989-12-20 Sgs Microelettronica Spa Circuito di rilevamento dello stato di celle di matrice in memorie eprom in tecnologia mos.
EP0576046B1 (en) * 1988-06-24 1996-03-27 Kabushiki Kaisha Toshiba Semiconductor memory device
US5148397A (en) * 1989-03-16 1992-09-15 Oki Electric Industry Co. Ltd. Semiconductor memory with externally controlled dummy comparator
US5237534A (en) * 1989-04-27 1993-08-17 Kabushiki Kaisha Toshiba Data sense circuit for a semiconductor nonvolatile memory device
JPH0793032B2 (ja) * 1989-04-27 1995-10-09 日本電気株式会社 半導体記憶装置
US5293345A (en) * 1989-06-12 1994-03-08 Kabushiki Kaisha Toshiba Semiconductor memory device having a data detection circuit with two reference potentials
US5198997A (en) * 1989-08-11 1993-03-30 Sony Corporation Ultraviolet erasable nonvolatile memory with current mirror circuit type sense amplifier
JPH0752592B2 (ja) * 1989-08-18 1995-06-05 株式会社東芝 半導体記憶装置
JPH0793033B2 (ja) * 1989-08-24 1995-10-09 日本電気株式会社 センスアンプ
JPH03241594A (ja) * 1990-02-19 1991-10-28 Fujitsu Ltd 半導体メモリのセンス回路
IT1246241B (it) * 1990-02-23 1994-11-17 Sgs Thomson Microelectronics Circuito per la lettura dell'informazione contenuta in celle di memoria non volatili
JP2586723B2 (ja) * 1990-10-12 1997-03-05 日本電気株式会社 センスアンプ
EP0486743B1 (en) * 1990-11-19 1996-05-08 STMicroelectronics S.r.l. Improved sense circuit for storage devices such as non-volatile memories, with compensated offset current
DE69224125T2 (de) * 1991-09-26 1998-08-27 St Microelectronics Srl Leseverstärker

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102016104987A1 (de) * 2016-03-17 2017-09-21 Infineon Technologies Ag Speicheranordnung und Verfahren zum Lesen einer Speicherzelle eines Speichers
US10134452B2 (en) 2016-03-17 2018-11-20 Infineon Technologies Ag Memory arrangement and method for reading a memory cell of a memory
DE102016104987B4 (de) 2016-03-17 2024-05-23 Infineon Technologies Ag Speicheranordnung und Verfahren zum Lesen einer Speicherzelle eines Speichers

Also Published As

Publication number Publication date
JPH08510079A (ja) 1996-10-22
US5390147A (en) 1995-02-14
EP0698271A1 (en) 1996-02-28
EP0698271B1 (en) 2000-02-02
KR100283599B1 (ko) 2001-03-02
KR960702158A (ko) 1996-03-28
DE69422915D1 (de) 2000-03-09
EP0698271A4 (en) 1997-11-26
WO1995024040A1 (en) 1995-09-08
CN1143424A (zh) 1997-02-19
JP3358814B2 (ja) 2002-12-24
CN1049515C (zh) 2000-02-16
TW265486B (ja) 1995-12-11

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition