DE69422254T2 - Dynamische Speicheranordnung mit mehreren internen Speisespannungen - Google Patents

Dynamische Speicheranordnung mit mehreren internen Speisespannungen

Info

Publication number
DE69422254T2
DE69422254T2 DE69422254T DE69422254T DE69422254T2 DE 69422254 T2 DE69422254 T2 DE 69422254T2 DE 69422254 T DE69422254 T DE 69422254T DE 69422254 T DE69422254 T DE 69422254T DE 69422254 T2 DE69422254 T2 DE 69422254T2
Authority
DE
Germany
Prior art keywords
supply voltages
dynamic memory
internal supply
memory arrangement
several internal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69422254T
Other languages
English (en)
Other versions
DE69422254D1 (de
Inventor
Toru Chonan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Electronics Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of DE69422254D1 publication Critical patent/DE69422254D1/de
Application granted granted Critical
Publication of DE69422254T2 publication Critical patent/DE69422254T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4074Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/14Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/147Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Continuous-Control Power Sources That Use Transistors (AREA)
DE69422254T 1993-10-06 1994-10-04 Dynamische Speicheranordnung mit mehreren internen Speisespannungen Expired - Fee Related DE69422254T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5276109A JPH07105682A (ja) 1993-10-06 1993-10-06 ダイナミックメモリ装置

Publications (2)

Publication Number Publication Date
DE69422254D1 DE69422254D1 (de) 2000-01-27
DE69422254T2 true DE69422254T2 (de) 2000-05-11

Family

ID=17564925

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69422254T Expired - Fee Related DE69422254T2 (de) 1993-10-06 1994-10-04 Dynamische Speicheranordnung mit mehreren internen Speisespannungen

Country Status (5)

Country Link
US (1) US5463588A (de)
EP (1) EP0647946B1 (de)
JP (1) JPH07105682A (de)
KR (1) KR0140351B1 (de)
DE (1) DE69422254T2 (de)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19955775A1 (de) * 1999-11-19 2001-06-13 Infineon Technologies Ag Anordnung zur Spannungsversorgung einer elektronischen Schaltung
DE10110273A1 (de) * 2001-03-02 2002-09-19 Infineon Technologies Ag Spannungsgenerator mit Standby-Betriebsart
DE19911733B4 (de) * 1998-03-17 2004-02-12 Aisin Seiki K.K., Kariya Reibelement
DE102004041927B4 (de) * 2004-08-30 2013-11-21 Infineon Technologies Ag Schaltungsanordnung mit einem Pegelumsetzer und einem Spannungsregler
DE102018200716A1 (de) * 2018-01-17 2019-07-18 Robert Bosch Gmbh Elektrische Schaltung zur Versorgung eines Verbrauchers aus verschiedenen Spannungsquellen

Families Citing this family (40)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6156024A (en) 1996-12-03 2000-12-05 The Procter & Gamble Company Absorbent articles having lotioned leg cuffs
KR0172371B1 (ko) * 1995-04-26 1999-03-30 윤종용 반도체 메모리장치의 전원전압 발생회로
JP2806324B2 (ja) * 1995-08-25 1998-09-30 日本電気株式会社 内部降圧回路
JPH09147553A (ja) * 1995-11-22 1997-06-06 Fujitsu Ltd 半導体記憶装置
TW333698B (en) * 1996-01-30 1998-06-11 Hitachi Ltd The method for output circuit to select switch transistor & semiconductor memory
JP3013773B2 (ja) * 1996-03-22 2000-02-28 日本電気株式会社 半導体装置
JP3709246B2 (ja) * 1996-08-27 2005-10-26 株式会社日立製作所 半導体集積回路
JP3186626B2 (ja) * 1997-01-30 2001-07-11 日本電気株式会社 半導体記憶装置
KR19980082461A (ko) * 1997-05-07 1998-12-05 문정환 반도체 메모리 소자의 전압 조정회로
KR100432973B1 (ko) * 1997-05-24 2004-07-16 삼성전자주식회사 반도체 메모리 장치의 내부 전원 전압 발생 회로
JP4017248B2 (ja) 1998-04-10 2007-12-05 株式会社日立製作所 半導体装置
EP1163785B1 (de) * 1999-03-22 2005-12-14 Polycom, Inc. Audiokonferenzplattform mit zentralisiertem summieren
DE19934723A1 (de) * 1999-07-23 2001-02-01 Infineon Technologies Ag Steuerbare Stromquellenschaltung und hiermit ausgestatteter Phasenregelkreis
TW527601B (en) 2000-01-31 2003-04-11 Fujitsu Ltd Internal supply voltage generating circuit in a semiconductor memory device and method for controlling the same
JP4485637B2 (ja) * 2000-02-24 2010-06-23 富士通マイクロエレクトロニクス株式会社 半導体装置及び半導体装置の内部電源生成方法
JP3829041B2 (ja) * 2000-03-08 2006-10-04 株式会社東芝 強誘電体メモリ
US6310511B1 (en) * 2000-06-16 2001-10-30 Infineon Technologies Ag Generator scheme and circuit for overcoming resistive voltage drop on power supply circuits on chips
JP2002157882A (ja) * 2000-11-20 2002-05-31 Mitsubishi Electric Corp 半導体記憶装置
JP3710703B2 (ja) 2000-11-22 2005-10-26 松下電器産業株式会社 半導体集積回路
JP3927788B2 (ja) * 2001-11-01 2007-06-13 株式会社ルネサステクノロジ 半導体装置
US6897715B2 (en) * 2002-05-30 2005-05-24 Analog Devices, Inc. Multimode voltage regulator
US6819165B2 (en) * 2002-05-30 2004-11-16 Analog Devices, Inc. Voltage regulator with dynamically boosted bias current
US6781880B2 (en) * 2002-07-19 2004-08-24 Micron Technology, Inc. Non-volatile memory erase circuitry
ATE335276T1 (de) * 2002-08-28 2006-08-15 Koninkl Philips Electronics Nv Verfahren zur verringerung der stromaufnahme in einer zustandshalteschaltung, zustandshalteschaltung und elektronische einrichtung
US20050088222A1 (en) * 2003-10-27 2005-04-28 Stmicroelectronics, Inc. Chip enabled voltage regulator
KR100550645B1 (ko) * 2003-10-29 2006-02-09 주식회사 하이닉스반도체 전압 드라이빙 회로를 구비하는 반도체 메모리 소자
US7227804B1 (en) * 2004-04-19 2007-06-05 Cypress Semiconductor Corporation Current source architecture for memory device standby current reduction
KR100693783B1 (ko) * 2004-11-04 2007-03-12 주식회사 하이닉스반도체 내부전원 발생장치
KR100721197B1 (ko) * 2005-06-29 2007-05-23 주식회사 하이닉스반도체 반도체 장치의 내부전압 발생회로
US7248531B2 (en) 2005-08-03 2007-07-24 Mosaid Technologies Incorporated Voltage down converter for high speed memory
JP4804975B2 (ja) 2006-03-22 2011-11-02 エルピーダメモリ株式会社 基準電位発生回路及びそれを備えた半導体記憶装置
JP5261888B2 (ja) 2006-05-18 2013-08-14 富士通セミコンダクター株式会社 半導体記憶装置
KR100795014B1 (ko) * 2006-09-13 2008-01-16 주식회사 하이닉스반도체 반도체 메모리 장치의 내부전압 발생기
KR100850276B1 (ko) * 2007-03-23 2008-08-04 삼성전자주식회사 반도체 장치에 적합한 내부전원전압 발생회로
KR100885491B1 (ko) * 2007-03-31 2009-02-24 주식회사 하이닉스반도체 고전위전압 공급장치를 포함하는 반도체메모리소자
JP4805881B2 (ja) * 2007-07-12 2011-11-02 ライジング・シリコン・インコーポレーテッド Dramチップ
JP2009181638A (ja) * 2008-01-30 2009-08-13 Elpida Memory Inc 半導体記憶装置
JP5317127B2 (ja) * 2010-04-23 2013-10-16 ルネサスエレクトロニクス株式会社 半導体装置
JP6802009B2 (ja) * 2016-08-29 2020-12-16 エルジー ディスプレイ カンパニー リミテッド 圧力検出装置及びその駆動方法
KR20180047209A (ko) * 2016-10-31 2018-05-10 에스케이하이닉스 주식회사 레퍼런스 선택 회로

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60176121A (ja) * 1984-02-22 1985-09-10 Toshiba Corp 電圧降下回路
JPS6427094A (en) * 1987-07-23 1989-01-30 Mitsubishi Electric Corp Mos-type semiconductor memory
US4952863A (en) * 1989-12-20 1990-08-28 International Business Machines Corporation Voltage regulator with power boost system
KR930009148B1 (ko) * 1990-09-29 1993-09-23 삼성전자 주식회사 전원전압 조정회로
JPH0519914A (ja) * 1991-07-17 1993-01-29 Sharp Corp 半導体装置の内部降圧回路
US5295112A (en) * 1991-10-30 1994-03-15 Nec Corporation Semiconductor memory
JPH05159572A (ja) * 1991-12-04 1993-06-25 Hitachi Ltd 半導体装置

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19911733B4 (de) * 1998-03-17 2004-02-12 Aisin Seiki K.K., Kariya Reibelement
DE19955775A1 (de) * 1999-11-19 2001-06-13 Infineon Technologies Ag Anordnung zur Spannungsversorgung einer elektronischen Schaltung
DE19955775C2 (de) * 1999-11-19 2002-04-18 Infineon Technologies Ag Anordnung zur Spannungsversorgung einer elektronischen Schaltung
DE10110273A1 (de) * 2001-03-02 2002-09-19 Infineon Technologies Ag Spannungsgenerator mit Standby-Betriebsart
DE10110273C2 (de) * 2001-03-02 2003-04-24 Infineon Technologies Ag Spannungsgenerator mit Standby-Betriebsart
DE102004041927B4 (de) * 2004-08-30 2013-11-21 Infineon Technologies Ag Schaltungsanordnung mit einem Pegelumsetzer und einem Spannungsregler
DE102018200716A1 (de) * 2018-01-17 2019-07-18 Robert Bosch Gmbh Elektrische Schaltung zur Versorgung eines Verbrauchers aus verschiedenen Spannungsquellen

Also Published As

Publication number Publication date
DE69422254D1 (de) 2000-01-27
JPH07105682A (ja) 1995-04-21
EP0647946A3 (de) 1995-09-27
EP0647946B1 (de) 1999-12-22
KR950012454A (ko) 1995-05-16
EP0647946A2 (de) 1995-04-12
US5463588A (en) 1995-10-31
KR0140351B1 (ko) 1998-07-15

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP

8339 Ceased/non-payment of the annual fee