DE69322734T2 - Synchroner statischer Speicher mit wahlfreien Zugriff - Google Patents

Synchroner statischer Speicher mit wahlfreien Zugriff

Info

Publication number
DE69322734T2
DE69322734T2 DE69322734T DE69322734T DE69322734T2 DE 69322734 T2 DE69322734 T2 DE 69322734T2 DE 69322734 T DE69322734 T DE 69322734T DE 69322734 T DE69322734 T DE 69322734T DE 69322734 T2 DE69322734 T2 DE 69322734T2
Authority
DE
Germany
Prior art keywords
random access
static memory
synchronous static
synchronous
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69322734T
Other languages
English (en)
Other versions
DE69322734D1 (de
Inventor
Alexander G Dickinson
Mehdi Hatamian
Sailesh Krishna Rao
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
AT&T Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by AT&T Corp filed Critical AT&T Corp
Application granted granted Critical
Publication of DE69322734D1 publication Critical patent/DE69322734D1/de
Publication of DE69322734T2 publication Critical patent/DE69322734T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q11/00Selecting arrangements for multiplex systems
    • H04Q11/04Selecting arrangements for multiplex systems for time-division multiplexing
    • H04Q11/0428Integrated services digital network, i.e. systems for transmission of different types of digitised signals, e.g. speech, data, telecentral, television signals
    • H04Q11/0478Provisions for broadband connections
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G11C11/419Read-write [R-W] circuits
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/54Store-and-forward switching systems 
    • H04L12/56Packet switching systems
    • H04L12/5601Transfer mode dependent, e.g. ATM
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/10Packet switching elements characterised by the switching fabric construction
    • H04L49/104Asynchronous transfer mode [ATM] switching fabrics
    • H04L49/105ATM switching elements
    • H04L49/106ATM switching elements using space switching, e.g. crossbar or matrix
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/10Packet switching elements characterised by the switching fabric construction
    • H04L49/104Asynchronous transfer mode [ATM] switching fabrics
    • H04L49/105ATM switching elements
    • H04L49/108ATM switching elements using shared central buffer
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/40Constructional details, e.g. power supply, mechanical construction or backplane
    • H04L49/405Physical details, e.g. power supply, mechanical construction or backplane of ATM switches

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Static Random-Access Memory (AREA)
DE69322734T 1992-10-22 1993-10-13 Synchroner statischer Speicher mit wahlfreien Zugriff Expired - Lifetime DE69322734T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/965,127 US5309395A (en) 1992-10-22 1992-10-22 Synchronous static random access memory

Publications (2)

Publication Number Publication Date
DE69322734D1 DE69322734D1 (de) 1999-02-04
DE69322734T2 true DE69322734T2 (de) 1999-07-01

Family

ID=25509494

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69322734T Expired - Lifetime DE69322734T2 (de) 1992-10-22 1993-10-13 Synchroner statischer Speicher mit wahlfreien Zugriff

Country Status (5)

Country Link
US (1) US5309395A (de)
EP (1) EP0594347B1 (de)
JP (1) JP3123582B2 (de)
KR (1) KR970004416B1 (de)
DE (1) DE69322734T2 (de)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5394361A (en) * 1992-10-22 1995-02-28 At&T Corp. Read/write memory
JPH0729376A (ja) * 1993-07-14 1995-01-31 Ricoh Co Ltd 半導体メモリ装置及びデータ読み書き方法
US5732041A (en) * 1993-08-19 1998-03-24 Mmc Networks, Inc. Memory interface unit, shared memory switch system and associated method
US5574935A (en) * 1993-12-29 1996-11-12 Intel Corporation Superscalar processor with a multi-port reorder buffer
US6055588A (en) * 1994-11-28 2000-04-25 Hewlett-Packard Company Single stage FIFO memory with a circuit enabling memory to be read from and written to during a single cycle from a single clock
US5541918A (en) * 1995-01-31 1996-07-30 Fore Systems, Inc. Method and apparatus for manipulating an ATM cell
US5548588A (en) * 1995-01-31 1996-08-20 Fore Systems, Inc. Method and apparatus for switching, multicasting multiplexing and demultiplexing an ATM cell
US5802586A (en) * 1995-02-27 1998-09-01 Motorola, Inc. Cache memory having a read-modify-write operation and simultaneous burst read and write operations and a method therefor
US5813037A (en) * 1995-03-30 1998-09-22 Intel Corporation Multi-port register file for a reservation station including a pair of interleaved storage cells with shared write data lines and a capacitance isolation mechanism
US5577036A (en) * 1995-05-22 1996-11-19 Gte Laboratories Incorporated ATM memory with reduced noise transient
US5604705A (en) * 1995-08-22 1997-02-18 Lucent Technologies Inc. Static random access memory sense amplifier
GB2308903B (en) * 1996-01-05 2000-01-26 Advanced Risc Mach Ltd Cache memory circuit
JP3090104B2 (ja) * 1997-10-27 2000-09-18 日本電気株式会社 半導体メモリ装置
US6262937B1 (en) 1998-03-13 2001-07-17 Cypress Semiconductor Corp. Synchronous random access memory having a read/write address bus and process for writing to and reading from the same
US6262936B1 (en) 1998-03-13 2001-07-17 Cypress Semiconductor Corp. Random access memory having independent read port and write port and process for writing to and reading from the same
US6069839A (en) 1998-03-20 2000-05-30 Cypress Semiconductor Corp. Circuit and method for implementing single-cycle read/write operation(s), and random access memory including the circuit and/or practicing the method
US6087858A (en) * 1998-06-24 2000-07-11 Cypress Semiconductor Corp. Self-timed sense amplifier evaluation scheme
US5978280A (en) * 1998-06-25 1999-11-02 Cypress Semiconductor Corp. Method, architecture and circuit for reducing and/or eliminating small signal voltage swing sensitivity
US5986970A (en) * 1998-06-29 1999-11-16 Cypress Semiconductor Corp. Method, architecture and circuit for writing to a memory
US6122203A (en) * 1998-06-29 2000-09-19 Cypress Semiconductor Corp. Method, architecture and circuit for writing to and reading from a memory during a single cycle
US5946255A (en) * 1998-07-31 1999-08-31 Cypress Semiconductor Corp. Wordline synchronized reference voltage generator
TWI286764B (en) * 2005-01-20 2007-09-11 Himax Tech Ltd Memory architecture of display device and memory writing method for the same
US7877555B1 (en) * 2005-09-20 2011-01-25 Altera Corporation Power-aware RAM processing
JP2015032327A (ja) * 2013-07-31 2015-02-16 ルネサスエレクトロニクス株式会社 半導体装置、及びデータ読み出し方法
KR102421101B1 (ko) 2020-12-02 2022-07-14 홍윤서 휴대가능한 소형 냉온풍기

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5613573A (en) * 1979-07-11 1981-02-09 Toshiba Corp Memory control system
JPS5812185A (ja) * 1981-07-15 1983-01-24 Nec Corp 半導体記憶装置
DE3543911A1 (de) * 1984-12-14 1986-06-26 Mitsubishi Denki K.K., Tokio/Tokyo Digitale verzoegerungseinheit
US4829471A (en) * 1986-02-07 1989-05-09 Advanced Micro Devices, Inc. Data load sequencer for multiple data line serializer
JPS6379292A (ja) * 1986-09-24 1988-04-09 Nec Corp スタテイツク型メモリ
GB8917835D0 (en) * 1989-08-04 1989-09-20 Inmos Ltd Current sensing amplifier for a memory

Also Published As

Publication number Publication date
EP0594347A3 (en) 1994-08-24
KR970004416B1 (ko) 1997-03-27
EP0594347A2 (de) 1994-04-27
KR940010585A (ko) 1994-05-26
JP3123582B2 (ja) 2001-01-15
DE69322734D1 (de) 1999-02-04
EP0594347B1 (de) 1998-12-23
US5309395A (en) 1994-05-03
JPH06208795A (ja) 1994-07-26

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition