NL193124B - Statische willekeurig toegankelijke geheugeninrichting. - Google Patents

Statische willekeurig toegankelijke geheugeninrichting.

Info

Publication number
NL193124B
NL193124B NL8902985A NL8902985A NL193124B NL 193124 B NL193124 B NL 193124B NL 8902985 A NL8902985 A NL 8902985A NL 8902985 A NL8902985 A NL 8902985A NL 193124 B NL193124 B NL 193124B
Authority
NL
Netherlands
Prior art keywords
memory device
random access
access memory
static random
static
Prior art date
Application number
NL8902985A
Other languages
English (en)
Other versions
NL193124C (nl
NL8902985A (nl
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of NL8902985A publication Critical patent/NL8902985A/nl
Publication of NL193124B publication Critical patent/NL193124B/nl
Application granted granted Critical
Publication of NL193124C publication Critical patent/NL193124C/nl

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/147—Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/143—Detection of memory cassette insertion or removal; Continuity checks of supply or ground lines; Detection of supply variations, interruptions or levels ; Switching between alternative supplies
NL8902985A 1988-12-15 1989-12-04 Statische willekeurig toegankelijke geheugeninrichting. NL193124C (nl)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR880016713 1988-12-15
KR1019880016713A KR910004736B1 (ko) 1988-12-15 1988-12-15 스테이틱 메모리장치의 전원전압 조절회로

Publications (3)

Publication Number Publication Date
NL8902985A NL8902985A (nl) 1990-07-02
NL193124B true NL193124B (nl) 1998-07-01
NL193124C NL193124C (nl) 1998-11-03

Family

ID=19280186

Family Applications (1)

Application Number Title Priority Date Filing Date
NL8902985A NL193124C (nl) 1988-12-15 1989-12-04 Statische willekeurig toegankelijke geheugeninrichting.

Country Status (4)

Country Link
US (1) US4964084A (nl)
JP (1) JPH02166695A (nl)
KR (1) KR910004736B1 (nl)
NL (1) NL193124C (nl)

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03283562A (ja) * 1990-03-30 1991-12-13 Sony Corp 半導体集積回路装置
GB9007793D0 (en) * 1990-04-06 1990-06-06 Foss Richard C Dram cell plate and precharge voltage generator
KR920006985A (ko) * 1990-09-19 1992-04-28 김광호 스테이틱램의 부하 조절회로
JP2566067B2 (ja) * 1991-04-26 1996-12-25 株式会社東芝 論理回路
US5295113A (en) * 1991-05-09 1994-03-15 Intel Corporation Flash memory source inhibit generator
JP2785548B2 (ja) * 1991-10-25 1998-08-13 日本電気株式会社 半導体メモリ
JP2769653B2 (ja) * 1991-11-06 1998-06-25 三菱電機株式会社 反転回路
JPH05151773A (ja) * 1991-11-29 1993-06-18 Mitsubishi Electric Corp ダイナミツク型半導体記憶装置
US5303190A (en) * 1992-10-27 1994-04-12 Motorola, Inc. Static random access memory resistant to soft error
JP3156447B2 (ja) * 1993-06-17 2001-04-16 富士通株式会社 半導体集積回路
JP2848235B2 (ja) * 1994-02-28 1999-01-20 日本電気株式会社 半導体記憶装置用電源回路
DE69520494T2 (de) * 1995-08-04 2001-08-09 St Microelectronics Srl Anordnung zur Überwachung einer Schwellspannung
US5578941A (en) * 1995-08-23 1996-11-26 Micron Technology, Inc. Voltage compensating CMOS input buffer circuit
US5880593A (en) * 1995-08-30 1999-03-09 Micron Technology, Inc. On-chip substrate regulator test mode
JP2988387B2 (ja) * 1996-08-20 1999-12-13 日本電気株式会社 半導体装置
US6049242A (en) * 1997-10-14 2000-04-11 Cypress Semiconductor Corp. Voltage reference source for an overvoltage-tolerant bus interface
US5914844A (en) * 1997-10-14 1999-06-22 Cypress Semiconductor Corp. Overvoltage-tolerant input-output buffers having a switch configured to isolate a pull up transistor from a voltage supply
US6140805A (en) * 1999-05-18 2000-10-31 Kabushiki Kaisha Toshiba Source follower NMOS voltage regulator with PMOS switching element
US6477079B2 (en) 1999-05-18 2002-11-05 Kabushiki Kaisha Toshiba Voltage generator for semiconductor device
US6496054B1 (en) 2000-05-13 2002-12-17 Cypress Semiconductor Corp. Control signal generator for an overvoltage-tolerant interface circuit on a low voltage process
US8018268B1 (en) 2004-11-19 2011-09-13 Cypress Semiconductor Corporation Over-voltage tolerant input circuit
US20060280019A1 (en) * 2005-06-13 2006-12-14 Burton Edward A Error based supply regulation
DE602006017777D1 (de) * 2005-07-29 2010-12-09 Semiconductor Energy Lab Halbleiterspeicher und dessen Betriebsverfahren
JP2010080056A (ja) * 2010-01-08 2010-04-08 Renesas Technology Corp スタティック型半導体記憶装置
US8630139B2 (en) 2011-11-30 2014-01-14 International Business Machines Corporation Dual power supply memory array having a control circuit that dynamically selects a lower of two supply voltages for bitline pre-charge operations and an associated method
US9418716B1 (en) * 2015-04-15 2016-08-16 Qualcomm Incorporated Word line and bit line tracking across diverse power domains

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5870482A (ja) * 1981-10-23 1983-04-26 Hitachi Ltd 半導体集積回路
JPS57208687A (en) * 1981-06-17 1982-12-21 Toshiba Corp Mos integrated circuit
DE3138558A1 (de) * 1981-09-28 1983-04-07 Siemens AG, 1000 Berlin und 8000 München Schaltungsanordnung zur erzeugung eines von schwankungen einer versorgungsgleichspannung freien gleichspannungspegels
JPS59101096A (ja) * 1982-11-30 1984-06-11 Nissan Motor Co Ltd 記憶回路
US4585955B1 (en) * 1982-12-15 2000-11-21 Tokyo Shibaura Electric Co Internally regulated power voltage circuit for mis semiconductor integrated circuit
JPS59231917A (ja) * 1983-06-15 1984-12-26 Hitachi Ltd 半導体装置
US4581545A (en) * 1983-10-04 1986-04-08 At&T Technologies Schmitt trigger circuit
JPS60124124A (ja) * 1983-12-08 1985-07-03 Nec Corp 入力回路
US4642488A (en) * 1985-09-03 1987-02-10 Codex Corporation CMOS input buffer accepting TTL level inputs
JPS6337269A (ja) * 1986-08-01 1988-02-17 Fujitsu Ltd モ−ド選定回路
US4769784A (en) * 1986-08-19 1988-09-06 Advanced Micro Devices, Inc. Capacitor-plate bias generator for CMOS DRAM memories
GB2210745A (en) * 1987-10-08 1989-06-14 Ibm Voltage-controlled current-circuit

Also Published As

Publication number Publication date
US4964084A (en) 1990-10-16
JPH02166695A (ja) 1990-06-27
KR900010785A (ko) 1990-07-09
NL193124C (nl) 1998-11-03
JPH0461440B2 (nl) 1992-09-30
NL8902985A (nl) 1990-07-02
KR910004736B1 (ko) 1991-07-10

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Legal Events

Date Code Title Description
A1A A request for search or an international-type search has been filed
BB A search report has been drawn up
BC A request for examination has been filed
V4 Discontinued because of reaching the maximum lifetime of a patent

Effective date: 20091204