JPS57208687A - Mos integrated circuit - Google Patents

Mos integrated circuit

Info

Publication number
JPS57208687A
JPS57208687A JP56093411A JP9341181A JPS57208687A JP S57208687 A JPS57208687 A JP S57208687A JP 56093411 A JP56093411 A JP 56093411A JP 9341181 A JP9341181 A JP 9341181A JP S57208687 A JPS57208687 A JP S57208687A
Authority
JP
Japan
Prior art keywords
voltage
vdd
circuits
voltage lowering
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56093411A
Other languages
Japanese (ja)
Other versions
JPH0154795B2 (en
Inventor
Hitoshi Matsuda
Akira Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP56093411A priority Critical patent/JPS57208687A/en
Publication of JPS57208687A publication Critical patent/JPS57208687A/en
Publication of JPH0154795B2 publication Critical patent/JPH0154795B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/147—Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops

Abstract

PURPOSE:To realize the individual setting and resetting of the state for each storage element and to decrease number of external pins, by incorporating a forcible setting circuit that delivers a prescribed set level stably when a power supply is applied. CONSTITUTION:An MOSIC contains the 1st voltage lowering circuits QMl-QMm connected to a power supply VDD, the 2nd voltage lowering circuits QNl-QNn having a smaller degree of voltage drop than the 1st voltage lowring circuits, and a forcible setting circuit including an enhancement type FETQ1 having the drain and the source connected to the other end of the 2nd voltage lowering circuit with the gate connected to the other end of the 1st voltage lowering circuit and an enhancement/depression type inverter I with its input connected to the other end of the 2nd voltage lowering circuit respectively. As a result, the output voltage VO rises up along with the increase of the voltage VDD when this vltage VDD is supplied. Then the VO is set substantially at zero in a range of V1<= VDD<V2, and the output level can be set so that the VO rises up with the increase of the VDD.
JP56093411A 1981-06-17 1981-06-17 Mos integrated circuit Granted JPS57208687A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56093411A JPS57208687A (en) 1981-06-17 1981-06-17 Mos integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56093411A JPS57208687A (en) 1981-06-17 1981-06-17 Mos integrated circuit

Publications (2)

Publication Number Publication Date
JPS57208687A true JPS57208687A (en) 1982-12-21
JPH0154795B2 JPH0154795B2 (en) 1989-11-21

Family

ID=14081550

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56093411A Granted JPS57208687A (en) 1981-06-17 1981-06-17 Mos integrated circuit

Country Status (1)

Country Link
JP (1) JPS57208687A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL8902985A (en) * 1988-12-15 1990-07-02 Samsung Electronics Co Ltd STATIC ANY ACCESSIBLE MEMORY.

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5562589A (en) * 1978-10-31 1980-05-12 Matsushita Electric Ind Co Ltd Semiconductor memory circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5562589A (en) * 1978-10-31 1980-05-12 Matsushita Electric Ind Co Ltd Semiconductor memory circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL8902985A (en) * 1988-12-15 1990-07-02 Samsung Electronics Co Ltd STATIC ANY ACCESSIBLE MEMORY.

Also Published As

Publication number Publication date
JPH0154795B2 (en) 1989-11-21

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