JPS56114198A - Semiconductor circuit - Google Patents

Abstract

PURPOSE:To maintain a prescribed output level for a long period by holding the gate potential of output TR of a bootstrap circuit, which increases the storage level of an MOSIC memory up to the power source level, to a constant potential in terms of direct current. CONSTITUTION:As clock phi1 rises, the potential at point 1 also rises and charging capacity CB starts. At this time, inverter I operates to turn off TRQ5, and consequently phiout rises up to VDD through the conduction of TRQ4 and the boostrap effect of capacity CB. Next, clock phi4 rises and TRQ7 turns on, so that the potential at point 1 will drop. Then, clock phi3 rises and, therefore, phiout rises above VDD. Further, the potential at point 4 exceeds VDD through the effect of the parasitic capacity of TRQ7, which gets unsaturated, so that the potential at point 1 will be held at the power source level in terms of direct current. Thus, a reverse current due to TRQ4 is prevented and a prescribed potential level is maintained for a long period.