JPS5712485A - Semiconductor integrated circuit - Google Patents

Semiconductor integrated circuit

Info

Publication number
JPS5712485A
JPS5712485A JP8814880A JP8814880A JPS5712485A JP S5712485 A JPS5712485 A JP S5712485A JP 8814880 A JP8814880 A JP 8814880A JP 8814880 A JP8814880 A JP 8814880A JP S5712485 A JPS5712485 A JP S5712485A
Authority
JP
Japan
Prior art keywords
node
pulse
phid
level
fet15
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8814880A
Other languages
Japanese (ja)
Inventor
Koichiro Masuko
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP8814880A priority Critical patent/JPS5712485A/en
Publication of JPS5712485A publication Critical patent/JPS5712485A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/14Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/145Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)

Abstract

PURPOSE:To save the chip area, by constituting a level holding circuit with two MOSFETs and thus eliminating an MOS capacitor that occupies a large area on a chip. CONSTITUTION:With a rise of refresh pulse phi, a node 14 is charged. Then the node 14 is increased more up to a high level via the gate capacity of an MOSFET15 with a rise of the delay pulse phiD up to a level of power supply voltage VDD. Thus an FET15 conducts strongly and the level of pulse phiD is conveyed to an output node 2 through the FET15. Then the pulse phi is set at a low level when the recharge of node 2 is over, and thus the potential of the node 14 is set at a low level to set the FET15 under a nonconduction state. As a result, the pulse phiD is set at a low level to give no effect at all to the node 2. A pulse having a relation between pulses phi and phiD exists normally within an IC.
JP8814880A 1980-06-26 1980-06-26 Semiconductor integrated circuit Pending JPS5712485A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8814880A JPS5712485A (en) 1980-06-26 1980-06-26 Semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8814880A JPS5712485A (en) 1980-06-26 1980-06-26 Semiconductor integrated circuit

Publications (1)

Publication Number Publication Date
JPS5712485A true JPS5712485A (en) 1982-01-22

Family

ID=13934841

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8814880A Pending JPS5712485A (en) 1980-06-26 1980-06-26 Semiconductor integrated circuit

Country Status (1)

Country Link
JP (1) JPS5712485A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6014707A (en) * 1983-07-06 1985-01-25 株式会社フジクラ Plastic insulated wire for wiring device
JPS60218714A (en) * 1984-04-14 1985-11-01 株式会社フジクラ Method of producing rubber, plastic wire and cable
US8044696B2 (en) 2008-02-25 2011-10-25 Samsung Electronics Co., Ltd. Delay circuit having long delay time and semiconductor device comprising the same

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4898750A (en) * 1972-03-28 1973-12-14

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4898750A (en) * 1972-03-28 1973-12-14

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6014707A (en) * 1983-07-06 1985-01-25 株式会社フジクラ Plastic insulated wire for wiring device
JPS60218714A (en) * 1984-04-14 1985-11-01 株式会社フジクラ Method of producing rubber, plastic wire and cable
US8044696B2 (en) 2008-02-25 2011-10-25 Samsung Electronics Co., Ltd. Delay circuit having long delay time and semiconductor device comprising the same

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