JPS5651090A - Nonvolatile semiconductor memory - Google Patents

Nonvolatile semiconductor memory

Info

Publication number
JPS5651090A
JPS5651090A JP12779079A JP12779079A JPS5651090A JP S5651090 A JPS5651090 A JP S5651090A JP 12779079 A JP12779079 A JP 12779079A JP 12779079 A JP12779079 A JP 12779079A JP S5651090 A JPS5651090 A JP S5651090A
Authority
JP
Japan
Prior art keywords
voltage
fet18
igfets
vth1
malfunction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12779079A
Other languages
Japanese (ja)
Other versions
JPS6035758B2 (en
Inventor
Hiroshi Iwahashi
Masamichi Asano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP54127790A priority Critical patent/JPS6035758B2/en
Publication of JPS5651090A publication Critical patent/JPS5651090A/en
Publication of JPS6035758B2 publication Critical patent/JPS6035758B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/147—Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops

Abstract

PURPOSE:To prevent the malfunction and damage of a peripheral circuit, by operating the peripheral circuit with a given voltage or less via a voltage limit circuit, in an ROM formed with IGFETs which judge the amount of electric charges at the charge catch center through inverting operation. CONSTITUTION:Taking the threshold voltage of series enhancement MOSFETs14- 17 of a power supply limit circuit 12 as Vth1, the voltage at the node (a) connected to the source of MOSFET13 and the drain of FET14 for power supply voltage Vc application is a voltage 4 Vth1 independently of the voltage Vc. The output voltage of the enhancement MOSFET18 with this voltage at its gate is also a given voltage according to the threshold voltage of FET18 and it does not rise even if the voltage Vc is increased for the inverting operation of IGFETs. Accordingly, the production of malfunction and damage of a sense amplifier 11 which takes the output voltage of FET18 due to a high voltage of peripheral devices can be prevented.
JP54127790A 1979-10-03 1979-10-03 non-volatile semiconductor memory Expired JPS6035758B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54127790A JPS6035758B2 (en) 1979-10-03 1979-10-03 non-volatile semiconductor memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54127790A JPS6035758B2 (en) 1979-10-03 1979-10-03 non-volatile semiconductor memory

Publications (2)

Publication Number Publication Date
JPS5651090A true JPS5651090A (en) 1981-05-08
JPS6035758B2 JPS6035758B2 (en) 1985-08-16

Family

ID=14968735

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54127790A Expired JPS6035758B2 (en) 1979-10-03 1979-10-03 non-volatile semiconductor memory

Country Status (1)

Country Link
JP (1) JPS6035758B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6085499A (en) * 1983-08-31 1985-05-14 ナシヨナル・セミコンダクタ−・コ−ポレ−シヨン Internal high voltage ivpp) regulator for integrated circuit
JPS61181000A (en) * 1985-02-06 1986-08-13 Matsushita Electric Ind Co Ltd Dynamic rom circuit
FR2580421A1 (en) * 1985-04-12 1986-10-17 Eurotechnique Sa ELECTRICALLY PROGRAMMABLE DEAD MEMORY
EP0449218A2 (en) * 1990-03-29 1991-10-02 Nec Corporation Semiconductor memory device having signal receiving facility fabricated from BI-CMOS circuits

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0257147U (en) * 1988-10-21 1990-04-25

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6085499A (en) * 1983-08-31 1985-05-14 ナシヨナル・セミコンダクタ−・コ−ポレ−シヨン Internal high voltage ivpp) regulator for integrated circuit
JPS61181000A (en) * 1985-02-06 1986-08-13 Matsushita Electric Ind Co Ltd Dynamic rom circuit
FR2580421A1 (en) * 1985-04-12 1986-10-17 Eurotechnique Sa ELECTRICALLY PROGRAMMABLE DEAD MEMORY
JPS63501106A (en) * 1985-04-12 1988-04-21 エスジェーエス―トムソン　ミクロエレクトロニクス　ソシエテ　アノニム Electrically programmable read-only memory
US4837742A (en) * 1985-04-12 1989-06-06 Eurotechnique Electrically programmable ROM
EP0449218A2 (en) * 1990-03-29 1991-10-02 Nec Corporation Semiconductor memory device having signal receiving facility fabricated from BI-CMOS circuits

Also Published As

Publication number Publication date
JPS6035758B2 (en) 1985-08-16

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