JPS5771581A - Active boosting circuit - Google Patents
Active boosting circuitInfo
- Publication number
- JPS5771581A JPS5771581A JP55147926A JP14792680A JPS5771581A JP S5771581 A JPS5771581 A JP S5771581A JP 55147926 A JP55147926 A JP 55147926A JP 14792680 A JP14792680 A JP 14792680A JP S5771581 A JPS5771581 A JP S5771581A
- Authority
- JP
- Japan
- Prior art keywords
- becomes
- state
- threshold voltage
- potential
- trq14
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4094—Bit-line management or control circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dc-Dc Converters (AREA)
Abstract
PURPOSE:To execute an effective boosting operation, by constituting an active boosting circuit which is used for a dynamic RAM, of MOS transistors having each different threshold voltage. CONSTITUTION:For instance, when digit lines B, A have beome ''0'' and ''1'' levels by a sense operation, a transistor TRQ17 becomes an on-state, and a node D becomes ''0''V. As a result, a TRQ15 maintains an off-state. Also, a TRQ16 is in a cut-off state since threshold voltage is high, therefore, no charge of a node C is discharged to the line A. Sibsequently, when a boosting clock signal phi becomes ''1'' level, a TRQ 14 becomes an on-state, and the potential of the line A is restored to a level of the electric power supply Vcc. In this case, since threshold voltage of the TRQ14 is made lower than that of an ordinary TR in advance, conductance of the TRQ14 and TRQ15 is made large, therefore, the potential of the lines A, B is boosted to the supply potential exactly and rapidly as much.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55147926A JPS5771581A (en) | 1980-10-22 | 1980-10-22 | Active boosting circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55147926A JPS5771581A (en) | 1980-10-22 | 1980-10-22 | Active boosting circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5771581A true JPS5771581A (en) | 1982-05-04 |
JPS6212598B2 JPS6212598B2 (en) | 1987-03-19 |
Family
ID=15441201
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55147926A Granted JPS5771581A (en) | 1980-10-22 | 1980-10-22 | Active boosting circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5771581A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62165787A (en) * | 1986-01-17 | 1987-07-22 | Toshiba Corp | Semiconductor memory device |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4052229A (en) * | 1976-06-25 | 1977-10-04 | Intel Corporation | Process for preparing a substrate for mos devices of different thresholds |
JPS54129841A (en) * | 1978-01-16 | 1979-10-08 | Western Electric Co | Sense refresh detector |
JPS5548894A (en) * | 1978-09-29 | 1980-04-08 | Nec Corp | Memory circuit |
-
1980
- 1980-10-22 JP JP55147926A patent/JPS5771581A/en active Granted
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4052229A (en) * | 1976-06-25 | 1977-10-04 | Intel Corporation | Process for preparing a substrate for mos devices of different thresholds |
US4052229B1 (en) * | 1976-06-25 | 1985-01-15 | ||
JPS54129841A (en) * | 1978-01-16 | 1979-10-08 | Western Electric Co | Sense refresh detector |
JPS5548894A (en) * | 1978-09-29 | 1980-04-08 | Nec Corp | Memory circuit |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62165787A (en) * | 1986-01-17 | 1987-07-22 | Toshiba Corp | Semiconductor memory device |
JPH054753B2 (en) * | 1986-01-17 | 1993-01-20 | Toshiba Kk |
Also Published As
Publication number | Publication date |
---|---|
JPS6212598B2 (en) | 1987-03-19 |
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