JPS5613573A - Memory control system - Google Patents

Memory control system

Info

Publication number
JPS5613573A
JPS5613573A JP8771479A JP8771479A JPS5613573A JP S5613573 A JPS5613573 A JP S5613573A JP 8771479 A JP8771479 A JP 8771479A JP 8771479 A JP8771479 A JP 8771479A JP S5613573 A JPS5613573 A JP S5613573A
Authority
JP
Japan
Prior art keywords
address
machine cycle
ram33
data
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8771479A
Other languages
Japanese (ja)
Inventor
Osamu Sakura
Kanenori Adachi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP8771479A priority Critical patent/JPS5613573A/en
Publication of JPS5613573A publication Critical patent/JPS5613573A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store

Abstract

PURPOSE:To improve the performance of the entire computer by shortening the time of operation by reading RAM in the former half of a machine cycle and by writing to RAM in the latter half. CONSTITUTION:This system is equipped with address changeover circuit 34 that supplies RAM33 with read address RA in the former half of a machine cycle and with write address WA in the latter half, circuit 35 that compares write address WA to read address RA in the same machine cycle, register 36 that remembers data read out of RAM33 at a halfway point of the machine cycle, and data changeover circuit 37 that normally outputs data of register 36 and, when circuit 35 outputs an address identity signal, outputs write data to be supplied to RAM33. Then, RAM33 is brought under read control in the former half of the machine cycle and under write control in the latter half.
JP8771479A 1979-07-11 1979-07-11 Memory control system Pending JPS5613573A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8771479A JPS5613573A (en) 1979-07-11 1979-07-11 Memory control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8771479A JPS5613573A (en) 1979-07-11 1979-07-11 Memory control system

Publications (1)

Publication Number Publication Date
JPS5613573A true JPS5613573A (en) 1981-02-09

Family

ID=13922561

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8771479A Pending JPS5613573A (en) 1979-07-11 1979-07-11 Memory control system

Country Status (1)

Country Link
JP (1) JPS5613573A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57200982A (en) * 1981-06-03 1982-12-09 Hitachi Ltd Storage control system
JPS60147856A (en) * 1983-12-30 1985-08-03 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション Memory
JPS61282958A (en) * 1985-06-07 1986-12-13 Sanyo Electric Co Ltd Microcomputer
EP0355560A2 (en) * 1988-08-25 1990-02-28 Integrated Device Technology, Inc. Conditional write ram
JPH03147152A (en) * 1989-10-31 1991-06-24 Internatl Business Mach Corp <Ibm> Memory system and data storage accessing
EP0594345A2 (en) * 1992-10-22 1994-04-27 AT&T Corp. Read/write memory
EP0594347A2 (en) * 1992-10-22 1994-04-27 AT&T Corp. Synchronous static random access memory

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57200982A (en) * 1981-06-03 1982-12-09 Hitachi Ltd Storage control system
JPS6327795B2 (en) * 1981-06-03 1988-06-06 Hitachi Ltd
JPS60147856A (en) * 1983-12-30 1985-08-03 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション Memory
JPS61282958A (en) * 1985-06-07 1986-12-13 Sanyo Electric Co Ltd Microcomputer
EP0355560A2 (en) * 1988-08-25 1990-02-28 Integrated Device Technology, Inc. Conditional write ram
JPH03147152A (en) * 1989-10-31 1991-06-24 Internatl Business Mach Corp <Ibm> Memory system and data storage accessing
EP0594345A2 (en) * 1992-10-22 1994-04-27 AT&T Corp. Read/write memory
EP0594347A2 (en) * 1992-10-22 1994-04-27 AT&T Corp. Synchronous static random access memory
EP0594347A3 (en) * 1992-10-22 1994-08-24 At & T Corp Synchronous static random access memory
EP0594345A3 (en) * 1992-10-22 1994-08-24 At & T Corp Read/write memory

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