JPS57109055A - Readout control system for microinstruction - Google Patents

Readout control system for microinstruction

Info

Publication number
JPS57109055A
JPS57109055A JP18615380A JP18615380A JPS57109055A JP S57109055 A JPS57109055 A JP S57109055A JP 18615380 A JP18615380 A JP 18615380A JP 18615380 A JP18615380 A JP 18615380A JP S57109055 A JPS57109055 A JP S57109055A
Authority
JP
Japan
Prior art keywords
instruction
control
address
storage
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18615380A
Other languages
Japanese (ja)
Inventor
Kiyoshi Kawanishi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP18615380A priority Critical patent/JPS57109055A/en
Publication of JPS57109055A publication Critical patent/JPS57109055A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3804—Instruction prefetching for branches, e.g. hedging, branch folding

Abstract

PURPOSE:To speed the reading of a branch instruction by shortening the processing time of instructions by checking the operation code of an instruction when the instruction is read out of a control storage device, and by inhibiting the reading of a next instruction until an address is determined when the instruction is the branch instruction. CONSTITUTION:Data to be written in a control storage device 2 is stored in a control-storage write data register 1, and read data from the control storage 2 is set in a control-storage readout-data register 3. A control-storage address register 4 specifies an address for the writing of data to the control storage 2 and an address for the reading of data from the control storage 2, and a CS address control circuit 5 performs the discrimination of a branch condition, the generation of a branch address, the update of a control address, etc. Then, an operation code from the register 3 is applied to the circuit 5 to check the OP code of the instruction and when the instruction is a branch instruction, the reading of a next instruction is inhibited until an address is specified by the output of a CS access control circuit 6.
JP18615380A 1980-12-26 1980-12-26 Readout control system for microinstruction Pending JPS57109055A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18615380A JPS57109055A (en) 1980-12-26 1980-12-26 Readout control system for microinstruction

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18615380A JPS57109055A (en) 1980-12-26 1980-12-26 Readout control system for microinstruction

Publications (1)

Publication Number Publication Date
JPS57109055A true JPS57109055A (en) 1982-07-07

Family

ID=16183303

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18615380A Pending JPS57109055A (en) 1980-12-26 1980-12-26 Readout control system for microinstruction

Country Status (1)

Country Link
JP (1) JPS57109055A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6182238A (en) * 1984-08-18 1986-04-25 Fujitsu Ltd Condition branch controlling system of instruction
JPS6282402A (en) * 1985-10-07 1987-04-15 Toshiba Corp Sequence controller
JPS62154142A (en) * 1985-12-27 1987-07-09 Toshiba Corp Pipeline processing method for processor and pipeline processor
JPH01263727A (en) * 1988-04-13 1989-10-20 Mitsubishi Electric Corp Data processor

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6182238A (en) * 1984-08-18 1986-04-25 Fujitsu Ltd Condition branch controlling system of instruction
JPH0424731B2 (en) * 1984-08-18 1992-04-27 Fujitsu Ltd
JPS6282402A (en) * 1985-10-07 1987-04-15 Toshiba Corp Sequence controller
JPS62154142A (en) * 1985-12-27 1987-07-09 Toshiba Corp Pipeline processing method for processor and pipeline processor
JPH0451858B2 (en) * 1985-12-27 1992-08-20 Tokyo Shibaura Electric Co
JPH01263727A (en) * 1988-04-13 1989-10-20 Mitsubishi Electric Corp Data processor

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