JPS56117398A - Data processor - Google Patents
Data processorInfo
- Publication number
- JPS56117398A JPS56117398A JP1874580A JP1874580A JPS56117398A JP S56117398 A JPS56117398 A JP S56117398A JP 1874580 A JP1874580 A JP 1874580A JP 1874580 A JP1874580 A JP 1874580A JP S56117398 A JPS56117398 A JP S56117398A
- Authority
- JP
- Japan
- Prior art keywords
- write
- test
- buffer memory
- register
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0864—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches using pseudo-associative means, e.g. set-associative or hashing
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Debugging And Monitoring (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Abstract
PURPOSE:To make easy and ensure the test of error recovery function, by controlling the write-in from the main memory through the reduction in the number of times storing every access of buffer memory for the test by the storage of set write- in number of times. CONSTITUTION:The counter 50 of a buffer memory control means 31 stores the set write-in inhibition number of times via data register. This number of times is subtracted by the subtraction pulse via the AND gate 58 switched with the NAND output of the inversion output of the register 50, every time when the page word with errror written in the buffer memory 27 for the test is accessed based on the write- in request. Further, with the access of the number of set times, when the content of storage of the register 50 is 0, the AND gate 56 is switched with the inversion of the AND output, the inhibition of write-in is released, correct page word is written in from the main memory to the memory 27 based on the write-in request signal, allowing to make easy and ensure the error recovery function test of classes 1, 2... according to the number of set times.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1874580A JPS56117398A (en) | 1980-02-18 | 1980-02-18 | Data processor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1874580A JPS56117398A (en) | 1980-02-18 | 1980-02-18 | Data processor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS56117398A true JPS56117398A (en) | 1981-09-14 |
| JPS6223336B2 JPS6223336B2 (en) | 1987-05-22 |
Family
ID=11980186
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1874580A Granted JPS56117398A (en) | 1980-02-18 | 1980-02-18 | Data processor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS56117398A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58111887U (en) * | 1982-01-26 | 1983-07-30 | 平野 道仁 | refrigerator |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2016183534A1 (en) | 2015-05-14 | 2016-11-17 | The Wistar Institute Of Anatomy And Biology | Ebna1 inhibitors and methods using same |
-
1980
- 1980-02-18 JP JP1874580A patent/JPS56117398A/en active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58111887U (en) * | 1982-01-26 | 1983-07-30 | 平野 道仁 | refrigerator |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6223336B2 (en) | 1987-05-22 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS5755456A (en) | Career recording system | |
| JPS5755454A (en) | Failure recovery system | |
| JPS54146549A (en) | Information processor | |
| JPS56117398A (en) | Data processor | |
| JPS56149645A (en) | Instruction word deciphering device of information processor | |
| JPS57109055A (en) | Readout control system for microinstruction | |
| JPS57109177A (en) | List processing system | |
| JPS57189398A (en) | Control system for memory system | |
| JPS5712469A (en) | Buffer memory control system | |
| JPS5493940A (en) | Correcting unit of code word error | |
| JPS56137447A (en) | Information processor | |
| JPS57100547A (en) | Log-out control system | |
| SU1003151A1 (en) | Storage device with information check at recording | |
| JPS5769454A (en) | Microprogram controller | |
| JPS5745647A (en) | Control storage control system | |
| JPS57127981A (en) | Digital signal storage device | |
| JPS5755465A (en) | Data processor | |
| JPS5669000A (en) | Data check system | |
| JPS57209553A (en) | Information processor | |
| JPS5786193A (en) | Information processor | |
| JPS54107225A (en) | Memory control system | |
| JPS56117400A (en) | Buffer memory control system | |
| JPS57169858A (en) | Data processor | |
| JPS57139863A (en) | Hardware internal event measuring system | |
| JPS56159747A (en) | Program testing device |