JPS57209553A - Information processor - Google Patents

Information processor

Info

Publication number
JPS57209553A
JPS57209553A JP56095447A JP9544781A JPS57209553A JP S57209553 A JPS57209553 A JP S57209553A JP 56095447 A JP56095447 A JP 56095447A JP 9544781 A JP9544781 A JP 9544781A JP S57209553 A JPS57209553 A JP S57209553A
Authority
JP
Japan
Prior art keywords
main storage
failure information
address
register
address bus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56095447A
Other languages
Japanese (ja)
Inventor
Tomio Togashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP56095447A priority Critical patent/JPS57209553A/en
Publication of JPS57209553A publication Critical patent/JPS57209553A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/073Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in a memory management context, e.g. virtual memory or cache management
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation

Abstract

PURPOSE:To make analysis of causes to failures quickly in the restart of a system, by storing failure information to a storage location of the failure information in a system and transferring the information to a failure information storage area set with a main storage device after a relief type initial set succeedingly. CONSTITUTION:After failure information read out from the 1st scratch pad memory 7 is stored in a failure information storage area 13, an address set to a main storage address register 14 passes through a main storage write address bus 26 and added by 4 with a main storage address counter 15, and the result of operation passes through an address bus 27 and is set to the main storage address register 14. Further, the address passes through an address bus 26 and is set to a main storage address register 16. The next failure information is read out from the memory 7 similarly, set to a main storage write register 12 and written in the failure information storage area 13 instructed with a main storage address bus 25 by the register 16 preset.
JP56095447A 1981-06-19 1981-06-19 Information processor Pending JPS57209553A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56095447A JPS57209553A (en) 1981-06-19 1981-06-19 Information processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56095447A JPS57209553A (en) 1981-06-19 1981-06-19 Information processor

Publications (1)

Publication Number Publication Date
JPS57209553A true JPS57209553A (en) 1982-12-22

Family

ID=14137941

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56095447A Pending JPS57209553A (en) 1981-06-19 1981-06-19 Information processor

Country Status (1)

Country Link
JP (1) JPS57209553A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60134355A (en) * 1983-12-21 1985-07-17 Hitachi Ltd System state displaying system
JPS6120147A (en) * 1984-07-06 1986-01-28 Nec Corp Displaying system of system status

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60134355A (en) * 1983-12-21 1985-07-17 Hitachi Ltd System state displaying system
JPS6120147A (en) * 1984-07-06 1986-01-28 Nec Corp Displaying system of system status

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