JPS55134443A - Data processing unit - Google Patents

Data processing unit

Info

Publication number
JPS55134443A
JPS55134443A JP4070279A JP4070279A JPS55134443A JP S55134443 A JPS55134443 A JP S55134443A JP 4070279 A JP4070279 A JP 4070279A JP 4070279 A JP4070279 A JP 4070279A JP S55134443 A JPS55134443 A JP S55134443A
Authority
JP
Japan
Prior art keywords
data
circuit
units
write
register
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4070279A
Other languages
Japanese (ja)
Other versions
JPS616408B2 (en
Inventor
Yukichi Ikuta
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP4070279A priority Critical patent/JPS55134443A/en
Publication of JPS55134443A publication Critical patent/JPS55134443A/en
Publication of JPS616408B2 publication Critical patent/JPS616408B2/ja
Granted legal-status Critical Current

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  • Executing Machine-Instructions (AREA)

Abstract

PURPOSE: To write to a memory unit in high-speed by making a local memory unit duplex and by shifting the write timing of respective memory units.
CONSTITUTION: Data read from duplex local memory units 1 and 2 are applied to operation circuit 8 through A register 6 and B register 7, and the operation result in circuit 8 is written in units 1 and 2 again. Master/slave switching circuit 10 which performs switching control of units 1 and 2 with one as the master system and the other as the slave system is connected to this data processing unit; and when data is written in units 1 and 2, the write timing of the slave system is delayed for the master system by approximately half machine cycle by the command from circuit 10 to write data from data register 9 to the master system first. In case of data read, data from the master system is selected in selection circuit 5 by indication of circuit 10 and is output to register 6 or 7. Then, only when an error is detected in the operation result dependent upon circuit 8, data is written to the slave system, thus making write to the memory unit high-speed.
COPYRIGHT: (C)1980,JPO&Japio
JP4070279A 1979-04-04 1979-04-04 Data processing unit Granted JPS55134443A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4070279A JPS55134443A (en) 1979-04-04 1979-04-04 Data processing unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4070279A JPS55134443A (en) 1979-04-04 1979-04-04 Data processing unit

Publications (2)

Publication Number Publication Date
JPS55134443A true JPS55134443A (en) 1980-10-20
JPS616408B2 JPS616408B2 (en) 1986-02-26

Family

ID=12587898

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4070279A Granted JPS55134443A (en) 1979-04-04 1979-04-04 Data processing unit

Country Status (1)

Country Link
JP (1) JPS55134443A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6368924A (en) * 1986-09-10 1988-03-28 Fujitsu Ltd System for controlling data processing of microprocessor

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0357104U (en) * 1989-10-06 1991-05-31

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6368924A (en) * 1986-09-10 1988-03-28 Fujitsu Ltd System for controlling data processing of microprocessor

Also Published As

Publication number Publication date
JPS616408B2 (en) 1986-02-26

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