DE3767735D1 - Halbleiterspeichervorrichtung. - Google Patents

Halbleiterspeichervorrichtung.

Info

Publication number
DE3767735D1
DE3767735D1 DE8787302183T DE3767735T DE3767735D1 DE 3767735 D1 DE3767735 D1 DE 3767735D1 DE 8787302183 T DE8787302183 T DE 8787302183T DE 3767735 T DE3767735 T DE 3767735T DE 3767735 D1 DE3767735 D1 DE 3767735D1
Authority
DE
Germany
Prior art keywords
storage device
semiconductor storage
semiconductor
storage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8787302183T
Other languages
English (en)
Inventor
Kiyohiro Furutani
Koichiro Mashiko
Kazutami Arimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Application granted granted Critical
Publication of DE3767735D1 publication Critical patent/DE3767735D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/37—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor being at least partially in a trench in the substrate
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/911—Light sensitive array adapted to be scanned by electron beam, e.g. vidicon device
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/922—Active solid-state devices, e.g. transistors, solid-state diodes with means to prevent inspection of or tampering with an integrated circuit, e.g. "smart card", anti-tamper
DE8787302183T 1986-03-13 1987-03-13 Halbleiterspeichervorrichtung. Expired - Fee Related DE3767735D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61056120A JPH0685427B2 (ja) 1986-03-13 1986-03-13 半導体記憶装置

Publications (1)

Publication Number Publication Date
DE3767735D1 true DE3767735D1 (de) 1991-03-07

Family

ID=13018208

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8787302183T Expired - Fee Related DE3767735D1 (de) 1986-03-13 1987-03-13 Halbleiterspeichervorrichtung.

Country Status (4)

Country Link
US (1) US4979013A (de)
EP (1) EP0237361B1 (de)
JP (1) JPH0685427B2 (de)
DE (1) DE3767735D1 (de)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0685427B2 (ja) * 1986-03-13 1994-10-26 三菱電機株式会社 半導体記憶装置
JP2517015B2 (ja) * 1987-11-06 1996-07-24 シャープ株式会社 半導体メモリの製造方法
JP2785191B2 (ja) * 1988-10-29 1998-08-13 ソニー株式会社 半導体メモリ
KR950000500B1 (ko) * 1989-08-31 1995-01-24 금성일렉트론 주식회사 디램셀 커패시터 제조방법 및 구조
JP3199717B2 (ja) * 1989-09-08 2001-08-20 株式会社東芝 半導体装置およびその製造方法
US5248628A (en) * 1989-09-08 1993-09-28 Kabushiki Kaisha Toshiba Method of fabricating a semiconductor memory device
JPH03278573A (ja) * 1990-03-28 1991-12-10 Mitsubishi Electric Corp 半導体記憶装置
DE19822750A1 (de) * 1998-05-20 1999-11-25 Siemens Ag Halbleiterspeicher mit differentiellen Bitleitungen
US6118683A (en) * 1999-09-29 2000-09-12 Infineon Technologies North America Corporation Dynamic random access memory cell layout
US6282116B1 (en) * 2000-06-26 2001-08-28 Infineon Technologies North America Corp. Dynamic random access memory

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54881A (en) * 1977-06-03 1979-01-06 Fujitsu Ltd Semiconductor device
JPS55150267A (en) * 1979-05-10 1980-11-22 Fujitsu Ltd Semiconductor memory cell
JPS56105664A (en) * 1980-01-25 1981-08-22 Toshiba Corp Dynamic memory device
EP0033130B1 (de) * 1980-01-25 1986-01-08 Kabushiki Kaisha Toshiba Halbleiterspeichervorrichtung
JPS58154256A (ja) * 1982-03-10 1983-09-13 Hitachi Ltd 半導体装置
US4549196A (en) * 1982-08-04 1985-10-22 Westinghouse Electric Corp. Lateral bipolar transistor
JPS602784B2 (ja) * 1982-12-20 1985-01-23 富士通株式会社 半導体記憶装置
KR900000170B1 (ko) * 1984-06-05 1990-01-23 가부시끼가이샤 도오시바 다이내믹형 메모리셀과 그 제조방법
JPS6118167A (ja) * 1984-07-04 1986-01-27 Hitachi Ltd 半導体装置
US4800525A (en) * 1984-10-31 1989-01-24 Texas Instruments Incorporated Dual ended folded bit line arrangement and addressing scheme
JPS61107762A (ja) * 1984-10-31 1986-05-26 Toshiba Corp 半導体記憶装置の製造方法
JPS61179568A (ja) * 1984-12-29 1986-08-12 Fujitsu Ltd 半導体記憶装置の製造方法
US4700328A (en) * 1985-07-11 1987-10-13 Intel Corporation High speed and high efficiency layout for dram circuits
JPH0815206B2 (ja) * 1986-01-30 1996-02-14 三菱電機株式会社 半導体記憶装置
JPH0685427B2 (ja) * 1986-03-13 1994-10-26 三菱電機株式会社 半導体記憶装置
KR890004762B1 (ko) * 1986-11-21 1989-11-25 삼성전자 주식회사 고성능 디램을 위한 센스 증폭기

Also Published As

Publication number Publication date
EP0237361A2 (de) 1987-09-16
JPH0685427B2 (ja) 1994-10-26
US4979013A (en) 1990-12-18
JPS62229872A (ja) 1987-10-08
EP0237361A3 (en) 1989-07-19
EP0237361B1 (de) 1991-01-30

Similar Documents

Publication Publication Date Title
DE3684509D1 (de) Halbleiterspeichergeraet.
DE3681082D1 (de) Halbleiterspeichervorrichtung.
DE3685361D1 (de) Halbleiterspeichervorrichtung.
DE3576433D1 (de) Halbleiterspeichervorrichtung.
DE3581773D1 (de) Halbleiterspeichervorrichtung.
DE3584189D1 (de) Halbleiterspeichergeraet.
DE3850855T2 (de) Halbleitervorrichtung.
DE69011738T2 (de) Halbleiter-Speichereinrichtung.
DE3770953D1 (de) Halbleiterspeichervorrichtungen.
DE69022310T2 (de) Halbleiterspeichergerät.
DE3767579D1 (de) Nichtfluechtige halbleiter-speichereinrichtung.
DE3884022D1 (de) Halbleiterspeicheranordnung.
DE3773957D1 (de) Halbleitervorrichtung.
DE69023468T2 (de) Halbleiter-Speichereinrichtung.
DE68920946T2 (de) Halbleiter-Speichereinrichtung.
DE69022312T2 (de) Halbleiterspeichergerät.
DE3787616T2 (de) Halbleiterspeicheranordnung.
DE3587052D1 (de) Halbleiterspeichergeraet.
DE3883132D1 (de) Synchrone halbleiterspeichervorrichtung.
DE69023258T2 (de) Halbleiter-Speichereinrichtung.
DE3889354T2 (de) Halbleiteranordnung.
DE3882150D1 (de) Halbleiterspeichergeraet.
DE3789783D1 (de) Halbleiterspeicheranordnung.
DE68910415D1 (de) Halbleiter-Speichereinrichtung.
DE3767735D1 (de) Halbleiterspeichervorrichtung.

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)
8339 Ceased/non-payment of the annual fee