DE3684509D1 - Halbleiterspeichergeraet. - Google Patents

Halbleiterspeichergeraet.

Info

Publication number
DE3684509D1
DE3684509D1 DE8686303719T DE3684509T DE3684509D1 DE 3684509 D1 DE3684509 D1 DE 3684509D1 DE 8686303719 T DE8686303719 T DE 8686303719T DE 3684509 T DE3684509 T DE 3684509T DE 3684509 D1 DE3684509 D1 DE 3684509D1
Authority
DE
Germany
Prior art keywords
storage device
semiconductor storage
semiconductor
storage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8686303719T
Other languages
English (en)
Inventor
Yoshihiro Takemae
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3684509D1 publication Critical patent/DE3684509D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1076—Parity data used in redundant arrays of independent storages, e.g. in RAID systems

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
DE8686303719T 1985-05-16 1986-05-15 Halbleiterspeichergeraet. Expired - Fee Related DE3684509D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60104632A JPS61264599A (ja) 1985-05-16 1985-05-16 半導体記憶装置

Publications (1)

Publication Number Publication Date
DE3684509D1 true DE3684509D1 (de) 1992-04-30

Family

ID=14385819

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8686303719T Expired - Fee Related DE3684509D1 (de) 1985-05-16 1986-05-15 Halbleiterspeichergeraet.

Country Status (5)

Country Link
US (1) US4768193A (de)
EP (1) EP0202873B1 (de)
JP (1) JPS61264599A (de)
KR (1) KR910000737B1 (de)
DE (1) DE3684509D1 (de)

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US5239637A (en) * 1989-06-30 1993-08-24 Digital Equipment Corporation Digital data management system for maintaining consistency of data in a shadow set
DE69031443T2 (de) * 1989-06-30 1998-04-23 Digital Equipment Corp Verfahren und Anordnung zur Steuerung von Schattenspeichern
US5210865A (en) * 1989-06-30 1993-05-11 Digital Equipment Corporation Transferring data between storage media while maintaining host processor access for I/O operations
US5128947A (en) * 1989-06-30 1992-07-07 Motorola, Inc. Self-checking memory cell array apparatus
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US5134616A (en) * 1990-02-13 1992-07-28 International Business Machines Corporation Dynamic ram with on-chip ecc and optimized bit and word redundancy
JP2830308B2 (ja) * 1990-02-26 1998-12-02 日本電気株式会社 情報処理装置
US5315708A (en) * 1990-02-28 1994-05-24 Micro Technology, Inc. Method and apparatus for transferring data through a staging memory
US5233618A (en) * 1990-03-02 1993-08-03 Micro Technology, Inc. Data correcting applicable to redundant arrays of independent disks
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US5325497A (en) * 1990-03-29 1994-06-28 Micro Technology, Inc. Method and apparatus for assigning signatures to identify members of a set of mass of storage devices
US5202856A (en) * 1990-04-05 1993-04-13 Micro Technology, Inc. Method and apparatus for simultaneous, interleaved access of multiple memories by multiple ports
US5233692A (en) * 1990-04-06 1993-08-03 Micro Technology, Inc. Enhanced interface permitting multiple-byte parallel transfers of control information and data on a small computer system interface (SCSI) communication bus and a mass storage system incorporating the enhanced interface
US5956524A (en) * 1990-04-06 1999-09-21 Micro Technology Inc. System and method for dynamic alignment of associated portions of a code word from a plurality of asynchronous sources
US5414818A (en) * 1990-04-06 1995-05-09 Mti Technology Corporation Method and apparatus for controlling reselection of a bus by overriding a prioritization protocol
US5214778A (en) * 1990-04-06 1993-05-25 Micro Technology, Inc. Resource management in a multiple resource system
US5307356A (en) * 1990-04-16 1994-04-26 International Business Machines Corporation Interlocked on-chip ECC system
JPH0428098A (ja) * 1990-05-23 1992-01-30 Mitsubishi Electric Corp 半導体メモリ装置
JPH0731582B2 (ja) * 1990-06-21 1995-04-10 インターナショナル・ビジネス・マシーンズ・コーポレイション パリティ保護データを回復するための方法および装置
US5177744A (en) * 1990-09-04 1993-01-05 International Business Machines Corporation Method and apparatus for error recovery in arrays
JPH04144000A (ja) * 1990-10-03 1992-05-18 Mitsubishi Electric Corp 半導体記憶装置
EP0481735A3 (en) * 1990-10-19 1993-01-13 Array Technology Corporation Address protection circuit
US5208813A (en) * 1990-10-23 1993-05-04 Array Technology Corporation On-line reconstruction of a failed redundant array system
DE69131551T2 (de) * 1990-11-09 2000-02-17 Emc Corp Logische Aufteilung eines Speichersystems mit redundanter Matrix
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US5392291A (en) * 1991-05-20 1995-02-21 Alliedsignal Inc. Fault-tolerant CITO communication system
US5499337A (en) 1991-09-27 1996-03-12 Emc Corporation Storage device array architecture with solid-state redundancy unit
US5636358A (en) * 1991-09-27 1997-06-03 Emc Corporation Method and apparatus for transferring data in a storage device including a dual-port buffer
US5237658A (en) * 1991-10-01 1993-08-17 Tandem Computers Incorporated Linear and orthogonal expansion of array storage in multiprocessor computing systems
US5379417A (en) * 1991-11-25 1995-01-03 Tandem Computers Incorporated System and method for ensuring write data integrity in a redundant array data storage system
EP0551009B1 (de) * 1992-01-08 2001-06-13 Emc Corporation Verfahren zur Synchronisierung von reservierten Bereichen in einer redundanten Speicheranordnung
US5341381A (en) * 1992-01-21 1994-08-23 Tandem Computers, Incorporated Redundant array parity caching system
US5469566A (en) * 1992-03-12 1995-11-21 Emc Corporation Flexible parity generation circuit for intermittently generating a parity for a plurality of data channels in a redundant array of storage units
WO1993018456A1 (en) * 1992-03-13 1993-09-16 Emc Corporation Multiple controller sharing in a redundant storage array
US5513192A (en) * 1992-08-28 1996-04-30 Sun Microsystems, Inc. Fault tolerant disk drive system with error detection and correction
US5434871A (en) * 1992-11-17 1995-07-18 Unisys Corporation Continuous embedded parity checking for error detection in memory structures
US6026052A (en) * 1994-05-03 2000-02-15 Fujitsu Limited Programmable semiconductor memory device
CH688425A5 (fr) * 1993-05-24 1997-09-15 Suisse Electronique Microtech Circuit électronique organisé en réseau matriciel de cellules.
JP2669303B2 (ja) * 1993-08-03 1997-10-27 日本電気株式会社 ビットエラー訂正機能付き半導体メモリ
US20030088611A1 (en) * 1994-01-19 2003-05-08 Mti Technology Corporation Systems and methods for dynamic alignment of associated portions of a code word from a plurality of asynchronous sources
US5666371A (en) * 1995-02-24 1997-09-09 Unisys Corporation Method and apparatus for detecting errors in a system that employs multi-bit wide memory elements
US5511164A (en) * 1995-03-01 1996-04-23 Unisys Corporation Method and apparatus for determining the source and nature of an error within a computer system
FR2751083B1 (fr) * 1996-07-12 1998-10-30 Sextant Avionique Procede et dispositif pour quantifier l'impact des rayonnements cosmiques sur un equipement electronique a memoire
JPH1055315A (ja) * 1996-08-08 1998-02-24 Toshiba Corp 半導体記憶装置及びその記憶データのコピー方法
US5953265A (en) * 1997-09-29 1999-09-14 Emc Corporation Memory having error detection and correction
EP0926687B1 (de) * 1997-12-22 2005-03-02 STMicroelectronics S.r.l. Selbsttest und Korrektur von Ladungsverlustfehlern in einem Sektorenlöschbaren und-programmierbaren Flashspeicher
FR2781918B1 (fr) * 1998-07-31 2000-10-06 St Microelectronics Sa Memoire rom a correction par redondance
US6216251B1 (en) * 1999-04-30 2001-04-10 Motorola Inc On-chip error detection and correction system for an embedded non-volatile memory array and method of operation
US6791157B1 (en) * 2000-01-18 2004-09-14 Advanced Micro Devices, Inc. Integrated circuit package incorporating programmable elements
JP2002008390A (ja) * 2000-06-16 2002-01-11 Fujitsu Ltd 冗長セルを有するメモリデバイス
JP4712214B2 (ja) * 2001-04-09 2011-06-29 富士通セミコンダクター株式会社 半導体メモリの動作制御方法および半導体メモリ
ITMI20020260A1 (it) * 2002-02-12 2003-08-12 Ausimont Spa Dispersioni acquose di fluoropolimeri
US7047466B2 (en) * 2002-06-03 2006-05-16 International Business Machines Corporation Apparatus and method for programmable fuse repair to support dynamic relocate and improved cache testing
US7010741B2 (en) * 2002-10-29 2006-03-07 Mosaid Technologies Method and circuit for error correction in CAM cells
US7003704B2 (en) * 2002-11-12 2006-02-21 International Business Machines Corporation Two-dimensional redundancy calculation
CA2447204C (en) * 2002-11-29 2010-03-23 Memory Management Services Ltd. Error correction scheme for memory
KR100505685B1 (ko) * 2003-05-12 2005-08-03 삼성전자주식회사 리던던시 효율을 증가시키는 반도체 메모리 장치
US7187602B2 (en) * 2003-06-13 2007-03-06 Infineon Technologies Aktiengesellschaft Reducing memory failures in integrated circuits
KR100694407B1 (ko) * 2005-04-21 2007-03-12 주식회사 하이닉스반도체 불량 셀 교정 회로를 포함하는 불휘발성 강유전체 메모리장치
TWI289851B (en) * 2005-05-04 2007-11-11 Univ Tsinghua Semiconductor memory and method of correcting errors for the same
US7221138B2 (en) * 2005-09-27 2007-05-22 Saifun Semiconductors Ltd Method and apparatus for measuring charge pump output current
JP2007257791A (ja) * 2006-03-24 2007-10-04 Fujitsu Ltd 半導体記憶装置
US9471418B2 (en) * 2007-06-19 2016-10-18 Samsung Electronics Co., Ltd. Memory system that detects bit errors due to read disturbance and methods thereof
JP5166074B2 (ja) 2008-02-29 2013-03-21 株式会社東芝 半導体記憶装置、その制御方法、および誤り訂正システム
JP2009245528A (ja) * 2008-03-31 2009-10-22 Nec Electronics Corp 半導体記憶装置
KR101912372B1 (ko) * 2012-06-29 2018-10-26 에스케이하이닉스 주식회사 Ｅｃｃ 회로를 포함하는 반도체 장치
KR101862379B1 (ko) 2013-04-19 2018-07-05 삼성전자주식회사 Ｅｃｃ 동작과 리던던시 리페어 동작을 공유하는 메모리 장치
US10020822B2 (en) * 2014-07-21 2018-07-10 Rensselaer Polytechnic Institute Error tolerant memory system

Family Cites Families (13)

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JPS598920B2 (ja) * 1977-11-29 1984-02-28 三菱電機株式会社 半導体記憶装置
JPS598852B2 (ja) * 1979-07-30 1984-02-28 富士通株式会社 エラ−処理方式
JPS6051749B2 (ja) * 1979-08-31 1985-11-15 富士通株式会社 エラ−訂正方式
JPS56111194A (en) * 1980-01-18 1981-09-02 Chiyou Lsi Gijutsu Kenkyu Kumiai Semiconductor memory
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JPS6042560B2 (ja) * 1981-03-17 1985-09-24 日本電信電話株式会社 半導体記憶装置
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JPS6150293A (ja) * 1984-08-17 1986-03-12 Fujitsu Ltd 半導体記憶装置

Also Published As

Publication number Publication date
EP0202873B1 (de) 1992-03-25
KR910000737B1 (ko) 1991-02-06
KR860009430A (ko) 1986-12-22
JPS61264599A (ja) 1986-11-22
EP0202873A3 (en) 1988-08-03
US4768193A (en) 1988-08-30
EP0202873A2 (de) 1986-11-26

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee