DE3525418A1 - Halbleiterspeichereinrichtung und verfahren zu ihrer herstellung - Google Patents
Halbleiterspeichereinrichtung und verfahren zu ihrer herstellungInfo
- Publication number
- DE3525418A1 DE3525418A1 DE19853525418 DE3525418A DE3525418A1 DE 3525418 A1 DE3525418 A1 DE 3525418A1 DE 19853525418 DE19853525418 DE 19853525418 DE 3525418 A DE3525418 A DE 3525418A DE 3525418 A1 DE3525418 A1 DE 3525418A1
- Authority
- DE
- Germany
- Prior art keywords
- layer
- conductivity type
- zone
- forming
- channel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/39—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor and the transistor being in a same trench
- H10B12/395—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor and the transistor being in a same trench the transistor being vertical
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/03—Making the capacitor or connections thereto
- H10B12/038—Making the capacitor or connections thereto the capacitor being in a trench in the substrate
- H10B12/0383—Making the capacitor or connections thereto the capacitor being in a trench in the substrate wherein the transistor is vertical
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D1/00—Resistors, capacitors or inductors
- H10D1/60—Capacitors
- H10D1/62—Capacitors having potential barriers
- H10D1/66—Conductor-insulator-semiconductor capacitors, e.g. MOS capacitors
- H10D1/665—Trench conductor-insulator-semiconductor capacitors, e.g. trench MOS capacitors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/63—Vertical IGFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
- H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
- H10P32/14—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase
- H10P32/1408—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase from or through or into an external applied layer, e.g. photoresist or nitride layers
- H10P32/1414—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase from or through or into an external applied layer, e.g. photoresist or nitride layers the applied layer being silicon, silicide or SIPOS, e.g. polysilicon or porous silicon
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
- H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
- H10P32/17—Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material
- H10P32/171—Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material being group IV material
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Semiconductor Memories (AREA)
- Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59143230A JPS6123360A (ja) | 1984-07-12 | 1984-07-12 | 半導体記憶装置およびその製造方法 |
| JP60110128A JPH0793367B2 (ja) | 1985-05-24 | 1985-05-24 | 半導体記憶装置およびその製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| DE3525418A1 true DE3525418A1 (de) | 1986-01-16 |
| DE3525418C2 DE3525418C2 (https=) | 1991-02-07 |
Family
ID=26449807
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE19853525418 Granted DE3525418A1 (de) | 1984-07-12 | 1985-07-12 | Halbleiterspeichereinrichtung und verfahren zu ihrer herstellung |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US4672410A (https=) |
| KR (1) | KR900000207B1 (https=) |
| DE (1) | DE3525418A1 (https=) |
Cited By (24)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3643635A1 (de) * | 1985-12-25 | 1987-07-02 | Mitsubishi Electric Corp | Halbleiterspeichereinrichtung |
| EP0254046A1 (en) * | 1986-07-15 | 1988-01-27 | International Business Machines Corporation | Semiconductor memory |
| US4737829A (en) * | 1985-03-28 | 1988-04-12 | Nec Corporation | Dynamic random access memory device having a plurality of one-transistor type memory cells |
| DE3801525A1 (de) * | 1987-02-27 | 1988-09-08 | Mitsubishi Electric Corp | Halbleitereinrichtung |
| DE3809653A1 (de) * | 1987-03-23 | 1988-10-13 | Mitsubishi Electric Corp | Halbleitereinrichtung und verfahren zur herstellung einer halbleitereinrichtung |
| EP0293134A1 (en) * | 1987-05-25 | 1988-11-30 | Matsushita Electronics Corporation | Method of fabricating trench cell capacitors on a semiconductor substrate |
| US4797373A (en) * | 1984-10-31 | 1989-01-10 | Texas Instruments Incorporated | Method of making dRAM cell with trench capacitor |
| DE3821405A1 (de) * | 1987-07-01 | 1989-01-12 | Mitsubishi Electric Corp | Halbleiterspeichereinrichtung |
| US4824793A (en) * | 1984-09-27 | 1989-04-25 | Texas Instruments Incorporated | Method of making DRAM cell with trench capacitor |
| US4829017A (en) * | 1986-09-25 | 1989-05-09 | Texas Instruments Incorporated | Method for lubricating a high capacity dram cell |
| DE3835692A1 (de) * | 1987-11-17 | 1989-06-01 | Mitsubishi Electric Corp | Halbleiterspeichereinrichtung und herstellungsverfahren |
| DE3832414A1 (de) * | 1987-11-28 | 1989-06-08 | Mitsubishi Electric Corp | Halbleiterspeichereinrichtung |
| US4859615A (en) * | 1985-09-19 | 1989-08-22 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor memory cell capacitor and method for making the same |
| USRE33261E (en) * | 1984-07-03 | 1990-07-10 | Texas Instruments, Incorporated | Trench capacitor for high density dynamic RAM |
| US5032882A (en) * | 1987-12-28 | 1991-07-16 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device having trench type structure |
| EP0333426A3 (en) * | 1988-03-15 | 1992-01-29 | Kabushiki Kaisha Toshiba | Dynamic RAM |
| US5102817A (en) * | 1985-03-21 | 1992-04-07 | Texas Instruments Incorporated | Vertical DRAM cell and method |
| US5105245A (en) * | 1988-06-28 | 1992-04-14 | Texas Instruments Incorporated | Trench capacitor DRAM cell with diffused bit lines adjacent to a trench |
| US5109259A (en) * | 1987-09-22 | 1992-04-28 | Texas Instruments Incorporated | Multiple DRAM cells in a trench |
| US5164917A (en) * | 1985-06-26 | 1992-11-17 | Texas Instruments Incorporated | Vertical one-transistor DRAM with enhanced capacitance and process for fabricating |
| US5183774A (en) * | 1987-11-17 | 1993-02-02 | Mitsubishi Denki Kabushiki Kaisha | Method of making a semiconductor memory device |
| US5208657A (en) * | 1984-08-31 | 1993-05-04 | Texas Instruments Incorporated | DRAM Cell with trench capacitor and vertical channel in substrate |
| US5225363A (en) * | 1988-06-28 | 1993-07-06 | Texas Instruments Incorporated | Trench capacitor DRAM cell and method of manufacture |
| US6715951B2 (en) | 2001-04-20 | 2004-04-06 | L'oreal S.A. | Unit for applying at least one product |
Families Citing this family (80)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4830981A (en) * | 1984-07-03 | 1989-05-16 | Texas Instruments Inc. | Trench capacitor process for high density dynamic ram |
| US4658283A (en) * | 1984-07-25 | 1987-04-14 | Hitachi, Ltd. | Semiconductor integrated circuit device having a carrier trapping trench arrangement |
| US5225697A (en) * | 1984-09-27 | 1993-07-06 | Texas Instruments, Incorporated | dRAM cell and method |
| JPS61150366A (ja) * | 1984-12-25 | 1986-07-09 | Nec Corp | Mis型メモリ−セル |
| JPH0682800B2 (ja) * | 1985-04-16 | 1994-10-19 | 株式会社東芝 | 半導体記憶装置 |
| KR900001836B1 (ko) * | 1985-07-02 | 1990-03-24 | 마쯔시다덴기산교 가부시기가이샤 | 반도체기억장치 및 그 제조방법 |
| JPS63500484A (ja) * | 1985-07-25 | 1988-02-18 | アメリカン テレフオン アンド テレグラフ カムパニ− | 溝容量を含む高動作特性dramアレイ |
| US4751558A (en) * | 1985-10-31 | 1988-06-14 | International Business Machines Corporation | High density memory with field shield |
| JPS62120070A (ja) * | 1985-11-20 | 1987-06-01 | Toshiba Corp | 半導体記憶装置 |
| JPS62136069A (ja) * | 1985-12-10 | 1987-06-19 | Hitachi Ltd | 半導体装置およびその製造方法 |
| US4801989A (en) * | 1986-02-20 | 1989-01-31 | Fujitsu Limited | Dynamic random access memory having trench capacitor with polysilicon lined lower electrode |
| US6028346A (en) * | 1986-04-25 | 2000-02-22 | Mitsubishi Denki Kabushiki Kaisha | Isolated trench semiconductor device |
| US5182227A (en) * | 1986-04-25 | 1993-01-26 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device and method for manufacturing the same |
| USRE33972E (en) * | 1986-07-15 | 1992-06-23 | International Business Machines Corporation | Two square memory cells |
| JPH0691212B2 (ja) * | 1986-10-07 | 1994-11-14 | 日本電気株式会社 | 半導体メモリ |
| US4833094A (en) * | 1986-10-17 | 1989-05-23 | International Business Machines Corporation | Method of making a dynamic ram cell having shared trench storage capacitor with sidewall-defined bridge contacts and gate electrodes |
| US4980747A (en) * | 1986-12-22 | 1990-12-25 | Texas Instruments Inc. | Deep trench isolation with surface contact to substrate |
| US4819052A (en) * | 1986-12-22 | 1989-04-04 | Texas Instruments Incorporated | Merged bipolar/CMOS technology using electrically active trench |
| US4763180A (en) * | 1986-12-22 | 1988-08-09 | International Business Machines Corporation | Method and structure for a high density VMOS dynamic ram array |
| US4916524A (en) * | 1987-03-16 | 1990-04-10 | Texas Instruments Incorporated | Dram cell and method |
| JPH0687500B2 (ja) * | 1987-03-26 | 1994-11-02 | 日本電気株式会社 | 半導体記憶装置およびその製造方法 |
| DE3886283T2 (de) * | 1987-07-10 | 1994-05-11 | Toshiba Kawasaki Kk | Halbleiterbauelement mit Bereichen unterschiedlicher Störstellenkonzentration. |
| US5260226A (en) * | 1987-07-10 | 1993-11-09 | Kabushiki Kaisha Toshiba | Semiconductor device having different impurity concentration wells |
| US5726475A (en) * | 1987-07-10 | 1998-03-10 | Kabushiki Kaisha Toshiba | Semiconductor device having different impurity concentration wells |
| US5238860A (en) * | 1987-07-10 | 1993-08-24 | Kabushiki Kaisha Toshiba | Semiconductor device having different impurity concentration wells |
| US4893160A (en) * | 1987-11-13 | 1990-01-09 | Siliconix Incorporated | Method for increasing the performance of trenched devices and the resulting structure |
| JP2606857B2 (ja) * | 1987-12-10 | 1997-05-07 | 株式会社日立製作所 | 半導体記憶装置の製造方法 |
| US5100823A (en) * | 1988-02-29 | 1992-03-31 | Motorola, Inc. | Method of making buried stacked transistor-capacitor |
| US4967245A (en) * | 1988-03-14 | 1990-10-30 | Siliconix Incorporated | Trench power MOSFET device |
| US5248891A (en) * | 1988-03-25 | 1993-09-28 | Hiroshi Takato | High integration semiconductor device |
| US5106776A (en) * | 1988-06-01 | 1992-04-21 | Texas Instruments Incorporated | Method of making high performance composed pillar dRAM cell |
| US5103276A (en) * | 1988-06-01 | 1992-04-07 | Texas Instruments Incorporated | High performance composed pillar dram cell |
| US4958206A (en) * | 1988-06-28 | 1990-09-18 | Texas Instruments Incorporated | Diffused bit line trench capacitor dram cell |
| JPH0817224B2 (ja) * | 1988-08-03 | 1996-02-21 | 株式会社東芝 | 半導体記憶装置の製造方法 |
| US5258635A (en) * | 1988-09-06 | 1993-11-02 | Kabushiki Kaisha Toshiba | MOS-type semiconductor integrated circuit device |
| US5181088A (en) * | 1988-09-14 | 1993-01-19 | Kabushiki Kaisha Toshiba | Vertical field effect transistor with an extended polysilicon channel region |
| JP2517375B2 (ja) * | 1988-12-19 | 1996-07-24 | 三菱電機株式会社 | 固体撮像装置および該装置に用いられる電荷転送装置ならびにその製造方法 |
| WO1990011619A1 (en) * | 1989-03-23 | 1990-10-04 | Grumman Aerospace Corporation | Single trench mosfet-capacitor cell for analog signal processing |
| US5053350A (en) * | 1989-03-23 | 1991-10-01 | Grumman Aerospace Corporation | Method of making trench MOSFET capacitor cell for analog signal processing |
| US5183772A (en) * | 1989-05-10 | 1993-02-02 | Samsung Electronics Co., Ltd. | Manufacturing method for a DRAM cell |
| US4954854A (en) * | 1989-05-22 | 1990-09-04 | International Business Machines Corporation | Cross-point lightly-doped drain-source trench transistor and fabrication process therefor |
| US5021355A (en) * | 1989-05-22 | 1991-06-04 | International Business Machines Corporation | Method of fabricating cross-point lightly-doped drain-source trench transistor |
| US5124766A (en) * | 1989-06-30 | 1992-06-23 | Texas Instruments Incorporated | Filament channel transistor interconnected with a conductor |
| US5034787A (en) * | 1990-06-28 | 1991-07-23 | International Business Machines Corporation | Structure and fabrication method for a double trench memory cell device |
| US5064777A (en) * | 1990-06-28 | 1991-11-12 | International Business Machines Corporation | Fabrication method for a double trench memory cell device |
| JPH06163851A (ja) * | 1991-06-07 | 1994-06-10 | Texas Instr Japan Ltd | 半導体装置及びその製造方法 |
| US5156992A (en) * | 1991-06-25 | 1992-10-20 | Texas Instruments Incorporated | Process for forming poly-sheet pillar transistor DRAM cell |
| KR940006679B1 (ko) * | 1991-09-26 | 1994-07-25 | 현대전자산업 주식회사 | 수직형 트랜지스터를 갖는 dram셀 및 그 제조방법 |
| US5471087A (en) * | 1991-10-02 | 1995-11-28 | Buerger, Jr.; Walter R. | Semi-monolithic memory with high-density cell configurations |
| JPH0834261B2 (ja) * | 1992-06-17 | 1996-03-29 | インターナショナル・ビジネス・マシーンズ・コーポレイション | Bicmos集積回路用のsoi構造体およびその製造方法 |
| US5365097A (en) * | 1992-10-05 | 1994-11-15 | International Business Machines Corporation | Vertical epitaxial SOI transistor, memory cell and fabrication methods |
| JPH07130871A (ja) * | 1993-06-28 | 1995-05-19 | Toshiba Corp | 半導体記憶装置 |
| US5641694A (en) * | 1994-12-22 | 1997-06-24 | International Business Machines Corporation | Method of fabricating vertical epitaxial SOI transistor |
| TW388123B (en) * | 1997-09-02 | 2000-04-21 | Tsmc Acer Semiconductor Mfg Co | Method of producing DRAM capacitance and structure thereof |
| US6229161B1 (en) | 1998-06-05 | 2001-05-08 | Stanford University | Semiconductor capacitively-coupled NDR device and its applications in high-density high-speed memories and in power switches |
| US6690038B1 (en) | 1999-06-05 | 2004-02-10 | T-Ram, Inc. | Thyristor-based device over substrate surface |
| US6437381B1 (en) * | 2000-04-27 | 2002-08-20 | International Business Machines Corporation | Semiconductor memory device with reduced orientation-dependent oxidation in trench structures |
| EP1158583A1 (en) | 2000-05-23 | 2001-11-28 | STMicroelectronics S.r.l. | Low on-resistance LDMOS |
| DE10027913A1 (de) * | 2000-05-31 | 2001-12-13 | Infineon Technologies Ag | Speicherzelle mit einem Grabenkondensator |
| DE10038728A1 (de) * | 2000-07-31 | 2002-02-21 | Infineon Technologies Ag | Halbleiterspeicher-Zellenanordnung und Verfahren zu deren Herstellung |
| US6794242B1 (en) * | 2000-09-29 | 2004-09-21 | Infineon Technologies Ag | Extendible process for improved top oxide layer for DRAM array and the gate interconnects while providing self-aligned gate contacts |
| US7456439B1 (en) | 2001-03-22 | 2008-11-25 | T-Ram Semiconductor, Inc. | Vertical thyristor-based memory with trench isolation and its method of fabrication |
| US6727528B1 (en) | 2001-03-22 | 2004-04-27 | T-Ram, Inc. | Thyristor-based device including trench dielectric isolation for thyristor-body regions |
| US7033876B2 (en) * | 2001-07-03 | 2006-04-25 | Siliconix Incorporated | Trench MIS device having implanted drain-drift region and thick bottom oxide and process for manufacturing the same |
| US7291884B2 (en) * | 2001-07-03 | 2007-11-06 | Siliconix Incorporated | Trench MIS device having implanted drain-drift region and thick bottom oxide |
| US7009247B2 (en) * | 2001-07-03 | 2006-03-07 | Siliconix Incorporated | Trench MIS device with thick oxide layer in bottom of gate contact trench |
| US20060038223A1 (en) * | 2001-07-03 | 2006-02-23 | Siliconix Incorporated | Trench MOSFET having drain-drift region comprising stack of implanted regions |
| US7786533B2 (en) * | 2001-09-07 | 2010-08-31 | Power Integrations, Inc. | High-voltage vertical transistor with edge termination structure |
| US6965129B1 (en) | 2002-11-06 | 2005-11-15 | T-Ram, Inc. | Thyristor-based device having dual control ports |
| DE102004028679A1 (de) * | 2004-06-14 | 2006-01-05 | Infineon Technologies Ag | Isolationsgrabenanordnung |
| JP4059510B2 (ja) * | 2004-10-22 | 2008-03-12 | 株式会社東芝 | 半導体装置及びその製造方法 |
| TWI310501B (en) * | 2005-10-06 | 2009-06-01 | Via Tech Inc | Bus controller and data buffer allocation method |
| KR100695487B1 (ko) * | 2006-03-20 | 2007-03-16 | 주식회사 하이닉스반도체 | 반도체 소자 및 그 제조 방법 |
| US7691734B2 (en) * | 2007-03-01 | 2010-04-06 | International Business Machines Corporation | Deep trench based far subcollector reachthrough |
| US7859081B2 (en) * | 2007-03-29 | 2010-12-28 | Intel Corporation | Capacitor, method of increasing a capacitance area of same, and system containing same |
| JP5767430B2 (ja) * | 2007-08-10 | 2015-08-19 | ローム株式会社 | 半導体装置および半導体装置の製造方法 |
| JP5537324B2 (ja) * | 2010-08-05 | 2014-07-02 | 株式会社東芝 | 半導体装置の製造方法 |
| JP2012054334A (ja) * | 2010-08-31 | 2012-03-15 | Elpida Memory Inc | 半導体デバイス及びその製造方法 |
| US10224392B1 (en) * | 2016-07-11 | 2019-03-05 | The United States Of America As Represented By The Director, National Security Agency | Method of fabricating a semiconductor capacitor |
| TWI739087B (zh) * | 2019-04-11 | 2021-09-11 | 台灣茂矽電子股份有限公司 | 分離閘結構之製造方法及分離閘結構 |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0066081A2 (en) * | 1981-05-22 | 1982-12-08 | International Business Machines Corporation | Dense vertical FET and method of making |
| EP0085988A2 (en) * | 1982-02-10 | 1983-08-17 | Hitachi, Ltd. | Semiconductor memory and method for fabricating the same |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5812739B2 (ja) * | 1975-05-07 | 1983-03-10 | 株式会社日立製作所 | 半導体記憶装置 |
| JPS54121080A (en) * | 1978-03-13 | 1979-09-19 | Nec Corp | Semiconductor device |
| JPS5630763A (en) * | 1979-08-23 | 1981-03-27 | Toshiba Corp | Semiconductor device |
| JPS5643171A (en) * | 1979-09-17 | 1981-04-21 | Mitsubishi Electric Corp | Informing device for platform of elevator |
| US4353086A (en) * | 1980-05-07 | 1982-10-05 | Bell Telephone Laboratories, Incorporated | Silicon integrated circuits |
| JPS5919366A (ja) * | 1982-07-23 | 1984-01-31 | Hitachi Ltd | 半導体記憶装置 |
| JPS5982761A (ja) * | 1982-11-04 | 1984-05-12 | Hitachi Ltd | 半導体メモリ |
-
1985
- 1985-07-09 US US06/753,283 patent/US4672410A/en not_active Expired - Fee Related
- 1985-07-12 KR KR1019850004990A patent/KR900000207B1/ko not_active Expired
- 1985-07-12 DE DE19853525418 patent/DE3525418A1/de active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0066081A2 (en) * | 1981-05-22 | 1982-12-08 | International Business Machines Corporation | Dense vertical FET and method of making |
| EP0085988A2 (en) * | 1982-02-10 | 1983-08-17 | Hitachi, Ltd. | Semiconductor memory and method for fabricating the same |
Non-Patent Citations (2)
| Title |
|---|
| IBM TDB, Vol. 26, Nr. 9, Febr. 84,, S. 4699-46701 * |
| IBM TDB, Vol. 27, Nr. 2, Juli 84, S. 1313-1320 * |
Cited By (30)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| USRE33261E (en) * | 1984-07-03 | 1990-07-10 | Texas Instruments, Incorporated | Trench capacitor for high density dynamic RAM |
| US5208657A (en) * | 1984-08-31 | 1993-05-04 | Texas Instruments Incorporated | DRAM Cell with trench capacitor and vertical channel in substrate |
| US4824793A (en) * | 1984-09-27 | 1989-04-25 | Texas Instruments Incorporated | Method of making DRAM cell with trench capacitor |
| US4797373A (en) * | 1984-10-31 | 1989-01-10 | Texas Instruments Incorporated | Method of making dRAM cell with trench capacitor |
| US5102817A (en) * | 1985-03-21 | 1992-04-07 | Texas Instruments Incorporated | Vertical DRAM cell and method |
| US4737829A (en) * | 1985-03-28 | 1988-04-12 | Nec Corporation | Dynamic random access memory device having a plurality of one-transistor type memory cells |
| US5164917A (en) * | 1985-06-26 | 1992-11-17 | Texas Instruments Incorporated | Vertical one-transistor DRAM with enhanced capacitance and process for fabricating |
| US4859615A (en) * | 1985-09-19 | 1989-08-22 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor memory cell capacitor and method for making the same |
| DE3643635A1 (de) * | 1985-12-25 | 1987-07-02 | Mitsubishi Electric Corp | Halbleiterspeichereinrichtung |
| US4961095A (en) * | 1985-12-25 | 1990-10-02 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor memory device with word lines adjacent and non-intersecting with capacitor grooves |
| EP0254046A1 (en) * | 1986-07-15 | 1988-01-27 | International Business Machines Corporation | Semiconductor memory |
| US4829017A (en) * | 1986-09-25 | 1989-05-09 | Texas Instruments Incorporated | Method for lubricating a high capacity dram cell |
| DE3801525A1 (de) * | 1987-02-27 | 1988-09-08 | Mitsubishi Electric Corp | Halbleitereinrichtung |
| DE3809653A1 (de) * | 1987-03-23 | 1988-10-13 | Mitsubishi Electric Corp | Halbleitereinrichtung und verfahren zur herstellung einer halbleitereinrichtung |
| US4985368A (en) * | 1987-03-23 | 1991-01-15 | Mitsubishi Denki Kabushiki Kaisha | Method for making semiconductor device with no stress generated at the trench corner portion |
| US4843025A (en) * | 1987-05-25 | 1989-06-27 | Matsushita Electronics Corporation | Method of fabricating trench cell capacitors on a semocondcutor substrate |
| EP0293134A1 (en) * | 1987-05-25 | 1988-11-30 | Matsushita Electronics Corporation | Method of fabricating trench cell capacitors on a semiconductor substrate |
| US4929990A (en) * | 1987-07-01 | 1990-05-29 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor memory device |
| DE3821405A1 (de) * | 1987-07-01 | 1989-01-12 | Mitsubishi Electric Corp | Halbleiterspeichereinrichtung |
| US5109259A (en) * | 1987-09-22 | 1992-04-28 | Texas Instruments Incorporated | Multiple DRAM cells in a trench |
| US5027173A (en) * | 1987-11-17 | 1991-06-25 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor memory device with two separate gates per block |
| DE3835692A1 (de) * | 1987-11-17 | 1989-06-01 | Mitsubishi Electric Corp | Halbleiterspeichereinrichtung und herstellungsverfahren |
| US5183774A (en) * | 1987-11-17 | 1993-02-02 | Mitsubishi Denki Kabushiki Kaisha | Method of making a semiconductor memory device |
| US4970580A (en) * | 1987-11-28 | 1990-11-13 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor memory device having protruding cell configuration |
| DE3832414A1 (de) * | 1987-11-28 | 1989-06-08 | Mitsubishi Electric Corp | Halbleiterspeichereinrichtung |
| US5032882A (en) * | 1987-12-28 | 1991-07-16 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device having trench type structure |
| EP0333426A3 (en) * | 1988-03-15 | 1992-01-29 | Kabushiki Kaisha Toshiba | Dynamic RAM |
| US5105245A (en) * | 1988-06-28 | 1992-04-14 | Texas Instruments Incorporated | Trench capacitor DRAM cell with diffused bit lines adjacent to a trench |
| US5225363A (en) * | 1988-06-28 | 1993-07-06 | Texas Instruments Incorporated | Trench capacitor DRAM cell and method of manufacture |
| US6715951B2 (en) | 2001-04-20 | 2004-04-06 | L'oreal S.A. | Unit for applying at least one product |
Also Published As
| Publication number | Publication date |
|---|---|
| KR900000207B1 (ko) | 1990-01-23 |
| DE3525418C2 (https=) | 1991-02-07 |
| KR860001469A (ko) | 1986-02-26 |
| US4672410A (en) | 1987-06-09 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| DE3525418A1 (de) | Halbleiterspeichereinrichtung und verfahren zu ihrer herstellung | |
| DE3788499T2 (de) | Halbleiter-Grabenkondensator-Struktur. | |
| DE3929129C2 (https=) | ||
| DE3851649T2 (de) | Aus einer Vielzahl von Eintransistorzellen bestehende dynamische Speichervorrichtung mit wahlfreiem Zugriff. | |
| DE4028488C2 (de) | Verfahren zur Herstellung einer Halbleiterspeichervorrichtung | |
| DE4220497B4 (de) | Halbleiterspeicherbauelement und Verfahren zu dessen Herstellung | |
| DE4016686C2 (de) | Verfahren zum Herstellen eines Halbleiterspeichers | |
| DE3844388A1 (de) | Dynamische direktzugriffspeichereinrichtung | |
| DE4301690A1 (https=) | ||
| DE3785317T2 (de) | Matrix hoher Packungsdichte aus dynamischen VMOS RAM. | |
| DE10153765A1 (de) | Verfahren zur Herstellung einer Dram-Zelle mit einem tiefen Graben | |
| DE3787687T2 (de) | Halbleiterspeicher. | |
| DE2502235A1 (de) | Ladungskopplungs-halbleiteranordnung | |
| DE4424933A1 (de) | Halbleiterspeichervorrichtung und Verfahren zur Herstellung derselben | |
| DE4007582C2 (de) | Verfahren zum Herstellen von mindestens zwei Kontakten in einem Halbleiterbauelement | |
| EP0875937A2 (de) | DRAM-Zellenanordnung und Verfahren zu deren Herstellung | |
| DE19954867C1 (de) | DRAM-Zellenanordnung und Verfahren zu deren Herstellung | |
| WO2000019529A1 (de) | Integrierte schaltungsanordnung mit vertikaltransistoren und verfahren zu deren herstellung | |
| DE19941401C1 (de) | Verfahren zur Herstellung einer DRAM-Zellenanordnung | |
| WO2000055904A1 (de) | Dram-zellenanordnung und verfahren zu deren herstellung | |
| DE3543937C2 (https=) | ||
| DE10022696A1 (de) | Herstellungsverfahren einer Halbleitereinrichtung und Halbleitereinrichtung | |
| DE4038115C2 (de) | Halbleiterspeicher | |
| DE3927176C2 (https=) | ||
| DE4125199C2 (de) | Kompakte Halbleiterspeicheranordnung, Verfahren zu deren Herstellung und Speichermatrix |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| OP8 | Request for examination as to paragraph 44 patent law | ||
| D2 | Grant after examination | ||
| 8364 | No opposition during term of opposition | ||
| 8339 | Ceased/non-payment of the annual fee |