DE3375965D1 - Semiconductor memory - Google Patents

Semiconductor memory

Info

Publication number
DE3375965D1
DE3375965D1 DE8383110928T DE3375965T DE3375965D1 DE 3375965 D1 DE3375965 D1 DE 3375965D1 DE 8383110928 T DE8383110928 T DE 8383110928T DE 3375965 T DE3375965 T DE 3375965T DE 3375965 D1 DE3375965 D1 DE 3375965D1
Authority
DE
Germany
Prior art keywords
semiconductor memory
semiconductor
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8383110928T
Other languages
English (en)
Inventor
Hideo Sunami
Tokuo Kure
Yoshifumi Kawamoto
Masanobu Miyao
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Application granted granted Critical
Publication of DE3375965D1 publication Critical patent/DE3375965D1/de
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/404Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/92Capacitors with potential-jump barrier or surface barrier
    • H01L29/94Metal-insulator-semiconductors, e.g. MOS
    • H01L29/945Trench capacitors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/37DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor being at least partially in a trench in the substrate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/39DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor and the transistor being in a same trench
    • H10B12/395DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor and the transistor being in a same trench the transistor being vertical
DE8383110928T 1982-11-04 1983-11-02 Semiconductor memory Expired DE3375965D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57192478A JPS5982761A (ja) 1982-11-04 1982-11-04 半導体メモリ

Publications (1)

Publication Number Publication Date
DE3375965D1 true DE3375965D1 (en) 1988-04-14

Family

ID=16291954

Family Applications (2)

Application Number Title Priority Date Filing Date
DE8686105956T Expired - Lifetime DE3382212D1 (de) 1982-11-04 1983-11-02 Halbleiterspeicher.
DE8383110928T Expired DE3375965D1 (en) 1982-11-04 1983-11-02 Semiconductor memory

Family Applications Before (1)

Application Number Title Priority Date Filing Date
DE8686105956T Expired - Lifetime DE3382212D1 (de) 1982-11-04 1983-11-02 Halbleiterspeicher.

Country Status (4)

Country Link
EP (2) EP0108390B1 (de)
JP (1) JPS5982761A (de)
KR (1) KR910002816B1 (de)
DE (2) DE3382212D1 (de)

Families Citing this family (130)

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US5170234A (en) * 1984-07-03 1992-12-08 Texas Instruments Incorporated High density dynamic RAM with trench capacitor
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US5208657A (en) * 1984-08-31 1993-05-04 Texas Instruments Incorporated DRAM Cell with trench capacitor and vertical channel in substrate
US4890145A (en) * 1984-08-31 1989-12-26 Texas Instruments Incorporated dRAM cell and array
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US4824793A (en) * 1984-09-27 1989-04-25 Texas Instruments Incorporated Method of making DRAM cell with trench capacitor
US5225697A (en) * 1984-09-27 1993-07-06 Texas Instruments, Incorporated dRAM cell and method
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KR930007522B1 (ko) * 1985-03-08 1993-08-12 가부시끼 가이샤 히다찌세이사꾸쇼 종형 커패시터를 사용한 반도체메모리
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US4673962A (en) * 1985-03-21 1987-06-16 Texas Instruments Incorporated Vertical DRAM cell and method
US5102817A (en) * 1985-03-21 1992-04-07 Texas Instruments Incorporated Vertical DRAM cell and method
US4737829A (en) * 1985-03-28 1988-04-12 Nec Corporation Dynamic random access memory device having a plurality of one-transistor type memory cells
EP0201706B1 (de) * 1985-04-01 1991-09-18 Nec Corporation Dynamische Speicheranordnung mit wahlfreiem Zugriff mit einer Vielzahl von Eintransistorspeicherzellen
JPS61228658A (ja) * 1985-04-01 1986-10-11 Nec Corp 半導体装置
JP2604705B2 (ja) * 1985-04-03 1997-04-30 松下電子工業株式会社 Mosキヤパシタの製造方法
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US5164917A (en) * 1985-06-26 1992-11-17 Texas Instruments Incorporated Vertical one-transistor DRAM with enhanced capacitance and process for fabricating
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Also Published As

Publication number Publication date
EP0108390B1 (de) 1988-03-09
JPH0342514B2 (de) 1991-06-27
EP0202515B1 (de) 1991-03-13
JPS5982761A (ja) 1984-05-12
EP0108390A1 (de) 1984-05-16
KR910002816B1 (ko) 1991-05-04
EP0202515A1 (de) 1986-11-26
DE3382212D1 (de) 1991-04-18
KR840006873A (ko) 1984-12-03

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Free format text: STREHL, P., DIPL.-ING. DIPL.-WIRTSCH.-ING. SCHUEBEL-HOPF, U., DIPL.-CHEM. DR.RER.NAT. GROENING, H., DIPL.-ING., PAT.-ANWAELTE, 8000 MUENCHEN