DE3235409A1 - Integrierte halbleiterschaltungsanordnung und verfahren zu ihrer herstellung - Google Patents

Integrierte halbleiterschaltungsanordnung und verfahren zu ihrer herstellung

Info

Publication number
DE3235409A1
DE3235409A1 DE19823235409 DE3235409A DE3235409A1 DE 3235409 A1 DE3235409 A1 DE 3235409A1 DE 19823235409 DE19823235409 DE 19823235409 DE 3235409 A DE3235409 A DE 3235409A DE 3235409 A1 DE3235409 A1 DE 3235409A1
Authority
DE
Germany
Prior art keywords
semiconductor
circuit
conductivity type
integrated
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE19823235409
Other languages
German (de)
English (en)
Inventor
Makoto Gunma Furihata
Shizuo Takasaki Gunma Kondo
Setsuo Ogura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of DE3235409A1 publication Critical patent/DE3235409A1/de
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0107Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs
    • H10D84/0109Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs the at least one component covered by H10D12/00 or H10D30/00 being a MOS device
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175Coupling arrangements; Interface arrangements
    • H03K19/018Coupling arrangements; Interface arrangements using bipolar transistors only
    • H03K19/01806Interface arrangements
    • H03K19/01818Interface arrangements for integrated injection logic (I2L)
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0107Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/65Integrated injection logic
    • H10D84/658Integrated injection logic integrated in combination with analog structures

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
  • Bipolar Integrated Circuits (AREA)
DE19823235409 1981-09-24 1982-09-24 Integrierte halbleiterschaltungsanordnung und verfahren zu ihrer herstellung Withdrawn DE3235409A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56149433A JPS5851561A (ja) 1981-09-24 1981-09-24 半導体集積回路装置

Publications (1)

Publication Number Publication Date
DE3235409A1 true DE3235409A1 (de) 1983-04-14

Family

ID=15474999

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19823235409 Withdrawn DE3235409A1 (de) 1981-09-24 1982-09-24 Integrierte halbleiterschaltungsanordnung und verfahren zu ihrer herstellung

Country Status (8)

Country Link
JP (1) JPS5851561A (enExample)
DE (1) DE3235409A1 (enExample)
FR (2) FR2514200A1 (enExample)
GB (3) GB2107117B (enExample)
HK (2) HK69887A (enExample)
IT (1) IT1153730B (enExample)
MY (1) MY8700644A (enExample)
SG (1) SG40887G (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5955052A (ja) * 1982-09-24 1984-03-29 Hitachi Ltd 半導体集積回路装置の製造方法
JPS60253261A (ja) * 1984-05-29 1985-12-13 Clarion Co Ltd Iil素子を含む集積回路
JPH0387403A (ja) * 1989-08-31 1991-04-12 Mitsubishi Electric Corp 融雪装置
JP2550736B2 (ja) * 1990-02-14 1996-11-06 三菱電機株式会社 融雪装置
KR920015363A (ko) * 1991-01-22 1992-08-26 김광호 Ttl 입력 버퍼회로

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1901186A1 (de) * 1968-01-11 1969-10-23 Tektronix Inc Integrierte Schaltung und Verfahren zu deren Herstellung
DE2219696B2 (de) * 1971-04-28 1978-04-06 International Business Machines Corp., Armonk, N.Y. (V.St.A.) Verfahren zum Herstellen einer monolithisch integrierten Halbleiteranordnung
US4122481A (en) * 1976-06-23 1978-10-24 Hitachi, Ltd. Semiconductor IC structure including isolated devices in a single substrate and method for fabricating same
GB2037076A (en) * 1978-11-29 1980-07-02 Hitachi Ltd Nonvolatile semiconductor memory

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52117086A (en) * 1976-03-29 1977-10-01 Sharp Corp Semiconductor device for touch type switch
US4258379A (en) * 1978-09-25 1981-03-24 Hitachi, Ltd. IIL With in and outdiffused emitter pocket
JPS5611661A (en) * 1979-07-09 1981-02-05 Sankyo Seiki Mfg Co Ltd Magnetic card reader of normal card containing type
JPS56116661A (en) * 1980-02-20 1981-09-12 Hitachi Ltd Semiconductor integrated circuit device and manufacture thereof

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1901186A1 (de) * 1968-01-11 1969-10-23 Tektronix Inc Integrierte Schaltung und Verfahren zu deren Herstellung
DE2219696B2 (de) * 1971-04-28 1978-04-06 International Business Machines Corp., Armonk, N.Y. (V.St.A.) Verfahren zum Herstellen einer monolithisch integrierten Halbleiteranordnung
US4122481A (en) * 1976-06-23 1978-10-24 Hitachi, Ltd. Semiconductor IC structure including isolated devices in a single substrate and method for fabricating same
GB2037076A (en) * 1978-11-29 1980-07-02 Hitachi Ltd Nonvolatile semiconductor memory

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
US-Z: IBM Technical Disclosure Bulletin, Bd.18, No.5, Okt. 1975, S.1401, 1402 *
US-Z: IBM Technical Disclosure Bulletin, Bd.24, No.1B, Juni 1981, S.466-470 *

Also Published As

Publication number Publication date
JPS5851561A (ja) 1983-03-26
IT1153730B (it) 1987-01-14
GB8502454D0 (en) 1985-03-06
SG40887G (en) 1987-07-17
GB2154061A (en) 1985-08-29
FR2514200B1 (enExample) 1984-07-27
FR2514200A1 (fr) 1983-04-08
FR2533367B1 (fr) 1986-01-24
GB2107117A (en) 1983-04-20
GB8502453D0 (en) 1985-03-06
FR2533367A1 (fr) 1984-03-23
GB2154061B (en) 1986-04-09
MY8700644A (en) 1987-12-31
IT8223326A0 (it) 1982-09-17
GB2154060A (en) 1985-08-29
GB2107117B (en) 1986-04-09
HK69887A (en) 1987-10-02
HK69187A (en) 1987-10-02
GB2154060B (en) 1986-05-14

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Legal Events

Date Code Title Description
OM8 Search report available as to paragraph 43 lit. 1 sentence 1 patent law
8141 Disposal/no request for examination