DE19820040B4 - Halbleiterspeichervorrichtung - Google Patents

Halbleiterspeichervorrichtung Download PDF

Info

Publication number
DE19820040B4
DE19820040B4 DE19820040A DE19820040A DE19820040B4 DE 19820040 B4 DE19820040 B4 DE 19820040B4 DE 19820040 A DE19820040 A DE 19820040A DE 19820040 A DE19820040 A DE 19820040A DE 19820040 B4 DE19820040 B4 DE 19820040B4
Authority
DE
Germany
Prior art keywords
mos transistor
potential
level
control signal
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE19820040A
Other languages
German (de)
English (en)
Other versions
DE19820040A1 (de
Inventor
Yasuhiko Tsukikawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of DE19820040A1 publication Critical patent/DE19820040A1/de
Application granted granted Critical
Publication of DE19820040B4 publication Critical patent/DE19820040B4/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/1057—Data output buffers, e.g. comprising level conversion circuits, circuits for adapting load
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
  • Semiconductor Memories (AREA)
  • Logic Circuits (AREA)
DE19820040A 1997-10-07 1998-05-05 Halbleiterspeichervorrichtung Expired - Fee Related DE19820040B4 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP9-274437 1997-10-07
JP27443797A JP4306821B2 (ja) 1997-10-07 1997-10-07 半導体記憶装置

Publications (2)

Publication Number Publication Date
DE19820040A1 DE19820040A1 (de) 1999-04-08
DE19820040B4 true DE19820040B4 (de) 2005-10-27

Family

ID=17541675

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19820040A Expired - Fee Related DE19820040B4 (de) 1997-10-07 1998-05-05 Halbleiterspeichervorrichtung

Country Status (5)

Country Link
US (1) US5982705A (enExample)
JP (1) JP4306821B2 (enExample)
KR (1) KR100296612B1 (enExample)
DE (1) DE19820040B4 (enExample)
TW (1) TW374923B (enExample)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3765163B2 (ja) * 1997-07-14 2006-04-12 ソニー株式会社 レベルシフト回路
IT1298819B1 (it) * 1998-03-27 2000-02-02 Sgs Thomson Microelectronics Circuito di commutazione
JP3502330B2 (ja) * 2000-05-18 2004-03-02 Ｎｅｃマイクロシステム株式会社 出力回路
JP2002032990A (ja) * 2000-07-17 2002-01-31 Mitsubishi Electric Corp 半導体記憶装置
JP2002076879A (ja) * 2000-09-04 2002-03-15 Mitsubishi Electric Corp 半導体装置
DE10055242C1 (de) * 2000-11-08 2002-02-21 Infineon Technologies Ag Schaltungsanordnung mit interner Versorgungsspannung
JP2006059910A (ja) * 2004-08-18 2006-03-02 Fujitsu Ltd 半導体装置
JP2007035672A (ja) 2005-07-22 2007-02-08 Renesas Technology Corp 半導体集積回路装置
KR102555109B1 (ko) 2021-05-18 2023-07-17 신성환 지주 시설물용 까치집 방지기구

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5291454A (en) * 1991-05-20 1994-03-01 Mitsubishi Denki Kabushiki Kaisha Circuit for decreasing current consumption in data output circuit in case one of two supply voltages fails
DE19514347A1 (de) * 1994-04-18 1995-10-19 Hyundai Electronics Ind Datenausgabepuffer
US5535171A (en) * 1994-02-04 1996-07-09 Samsung Electronics Co., Ltd. Data output buffer of a semiconducter memory device

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60201591A (ja) * 1984-03-26 1985-10-12 Hitachi Ltd 半導体集積回路装置
JPH05347386A (ja) * 1992-02-21 1993-12-27 Sony Corp 半導体装置
JPH0774616A (ja) * 1993-07-06 1995-03-17 Seiko Epson Corp 信号電圧レベル変換回路及び出力バッファ回路
JPH07230693A (ja) * 1994-02-16 1995-08-29 Toshiba Corp 半導体記憶装置
US5543734A (en) * 1994-08-30 1996-08-06 Intel Corporation Voltage supply isolation buffer
JPH09139077A (ja) * 1995-11-17 1997-05-27 Hitachi Ltd ２段ブースト電圧回路、およびこれを用いた半導体メモリ、ならびにこの半導体メモリを用いたコンピュータシステム
JP3738070B2 (ja) * 1995-11-29 2006-01-25 株式会社ルネサステクノロジ 半導体装置

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5291454A (en) * 1991-05-20 1994-03-01 Mitsubishi Denki Kabushiki Kaisha Circuit for decreasing current consumption in data output circuit in case one of two supply voltages fails
US5535171A (en) * 1994-02-04 1996-07-09 Samsung Electronics Co., Ltd. Data output buffer of a semiconducter memory device
DE19514347A1 (de) * 1994-04-18 1995-10-19 Hyundai Electronics Ind Datenausgabepuffer

Also Published As

Publication number Publication date
KR19990036519A (ko) 1999-05-25
TW374923B (en) 1999-11-21
DE19820040A1 (de) 1999-04-08
JP4306821B2 (ja) 2009-08-05
JPH11111946A (ja) 1999-04-23
KR100296612B1 (ko) 2001-08-07
US5982705A (en) 1999-11-09

Similar Documents

Publication Publication Date Title
DE68917900T2 (de) Spannungsreglerschaltung.
DE69427214T2 (de) Halbleiterspeicheranordnung mit Spannung-Erhöhungsschaltung
DE4331895C2 (de) Schaltung zum Halten einer Spannung
DE69227432T2 (de) Spannungsgenerator für eine Speicher-Anordnung
DE4439661C5 (de) Wortleitungstreiberschaltkreis für eine Halbleiterspeichereinrichtung
DE4332452C2 (de) Halbleitervorrichtung mit einem Boostmittel und Verfahren zum Festklemmen einer Spannung
DE69117784T2 (de) On-Chip-Spannungsregler und Halbleiterspeichervorrichtung mit Verwendung desgleichen
DE4115082C2 (de) Halbleitereinrichtung mit einer Spannungswandlerschaltung zum Umwandeln einer extern angelegten Betriebsspannung in eine vorbestimmte Spannung, insb. einer Speichereinrichtung sowie entsprechendes Betriebsverfahren für diese Halbleitereinrichtung
DE4437757C2 (de) Referenzspannungserzeugungsschaltung
DE10106407A1 (de) Schaltung zur Erzeugung einer internen Spannung
DE4037206A1 (de) Quellspannungssteuerschaltkreis
DE4406035A1 (de) Halbleiterspeichereinrichtung
DE4240002C2 (de) Halbleiterspeichervorrichtung
DE19749602C2 (de) Substratspannungs-Generatorschaltung
DE4324651C2 (de) Boosting-Schaltung und Verwendung der Boosting-Schaltung
DE10297335T5 (de) Spannungserfassungsschaltung und dieselbe benutzende Erzeugungsschaltung für interne Spannung
DE4305864A1 (en) Output buffer digital driver - has overshoot limiting and changes impedance with output voltage
DE102004024612B4 (de) Spannungserzeugungsschaltung
DE4142065C2 (de) Leseverstärkersteuerungsschaltkreis für eine Halbleiterspeichervorrichtung
DE19820040B4 (de) Halbleiterspeichervorrichtung
DE19819039B4 (de) Halbleiterspeichervorrichtung
DE4234667C2 (de) Spannungserzeugungseinrichtung, Verwendung derselben in einem Halbleiterspeicher und Betriebsverfahren derselben zum Erzeugen einer konstanten Spannung
DE19501535C2 (de) Interne Stromversorgungsschaltung
DE69131872T2 (de) Dynamische Halbleiterspeicherschaltung
DE102004055216A1 (de) Halbleiterspeichervorrichtung

Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
8364 No opposition during term of opposition
R119 Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee

Effective date: 20111201