DE19758977B8 - Verfahren zur Herstellung eines Halbleiterbauelements - Google Patents

Verfahren zur Herstellung eines Halbleiterbauelements Download PDF

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Publication number
DE19758977B8
DE19758977B8 DE19758977A DE19758977A DE19758977B8 DE 19758977 B8 DE19758977 B8 DE 19758977B8 DE 19758977 A DE19758977 A DE 19758977A DE 19758977 A DE19758977 A DE 19758977A DE 19758977 B8 DE19758977 B8 DE 19758977B8
Authority
DE
Germany
Prior art keywords
producing
semiconductor component
semiconductor
component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE19758977A
Other languages
English (en)
Other versions
DE19758977B4 (de
Inventor
Satoshi Shiraki
Hajime Soga
Shoji Miura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Corp
Original Assignee
Denso Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Denso Corp filed Critical Denso Corp
Publication of DE19758977B4 publication Critical patent/DE19758977B4/de
Application granted granted Critical
Publication of DE19758977B8 publication Critical patent/DE19758977B8/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/20—Resistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/13—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body combined with thin-film or thick-film passive components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
DE19758977A 1996-11-06 1997-11-05 Verfahren zur Herstellung eines Halbleiterbauelements Expired - Fee Related DE19758977B8 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP29397596A JP3374680B2 (ja) 1996-11-06 1996-11-06 半導体装置の製造方法
JP8-293975 1996-11-06

Publications (2)

Publication Number Publication Date
DE19758977B4 DE19758977B4 (de) 2012-03-01
DE19758977B8 true DE19758977B8 (de) 2012-09-20

Family

ID=17801624

Family Applications (2)

Application Number Title Priority Date Filing Date
DE19748847A Expired - Fee Related DE19748847B4 (de) 1996-11-06 1997-11-05 Halbleiterbauelement mit einer Vielschichtverbindungsstruktur und Verfahren zur Herstellung desselben
DE19758977A Expired - Fee Related DE19758977B8 (de) 1996-11-06 1997-11-05 Verfahren zur Herstellung eines Halbleiterbauelements

Family Applications Before (1)

Application Number Title Priority Date Filing Date
DE19748847A Expired - Fee Related DE19748847B4 (de) 1996-11-06 1997-11-05 Halbleiterbauelement mit einer Vielschichtverbindungsstruktur und Verfahren zur Herstellung desselben

Country Status (3)

Country Link
US (1) US6274452B1 (de)
JP (1) JP3374680B2 (de)
DE (2) DE19748847B4 (de)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6242792B1 (en) 1996-07-02 2001-06-05 Denso Corporation Semiconductor device having oblique portion as reflection
US6770564B1 (en) 1998-07-29 2004-08-03 Denso Corporation Method of etching metallic thin film on thin film resistor
JP4075228B2 (ja) * 1998-09-09 2008-04-16 株式会社デンソー 半導体装置の製造方法
US6703666B1 (en) 1999-07-14 2004-03-09 Agere Systems Inc. Thin film resistor device and a method of manufacture therefor
EP1203400A1 (de) * 1999-07-14 2002-05-08 Lucent Technologies Inc. Dünnschichtwiderstand und dessen herstellungsverfahren
JP2002124639A (ja) * 2000-08-09 2002-04-26 Seiko Instruments Inc 半導体装置及びその製造方法
US6426268B1 (en) * 2000-11-28 2002-07-30 Analog Devices, Inc. Thin film resistor fabrication method
JP3415581B2 (ja) * 2000-11-29 2003-06-09 Ｎｅｃエレクトロニクス株式会社 半導体装置
US7514283B2 (en) 2003-03-20 2009-04-07 Robert Bosch Gmbh Method of fabricating electromechanical device having a controlled atmosphere
US7075160B2 (en) 2003-06-04 2006-07-11 Robert Bosch Gmbh Microelectromechanical systems and devices having thin film encapsulated mechanical structures
US7956672B2 (en) * 2004-03-30 2011-06-07 Ricoh Company, Ltd. Reference voltage generating circuit
JP4322732B2 (ja) * 2004-05-07 2009-09-02 株式会社リコー 定電流発生回路
JP2007027192A (ja) * 2005-07-12 2007-02-01 Denso Corp レーザトリミング方法
US20070170528A1 (en) 2006-01-20 2007-07-26 Aaron Partridge Wafer encapsulated microelectromechanical structure and method of manufacturing same
JP5243147B2 (ja) * 2007-08-29 2013-07-24 株式会社デンソー センサチップ
US8242876B2 (en) 2008-09-17 2012-08-14 Stmicroelectronics, Inc. Dual thin film precision resistance trimming
US8436426B2 (en) 2010-08-24 2013-05-07 Stmicroelectronics Pte Ltd. Multi-layer via-less thin film resistor
US8659085B2 (en) * 2010-08-24 2014-02-25 Stmicroelectronics Pte Ltd. Lateral connection for a via-less thin film resistor
US8400257B2 (en) 2010-08-24 2013-03-19 Stmicroelectronics Pte Ltd Via-less thin film resistor with a dielectric cap
US8927909B2 (en) 2010-10-11 2015-01-06 Stmicroelectronics, Inc. Closed loop temperature controlled circuit to improve device stability
US8809861B2 (en) 2010-12-29 2014-08-19 Stmicroelectronics Pte Ltd. Thin film metal-dielectric-metal transistor
US9159413B2 (en) 2010-12-29 2015-10-13 Stmicroelectronics Pte Ltd. Thermo programmable resistor based ROM
US8981527B2 (en) * 2011-08-23 2015-03-17 United Microelectronics Corp. Resistor and manufacturing method thereof
US8526214B2 (en) 2011-11-15 2013-09-03 Stmicroelectronics Pte Ltd. Resistor thin film MTP memory
WO2023189109A1 (ja) * 2022-03-28 2023-10-05 ローム株式会社 電子部品およびその製造方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5344785A (en) * 1992-03-13 1994-09-06 United Technologies Corporation Method of forming high speed, high voltage fully isolated bipolar transistors on a SOI substrate

Family Cites Families (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5890737A (ja) 1981-11-25 1983-05-30 Nec Corp 半導体装置
JPS59210658A (ja) * 1983-05-16 1984-11-29 Nec Corp 半導体装置の製造方法
JPS63252330A (ja) 1986-12-09 1988-10-19 日本電気株式会社 金属被膜抵抗の製造方法
JPS63227043A (ja) 1987-03-17 1988-09-21 Matsushita Electronics Corp 薄膜抵抗回路の製造方法
US4878770A (en) 1987-09-09 1989-11-07 Analog Devices, Inc. IC chips with self-aligned thin film resistors
JPH01255264A (ja) 1988-04-05 1989-10-12 Seiko Instr Inc 半導体装置の製造方法
JP2762473B2 (ja) 1988-08-24 1998-06-04 株式会社デンソー 半導体装置の製造方法
JPH02303064A (ja) 1989-05-17 1990-12-17 Fujitsu Ltd 薄膜抵抗の形成方法
JPH038368A (ja) 1989-06-06 1991-01-16 Fujitsu Ltd 薄膜抵抗体の形成方法
JP3024143B2 (ja) 1989-06-19 2000-03-21 ソニー株式会社 半導体装置の製法
US5128745A (en) 1989-07-05 1992-07-07 Seiko Instruments, Inc. Semiconductor device with thin film resistor
JPH03104118A (ja) 1989-09-19 1991-05-01 Fujitsu Ltd 半導体装置の製造方法
US4975386A (en) * 1989-12-22 1990-12-04 Micro Power Systems, Inc. Process enhancement using molybdenum plugs in fabricating integrated circuits
JPH0444260A (ja) 1990-06-08 1992-02-14 Fujitsu Ltd 半導体装置の製造方法
JPH0444259A (ja) 1990-06-08 1992-02-14 Fujitsu Ltd 半導体装置の製造方法
JPH0582519A (ja) 1991-09-19 1993-04-02 Nec Corp 半導体装置の配線及びその製造方法
JP3026656B2 (ja) 1991-09-30 2000-03-27 株式会社デンソー 薄膜抵抗体の製造方法
US5382916A (en) 1991-10-30 1995-01-17 Harris Corporation Differential voltage follower
DE4294151C2 (de) 1991-12-03 1998-02-05 Denso Corp Magnetoresistives Element und Herstellungsverfahren dafür
JPH05175428A (ja) 1991-12-26 1993-07-13 Nippon Precision Circuits Kk 集積回路装置
US5254497A (en) * 1992-07-06 1993-10-19 Taiwan Semiconductor Manufacturing Company Method of eliminating degradation of a multilayer metallurgy/insulator structure of a VLSI integrated circuit
EP0620586B1 (de) * 1993-04-05 2001-06-20 Denso Corporation Halbleiteranordnung mit Dünnfilm-Widerstand
JP2734344B2 (ja) 1993-08-20 1998-03-30 株式会社デンソー 半導体装置の製造方法
US5420063A (en) * 1994-04-11 1995-05-30 National Semiconductor Corporation Method of producing a resistor in an integrated circuit
US5464794A (en) * 1994-05-11 1995-11-07 United Microelectronics Corporation Method of forming contact openings having concavo-concave shape
JP3415712B2 (ja) * 1995-09-19 2003-06-09 松下電器産業株式会社 半導体装置及びその製造方法

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5344785A (en) * 1992-03-13 1994-09-06 United Technologies Corporation Method of forming high speed, high voltage fully isolated bipolar transistors on a SOI substrate

Also Published As

Publication number Publication date
DE19758977B4 (de) 2012-03-01
DE19748847A1 (de) 1998-05-07
JP3374680B2 (ja) 2003-02-10
US6274452B1 (en) 2001-08-14
DE19748847B4 (de) 2012-03-08
JPH10144866A (ja) 1998-05-29

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