DE69922617D1 - Verfahren zur Herstellung eines Halbleiterbauelementes - Google Patents
Verfahren zur Herstellung eines HalbleiterbauelementesInfo
- Publication number
- DE69922617D1 DE69922617D1 DE69922617T DE69922617T DE69922617D1 DE 69922617 D1 DE69922617 D1 DE 69922617D1 DE 69922617 T DE69922617 T DE 69922617T DE 69922617 T DE69922617 T DE 69922617T DE 69922617 D1 DE69922617 D1 DE 69922617D1
- Authority
- DE
- Germany
- Prior art keywords
- producing
- semiconductor component
- semiconductor
- component
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/24—Alloying of impurity materials, e.g. doping materials, electrode materials, with a semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
- H01L21/31604—Deposition from a gas or vapour
- H01L21/31608—Deposition of SiO2
- H01L21/31612—Deposition of SiO2 on a silicon body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Plasma & Fusion (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electroplating Methods And Accessories (AREA)
- Electrodes Of Semiconductors (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP31632498 | 1998-11-06 | ||
JP31632498A JP3279532B2 (ja) | 1998-11-06 | 1998-11-06 | 半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69922617D1 true DE69922617D1 (de) | 2005-01-20 |
DE69922617T2 DE69922617T2 (de) | 2005-12-08 |
Family
ID=18075871
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69922617T Expired - Fee Related DE69922617T2 (de) | 1998-11-06 | 1999-11-05 | Verfahren zur Herstellung einer Halbleitervorrichtung |
Country Status (7)
Country | Link |
---|---|
US (1) | US6136708A (de) |
EP (1) | EP0999584B1 (de) |
JP (1) | JP3279532B2 (de) |
KR (1) | KR20000035252A (de) |
CN (1) | CN1137510C (de) |
DE (1) | DE69922617T2 (de) |
TW (1) | TW439209B (de) |
Families Citing this family (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3475100B2 (ja) * | 1998-11-26 | 2003-12-08 | シャープ株式会社 | 半導体装置の製造方法 |
DE19915078A1 (de) * | 1999-04-01 | 2000-10-12 | Siemens Ag | Verfahren zur Prozessierung einer monokristallinen Halbleiterscheibe und teilweise prozessierte Halbleiterscheibe |
TW490756B (en) | 1999-08-31 | 2002-06-11 | Hitachi Ltd | Method for mass production of semiconductor integrated circuit device and manufacturing method of electronic components |
JP3977578B2 (ja) | 2000-09-14 | 2007-09-19 | 株式会社東芝 | 半導体装置および製造方法 |
KR100671610B1 (ko) * | 2000-10-26 | 2007-01-18 | 주식회사 하이닉스반도체 | 반도체 소자의 금속 배선 형성 방법 |
TW480619B (en) * | 2001-04-17 | 2002-03-21 | United Microelectronics Corp | Cleaning method for dual damascene manufacture process |
US6350689B1 (en) * | 2001-04-23 | 2002-02-26 | Chartered Semiconductor Manufacturing Ltd. | Method to remove copper contamination by using downstream oxygen and chelating agent plasma |
JP2002334927A (ja) | 2001-05-11 | 2002-11-22 | Hitachi Ltd | 半導体装置の製造方法 |
JP2003297947A (ja) * | 2002-04-01 | 2003-10-17 | Hitachi Ltd | 半導体集積回路装置およびその製造方法 |
JP2004087691A (ja) * | 2002-08-26 | 2004-03-18 | Fujitsu Ltd | ゲート絶縁膜を除去する方法 |
US7319071B2 (en) * | 2004-01-29 | 2008-01-15 | Micron Technology, Inc. | Methods for forming a metallic damascene structure |
JP4987254B2 (ja) | 2005-06-22 | 2012-07-25 | 株式会社東芝 | 半導体装置の製造方法 |
JP5286804B2 (ja) * | 2008-01-30 | 2013-09-11 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
JP5422962B2 (ja) * | 2008-10-16 | 2014-02-19 | 富士電機株式会社 | 半導体装置の製造方法 |
TWI503878B (zh) * | 2008-11-07 | 2015-10-11 | Uwiz Technology Co Ltd | 化學機械平坦化後用之酸性清潔組成物 |
JP2010212589A (ja) * | 2009-03-12 | 2010-09-24 | Renesas Electronics Corp | 半導体装置の製造方法 |
US9136206B2 (en) * | 2012-07-25 | 2015-09-15 | Taiwan Semiconductor Manufacturing Company, Ltd. | Copper contact plugs with barrier layers |
CN112582340B (zh) * | 2020-12-15 | 2023-06-30 | 上海集成电路研发中心有限公司 | 金属钴互连层和接触孔层的形成方法 |
Family Cites Families (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3669734A (en) * | 1970-08-05 | 1972-06-13 | Rca Corp | Method of making electrical connections to a glass-encapsulated semiconductor device |
EP0115169B1 (de) * | 1982-12-28 | 1987-03-11 | Toshiaki Ikoma | Spannungsgesteuerte Halbleiterschalteinrichtung |
US4500394A (en) * | 1984-05-16 | 1985-02-19 | At&T Technologies, Inc. | Contacting a surface for plating thereon |
US4866505A (en) * | 1986-03-19 | 1989-09-12 | Analog Devices, Inc. | Aluminum-backed wafer and chip |
DE3782904T2 (de) * | 1986-09-17 | 1993-04-08 | Fujitsu Ltd | Verfahren zur ausbildung einer kupfer enthaltenden metallisierungsschicht auf der oberflaeche eines halbleiterbauelementes. |
JPS6373660A (ja) * | 1986-09-17 | 1988-04-04 | Fujitsu Ltd | 半導体装置 |
JPH01304786A (ja) * | 1988-06-01 | 1989-12-08 | Mitsubishi Electric Corp | 光発電素子 |
US5316974A (en) * | 1988-12-19 | 1994-05-31 | Texas Instruments Incorporated | Integrated circuit copper metallization process using a lift-off seed layer and a thick-plated conductor layer |
JP2839579B2 (ja) * | 1989-10-02 | 1998-12-16 | 株式会社東芝 | 半導体装置及びその製造方法 |
JPH0629621A (ja) * | 1992-07-09 | 1994-02-04 | Mitsubishi Electric Corp | 半導体レーザ装置 |
US5654245A (en) * | 1993-03-23 | 1997-08-05 | Sharp Microelectronics Technology, Inc. | Implantation of nucleating species for selective metallization and products thereof |
US5476816A (en) * | 1994-03-28 | 1995-12-19 | Motorola, Inc. | Process for etching an insulating layer after a metal etching step |
KR0144821B1 (ko) * | 1994-05-16 | 1998-07-01 | 양승택 | 저전원전압으로 작동가능한 갈륨비소 반도체 전력소자의 제조 방법 |
US5498293A (en) * | 1994-06-23 | 1996-03-12 | Mallinckrodt Baker, Inc. | Cleaning wafer substrates of metal contamination while maintaining wafer smoothness |
DE4432210A1 (de) * | 1994-09-09 | 1996-03-14 | Siemens Ag | Verfahren zur Rückseitenätzung einer mit Siliziumdioxid beschichteten Halbleiterscheibe mit Fluorwasserstoffgas |
JPH08227834A (ja) * | 1995-02-21 | 1996-09-03 | Sony Corp | 半導体ウェーハ及びその製造方法 |
JPH09186235A (ja) * | 1995-12-27 | 1997-07-15 | Sony Corp | 半導体装置の製造方法およびその製造装置 |
JP3219020B2 (ja) * | 1996-06-05 | 2001-10-15 | 和光純薬工業株式会社 | 洗浄処理剤 |
TW416987B (en) * | 1996-06-05 | 2001-01-01 | Wako Pure Chem Ind Ltd | A composition for cleaning the semiconductor substrate surface |
JP2943728B2 (ja) * | 1996-10-18 | 1999-08-30 | 日本電気株式会社 | 半導体装置の製造方法 |
US5801100A (en) * | 1997-03-07 | 1998-09-01 | Industrial Technology Research Institute | Electroless copper plating method for forming integrated circuit structures |
US5821168A (en) * | 1997-07-16 | 1998-10-13 | Motorola, Inc. | Process for forming a semiconductor device |
-
1998
- 1998-11-06 JP JP31632498A patent/JP3279532B2/ja not_active Expired - Fee Related
-
1999
- 1999-11-03 TW TW088119133A patent/TW439209B/zh active
- 1999-11-04 US US09/433,970 patent/US6136708A/en not_active Expired - Fee Related
- 1999-11-04 CN CNB991223721A patent/CN1137510C/zh not_active Expired - Fee Related
- 1999-11-05 EP EP99121911A patent/EP0999584B1/de not_active Expired - Lifetime
- 1999-11-05 DE DE69922617T patent/DE69922617T2/de not_active Expired - Fee Related
- 1999-11-05 KR KR1019990048753A patent/KR20000035252A/ko not_active Application Discontinuation
Also Published As
Publication number | Publication date |
---|---|
EP0999584B1 (de) | 2004-12-15 |
JP2000150640A (ja) | 2000-05-30 |
TW439209B (en) | 2001-06-07 |
EP0999584A3 (de) | 2000-08-30 |
JP3279532B2 (ja) | 2002-04-30 |
EP0999584A2 (de) | 2000-05-10 |
US6136708A (en) | 2000-10-24 |
KR20000035252A (ko) | 2000-06-26 |
CN1137510C (zh) | 2004-02-04 |
CN1253376A (zh) | 2000-05-17 |
DE69922617T2 (de) | 2005-12-08 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |