DE19538033C2 - Interner Spannungserhöhungsschaltkreis in einer Halbleiterspeichervorrichtung - Google Patents

Interner Spannungserhöhungsschaltkreis in einer Halbleiterspeichervorrichtung

Info

Publication number
DE19538033C2
DE19538033C2 DE19538033A DE19538033A DE19538033C2 DE 19538033 C2 DE19538033 C2 DE 19538033C2 DE 19538033 A DE19538033 A DE 19538033A DE 19538033 A DE19538033 A DE 19538033A DE 19538033 C2 DE19538033 C2 DE 19538033C2
Authority
DE
Germany
Prior art keywords
node
voltage level
pump
voltage
internal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE19538033A
Other languages
German (de)
English (en)
Other versions
DE19538033A1 (de
Inventor
Sei-Seung Yoon
Byung-Chul Kim
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of DE19538033A1 publication Critical patent/DE19538033A1/de
Application granted granted Critical
Publication of DE19538033C2 publication Critical patent/DE19538033C2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4074Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/14Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/145Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/14Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/148Details of power up or power down circuits, standby circuits or recovery circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Dc-Dc Converters (AREA)
  • Logic Circuits (AREA)
DE19538033A 1994-10-13 1995-10-12 Interner Spannungserhöhungsschaltkreis in einer Halbleiterspeichervorrichtung Expired - Fee Related DE19538033C2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940026238A KR0149224B1 (ko) 1994-10-13 1994-10-13 반도체 집적장치의 내부전압 승압회로

Publications (2)

Publication Number Publication Date
DE19538033A1 DE19538033A1 (de) 1996-04-18
DE19538033C2 true DE19538033C2 (de) 1998-03-19

Family

ID=19395055

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19538033A Expired - Fee Related DE19538033C2 (de) 1994-10-13 1995-10-12 Interner Spannungserhöhungsschaltkreis in einer Halbleiterspeichervorrichtung

Country Status (7)

Country Link
US (1) US5579276A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JP (1) JP2820910B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
KR (1) KR0149224B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
CN (1) CN1169153C (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
DE (1) DE19538033C2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
GB (1) GB2294345B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
TW (1) TW285772B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3542675B2 (ja) * 1995-07-24 2004-07-14 株式会社ルネサステクノロジ 半導体記憶装置
KR19990050493A (ko) * 1997-12-17 1999-07-05 전주범 반도체 메모리 장치용 프리차지 회로
US6341095B1 (en) * 2001-02-21 2002-01-22 International Business Machines Corporation Apparatus for increasing pulldown rate of a bitline in a memory device during a read operation
US6721210B1 (en) 2002-08-30 2004-04-13 Nanoamp Solutions, Inc. Voltage boosting circuit for a low power semiconductor memory
US6891745B2 (en) * 2002-11-08 2005-05-10 Taiwan Semiconductor Manufacturing Company Design concept for SRAM read margin
JP2005116106A (ja) * 2003-10-09 2005-04-28 Elpida Memory Inc 半導体記憶装置とその製造方法
KR100696958B1 (ko) * 2005-04-29 2007-03-20 주식회사 하이닉스반도체 내부 전압 발생 회로
CN104638919A (zh) * 2013-11-14 2015-05-20 中芯国际集成电路制造(上海)有限公司 用于i/o接口的两级升压转换电路
CN108540124A (zh) * 2018-04-16 2018-09-14 电子科技大学 一种电平转换电路

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5038325A (en) * 1990-03-26 1991-08-06 Micron Technology Inc. High efficiency charge pump circuit

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55136723A (en) * 1979-04-11 1980-10-24 Mitsubishi Electric Corp Booster circuit
US4581546A (en) * 1983-11-02 1986-04-08 Inmos Corporation CMOS substrate bias generator having only P channel transistors in the charge pump
US4628214A (en) * 1985-05-22 1986-12-09 Sgs Semiconductor Corporation Back bias generator
JPS63290159A (ja) * 1987-05-20 1988-11-28 Matsushita Electric Ind Co Ltd 昇圧回路
IT1258242B (it) * 1991-11-07 1996-02-22 Samsung Electronics Co Ltd Dispositivo di memoria a semiconduttore includente circuiteria di pompaggio della tensione di alimentazione
JPH0828965B2 (ja) * 1992-09-02 1996-03-21 日本電気株式会社 電圧変換回路
US5347172A (en) * 1992-10-22 1994-09-13 United Memories, Inc. Oscillatorless substrate bias generator
JPH06309868A (ja) * 1993-04-26 1994-11-04 Hitachi Ltd 半導体記憶装置
JP2978671B2 (ja) * 1993-06-04 1999-11-15 九州日本電気株式会社 半導体メモリ装置
US5511026A (en) * 1993-12-01 1996-04-23 Advanced Micro Devices, Inc. Boosted and regulated gate power supply with reference tracking for multi-density and low voltage supply memories

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5038325A (en) * 1990-03-26 1991-08-06 Micron Technology Inc. High efficiency charge pump circuit

Also Published As

Publication number Publication date
KR960015904A (ko) 1996-05-22
KR0149224B1 (ko) 1998-10-01
GB2294345A (en) 1996-04-24
GB9520765D0 (en) 1995-12-13
CN1149188A (zh) 1997-05-07
JP2820910B2 (ja) 1998-11-05
DE19538033A1 (de) 1996-04-18
CN1169153C (zh) 2004-09-29
JPH08205526A (ja) 1996-08-09
TW285772B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1996-09-11
GB2294345B (en) 1996-12-11
US5579276A (en) 1996-11-26

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Legal Events

Date Code Title Description
ON Later submitted papers
OP8 Request for examination as to paragraph 44 patent law
D2 Grant after examination
8364 No opposition during term of opposition
R119 Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee