DE10159762A1 - Halbleiterspeicher - Google Patents

Halbleiterspeicher

Info

Publication number
DE10159762A1
DE10159762A1 DE10159762A DE10159762A DE10159762A1 DE 10159762 A1 DE10159762 A1 DE 10159762A1 DE 10159762 A DE10159762 A DE 10159762A DE 10159762 A DE10159762 A DE 10159762A DE 10159762 A1 DE10159762 A1 DE 10159762A1
Authority
DE
Germany
Prior art keywords
type
field effect
effect transistor
electrically connected
polysilicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
DE10159762A
Other languages
German (de)
English (en)
Inventor
Koji Nii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of DE10159762A1 publication Critical patent/DE10159762A1/de
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
    • G11C11/4125—Cells incorporating circuit means for protecting against loss of information
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/005—Circuit means for protection against loss of information of semiconductor storage devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
  • Static Random-Access Memory (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
DE10159762A 2000-12-06 2001-12-05 Halbleiterspeicher Ceased DE10159762A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000371153 2000-12-06

Publications (1)

Publication Number Publication Date
DE10159762A1 true DE10159762A1 (de) 2002-07-04

Family

ID=18840923

Family Applications (1)

Application Number Title Priority Date Filing Date
DE10159762A Ceased DE10159762A1 (de) 2000-12-06 2001-12-05 Halbleiterspeicher

Country Status (6)

Country Link
US (7) US6529401B2 (enExample)
JP (10) JP4744751B2 (enExample)
KR (1) KR100478375B1 (enExample)
CN (1) CN1172374C (enExample)
DE (1) DE10159762A1 (enExample)
TW (1) TW522546B (enExample)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW522546B (en) 2000-12-06 2003-03-01 Mitsubishi Electric Corp Semiconductor memory
JP2002353413A (ja) * 2001-05-28 2002-12-06 Mitsubishi Electric Corp 半導体記憶装置
JP4877894B2 (ja) * 2001-07-04 2012-02-15 ルネサスエレクトロニクス株式会社 半導体装置
JP4278338B2 (ja) * 2002-04-01 2009-06-10 株式会社ルネサステクノロジ 半導体記憶装置
JP4416428B2 (ja) 2003-04-30 2010-02-17 株式会社ルネサステクノロジ 半導体記憶装置
US7023056B2 (en) * 2003-11-26 2006-04-04 Taiwan Semiconductor Manufacturing Company, Ltd. Memory cell structure
JP4058417B2 (ja) * 2004-01-09 2008-03-12 株式会社東芝 半導体装置およびその製造方法
US7365432B2 (en) * 2004-08-23 2008-04-29 Taiwan Semiconductor Manufacturing Company, Ltd. Memory cell structure
FR2875328B1 (fr) * 2004-09-15 2007-03-16 St Microelectronics Sa Cellule memoire sram protegee contre des pics de courant ou de tension
JP4578329B2 (ja) 2005-06-03 2010-11-10 ルネサスエレクトロニクス株式会社 半導体記憶装置
JP2009238332A (ja) * 2008-03-27 2009-10-15 Renesas Technology Corp 半導体記憶装置
JP2009266942A (ja) * 2008-04-23 2009-11-12 Toshiba Corp 半導体記憶装置
US8737107B2 (en) 2009-01-15 2014-05-27 Taiwan Semiconductor Manufacturing Company, Ltd. Memory circuits and routing of conductive layers thereof
US8004042B2 (en) * 2009-03-20 2011-08-23 Taiwan Semiconductor Manufacturing Company, Ltd. Static random access memory (SRAM) cell and method for forming same
JP5596335B2 (ja) * 2009-12-24 2014-09-24 ルネサスエレクトロニクス株式会社 半導体装置
CN101819977A (zh) * 2010-04-29 2010-09-01 上海宏力半导体制造有限公司 一种静态随机存储器
US8947912B2 (en) 2010-07-20 2015-02-03 University Of Virginia Licensing & Ventures Group Memory cell including unidirectional gate conductors and contacts
JP5705053B2 (ja) 2011-07-26 2015-04-22 ルネサスエレクトロニクス株式会社 半導体装置
KR20160040577A (ko) * 2013-08-06 2016-04-14 르네사스 일렉트로닉스 가부시키가이샤 반도체 집적 회로 장치
JP6316727B2 (ja) * 2014-10-22 2018-04-25 ルネサスエレクトロニクス株式会社 半導体装置
JP2016146504A (ja) * 2016-04-06 2016-08-12 ルネサスエレクトロニクス株式会社 半導体装置および半導体チップ
TWI711159B (zh) * 2017-03-28 2020-11-21 聯華電子股份有限公司 半導體記憶元件

Family Cites Families (35)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0828430B2 (ja) * 1988-11-30 1996-03-21 日本電気株式会社 Ｃｍｏｓ型スタティックメモリ
US5126279A (en) * 1988-12-19 1992-06-30 Micron Technology, Inc. Single polysilicon cross-coupled resistor, six-transistor SRAM cell design technique
JP2927463B2 (ja) * 1989-09-28 1999-07-28 株式会社日立製作所 半導体記憶装置
JPH0821237B2 (ja) * 1990-06-27 1996-03-04 株式会社東芝 半導体記憶装置
JPH0799630B2 (ja) * 1990-09-11 1995-10-25 株式会社東芝 スタティック型半導体記憶装置
JP2589949Y2 (ja) 1990-11-02 1999-02-03 花王株式会社 使い捨ておむつ
JP3359354B2 (ja) * 1991-06-24 2002-12-24 テキサス インスツルメンツ インコーポレイテツド 向上されたダイナミック負フィードバッグを備えた電子ラッチ
EP0578915A3 (en) * 1992-07-16 1994-05-18 Hewlett Packard Co Two-port ram cell
JP2658835B2 (ja) * 1993-10-20 1997-09-30 日本電気株式会社 スタチック型半導体記憶装置
US5338963A (en) 1993-04-05 1994-08-16 International Business Machines Corporation Soft error immune CMOS static RAM cell
JPH07130877A (ja) 1993-11-05 1995-05-19 Sony Corp 完全ｃｍｏｓ型スタティック記憶セル
US5422296A (en) * 1994-04-25 1995-06-06 Motorola, Inc. Process for forming a static-random-access memory cell
JPH08125137A (ja) * 1994-10-28 1996-05-17 Nec Corp 半導体記憶装置
JPH08204029A (ja) * 1995-01-23 1996-08-09 Mitsubishi Electric Corp 半導体装置およびその製造方法
JP3565290B2 (ja) 1995-03-28 2004-09-15 川崎マイクロエレクトロニクス株式会社 マルチポートメモリ
JPH097373A (ja) * 1995-06-20 1997-01-10 Oki Electric Ind Co Ltd 半導体記憶装置
JPH09129753A (ja) * 1995-11-01 1997-05-16 Sony Corp 半導体装置
KR100197524B1 (ko) * 1995-12-30 1999-06-15 김영환 에스램 셀 제조방법
JP3824343B2 (ja) 1996-03-29 2006-09-20 富士通株式会社 半導体装置
US5742557A (en) * 1996-06-20 1998-04-21 Northern Telecom Limited Multi-port random access memory
JP3523762B2 (ja) 1996-12-19 2004-04-26 株式会社東芝 半導体記憶装置
KR19980050498A (ko) * 1996-12-20 1998-09-15 김광호 저전압용 sram 셀
US5923582A (en) * 1997-06-03 1999-07-13 Cypress Semiconductor Corp. SRAM with ROM functionality
US6140684A (en) * 1997-06-24 2000-10-31 Stmicroelectronic, Inc. SRAM cell structure with dielectric sidewall spacers and drain and channel regions defined along sidewall spacers
US6271568B1 (en) * 1997-12-29 2001-08-07 Utmc Microelectronic Systems Inc. Voltage controlled resistance modulation for single event upset immunity
US6005797A (en) * 1998-03-20 1999-12-21 Micron Technology, Inc. Latch-up prevention for memory cells
WO1999063542A1 (en) * 1998-06-05 1999-12-09 Lockheed Martin Corporation Radiation hardened six transistor random access memory and memory device
JP2000150651A (ja) * 1998-11-04 2000-05-30 Nec Corp 半導体装置及びプラグ構造の製造方法
US5966317A (en) * 1999-02-10 1999-10-12 Lucent Technologies Inc. Shielded bitlines for static RAMs
JP2000232168A (ja) * 1999-02-10 2000-08-22 Sony Corp 半導体記憶装置
JP4674386B2 (ja) * 1999-02-17 2011-04-20 ソニー株式会社 半導体記憶装置
JP4565700B2 (ja) * 1999-05-12 2010-10-20 ルネサスエレクトロニクス株式会社 半導体装置
JP4885365B2 (ja) * 2000-05-16 2012-02-29 ルネサスエレクトロニクス株式会社 半導体装置
TW522546B (en) * 2000-12-06 2003-03-01 Mitsubishi Electric Corp Semiconductor memory
JP3526553B2 (ja) * 2001-01-26 2004-05-17 松下電器産業株式会社 Ｓｒａｍ装置

Also Published As

Publication number Publication date
US20030112653A1 (en) 2003-06-19
US6643167B2 (en) 2003-11-04
JP2002237539A (ja) 2002-08-23
JP2019075584A (ja) 2019-05-16
USRE47831E1 (en) 2020-01-28
JP2016208051A (ja) 2016-12-08
JP6188983B2 (ja) 2017-08-30
CN1172374C (zh) 2004-10-20
JP6275905B2 (ja) 2018-02-07
JP2015144281A (ja) 2015-08-06
US6529401B2 (en) 2003-03-04
JP2011101050A (ja) 2011-05-19
KR20020071705A (ko) 2002-09-13
JP2013179331A (ja) 2013-09-09
JP6707157B2 (ja) 2020-06-10
JP2014179651A (ja) 2014-09-25
JP2017103494A (ja) 2017-06-08
JP2017188701A (ja) 2017-10-12
USRE44242E1 (en) 2013-05-28
US20020067637A1 (en) 2002-06-06
JP6620388B2 (ja) 2019-12-18
KR100478375B1 (ko) 2005-03-23
TW522546B (en) 2003-03-01
USRE46272E1 (en) 2017-01-10
JP5722491B2 (ja) 2015-05-20
JP4744751B2 (ja) 2011-08-10
JP2018029212A (ja) 2018-02-22
CN1357922A (zh) 2002-07-10
JP6121604B2 (ja) 2017-04-26
USRE41638E1 (en) 2010-09-07
JP5654081B2 (ja) 2015-01-14
JP5280469B2 (ja) 2013-09-04
JP5993043B2 (ja) 2016-09-14
USRE47679E1 (en) 2019-10-29

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Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
8131 Rejection